\n
address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected
UART1_RBR
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RD : RD
bits : 0 - 8 (9 bit)
access : read-write
UART1_TBR
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : UART1
reset_Mask : 0x0
TD : TD
bits : 0 - 8 (9 bit)
access : read-write
UART1_LCR
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WLS : WLS
bits : 0 - 1 (2 bit)
access : read-write
NSB : NSB
bits : 2 - 4 (3 bit)
access : read-write
PBE : PBE
bits : 3 - 6 (4 bit)
access : read-write
EPE : EPE
bits : 4 - 8 (5 bit)
access : read-write
SPE : SPE
bits : 5 - 10 (6 bit)
access : read-write
BCB : BCB
bits : 6 - 12 (7 bit)
access : read-write
UART1_LSR
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RFDR : RFDR
bits : 0 - 0 (1 bit)
access : read-write
OEI : OEI
bits : 1 - 2 (2 bit)
access : read-write
PEI : PEI
bits : 2 - 4 (3 bit)
access : read-write
FEI : FEI
bits : 3 - 6 (4 bit)
access : read-write
BII : BII
bits : 4 - 8 (5 bit)
access : read-write
TXFEMPT : TXFEMPT
bits : 5 - 10 (6 bit)
access : read-write
TXEMPT : TXEMPT
bits : 6 - 12 (7 bit)
access : read-write
ERRRX : ERRRX
bits : 7 - 14 (8 bit)
access : read-write
UART1_TPR
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RTOIC : RTOIC
bits : 0 - 6 (7 bit)
access : read-write
RTOIE : RTOIE
bits : 7 - 14 (8 bit)
access : read-write
TG : TG
bits : 8 - 23 (16 bit)
access : read-write
UART1_MDR
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MODE : MODE
bits : 0 - 1 (2 bit)
access : read-write
TRSM : TRSM
bits : 2 - 4 (3 bit)
access : read-write
TXDMAEN : TXDMAEN
bits : 4 - 8 (5 bit)
access : read-write
RXDMAEN : RXDMAEN
bits : 5 - 10 (6 bit)
access : read-write
UART1_FSR
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TXFS : TXFS
bits : 0 - 4 (5 bit)
access : read-write
RXFS : RXFS
bits : 8 - 20 (13 bit)
access : read-write
UART1_DLR
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BRD : BRD
bits : 0 - 15 (16 bit)
access : read-write
UART1_IER
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RFTLI_RTOIE : RFTLI_RTOIE
bits : 0 - 0 (1 bit)
access : read-write
TFTLIE : TFTLIE
bits : 1 - 2 (2 bit)
access : read-write
RLSIE : RLSIE
bits : 2 - 4 (3 bit)
access : read-write
UART1_DEGTSTR
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LBM : LBM
bits : 0 - 1 (2 bit)
access : read-write
UART1_IIR
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NIP : NIP
bits : 0 - 0 (1 bit)
access : read-write
IID : IID
bits : 1 - 4 (4 bit)
access : read-write
UART1_FCR
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FME : FME
bits : 0 - 0 (1 bit)
access : read-write
RFR : RFR
bits : 1 - 2 (2 bit)
access : read-write
TFR : TFR
bits : 2 - 4 (3 bit)
access : read-write
TFTL : TFTL
bits : 4 - 9 (6 bit)
access : read-write
RFTL : RFTL
bits : 6 - 13 (8 bit)
access : read-write
URTXEN : URTXEN
bits : 8 - 16 (9 bit)
access : read-write
URRXEN : URRXEN
bits : 9 - 18 (10 bit)
access : read-write
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