\n

AOS

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x68 byte (0x0)
mem_usage : registers
protection : not protected

Registers

INTC_STRGCR

TMR0_HTSSR

TMRB_HTSSR

ADC_ITRGSELR0

ADC_ITRGSELR1


INTC_STRGCR

desc INTC_STRGCR
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

INTC_STRGCR INTC_STRGCR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 STRG

STRG : desc STRG
bits : 0 - -1 (0 bit)
access : write-only


TMR0_HTSSR

desc TMR0_HTSSR
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TMR0_HTSSR TMR0_HTSSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TRGSEL

TRGSEL : desc TRGSEL
bits : 0 - 5 (6 bit)
access : read-write


TMRB_HTSSR

desc TMRB_HTSSR
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TMRB_HTSSR TMRB_HTSSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TRGSEL

TRGSEL : desc TRGSEL
bits : 0 - 5 (6 bit)
access : read-write


ADC_ITRGSELR0

desc ADC_ITRGSELR0
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADC_ITRGSELR0 ADC_ITRGSELR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TRGSEL

TRGSEL : desc TRGSEL
bits : 0 - 5 (6 bit)
access : read-write


ADC_ITRGSELR1

desc ADC_ITRGSELR1
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADC_ITRGSELR1 ADC_ITRGSELR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TRGSEL

TRGSEL : desc TRGSEL
bits : 0 - 5 (6 bit)
access : read-write



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