Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x3C byte (0x0)
mem_usage : registers
protection : not protected
Global Control
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SUSCFG : Suspend Mode Configuration
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#00 : value1
Suspend request is ignored and the module cannot get suspended
#01 : value2
All channels stop running immediately and freeze in the last state without any safe stop
#10 : value3
All channels stop running immediately and freeze in the last state; all outputs go to passive state to achieve safe stop
End of enumeration elements list.
WDMBN : Watchdog Maximum Bitnumber
bits : 16 - 26 (11 bit)
access : read-write
Channel Shadow Transfer
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CH0S : Channel 0 Shadow Transfer
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : value1
No action
#1 : value2
Initiate channel y target intensity shadow transfer. The linear walk will start and channel y intensity will start to change towards the target. Cleared by hardware when the linear walk is complete and the target has been reached.
End of enumeration elements list.
CH1S : Channel 1 Shadow Transfer
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
#0 : value1
No action
#1 : value2
Initiate channel y target intensity shadow transfer. The linear walk will start and channel y intensity will start to change towards the target. Cleared by hardware when the linear walk is complete and the target has been reached.
End of enumeration elements list.
CH2S : Channel 2 Shadow Transfer
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : value1
No action
#1 : value2
Initiate channel y target intensity shadow transfer. The linear walk will start and channel y intensity will start to change towards the target. Cleared by hardware when the linear walk is complete and the target has been reached.
End of enumeration elements list.
CH3S : Channel 3 Shadow Transfer
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
#0 : value1
No action
#1 : value2
Initiate channel y target intensity shadow transfer. The linear walk will start and channel y intensity will start to change towards the target. Cleared by hardware when the linear walk is complete and the target has been reached.
End of enumeration elements list.
CH4S : Channel 4 Shadow Transfer
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : value1
No action
#1 : value2
Initiate channel y target intensity shadow transfer. The linear walk will start and channel y intensity will start to change towards the target. Cleared by hardware when the linear walk is complete and the target has been reached.
End of enumeration elements list.
CH5S : Channel 5 Shadow Transfer
bits : 5 - 4 (0 bit)
access : read-write
Enumeration:
#0 : value1
No action
#1 : value2
Initiate channel y target intensity shadow transfer. The linear walk will start and channel y intensity will start to change towards the target. Cleared by hardware when the linear walk is complete and the target has been reached.
End of enumeration elements list.
CH6S : Channel 6 Shadow Transfer
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : value1
No action
#1 : value2
Initiate channel y target intensity shadow transfer. The linear walk will start and channel y intensity will start to change towards the target. Cleared by hardware when the linear walk is complete and the target has been reached.
End of enumeration elements list.
CH7S : Channel 7 Shadow Transfer
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
#0 : value1
No action
#1 : value2
Initiate channel y target intensity shadow transfer. The linear walk will start and channel y intensity will start to change towards the target. Cleared by hardware when the linear walk is complete and the target has been reached.
End of enumeration elements list.
CH8S : Channel 8 Shadow Transfer
bits : 8 - 7 (0 bit)
access : read-write
Enumeration:
#0 : value1
No action
#1 : value2
Initiate channel y target intensity shadow transfer. The linear walk will start and channel y intensity will start to change towards the target. Cleared by hardware when the linear walk is complete and the target has been reached.
End of enumeration elements list.
CH0A : Channel 0 Linear Walk Abort
bits : 16 - 15 (0 bit)
access : write-only
Enumeration:
#0 : value1
No action
#1 : value2
Abort linear walk; CHyS is cleared, channel y intensity stops changing
End of enumeration elements list.
CH1A : Channel 1 Linear Walk Abort
bits : 17 - 16 (0 bit)
access : write-only
Enumeration:
#0 : value1
No action
#1 : value2
Abort linear walk; CHyS is cleared, channel y intensity stops changing
End of enumeration elements list.
CH2A : Channel 2 Linear Walk Abort
bits : 18 - 17 (0 bit)
access : write-only
Enumeration:
#0 : value1
No action
#1 : value2
Abort linear walk; CHyS is cleared, channel y intensity stops changing
End of enumeration elements list.
CH3A : Channel 3 Linear Walk Abort
bits : 19 - 18 (0 bit)
access : write-only
Enumeration:
#0 : value1
No action
#1 : value2
Abort linear walk; CHyS is cleared, channel y intensity stops changing
End of enumeration elements list.
CH4A : Channel 4 Linear Walk Abort
bits : 20 - 19 (0 bit)
access : write-only
Enumeration:
#0 : value1
No action
#1 : value2
Abort linear walk; CHyS is cleared, channel y intensity stops changing
End of enumeration elements list.
CH5A : Channel 5 Linear Walk Abort
bits : 21 - 20 (0 bit)
access : write-only
Enumeration:
#0 : value1
No action
#1 : value2
Abort linear walk; CHyS is cleared, channel y intensity stops changing
End of enumeration elements list.
CH6A : Channel 6 Linear Walk Abort
bits : 22 - 21 (0 bit)
access : write-only
Enumeration:
#0 : value1
No action
#1 : value2
Abort linear walk; CHyS is cleared, channel y intensity stops changing
End of enumeration elements list.
CH7A : Channel 7 Linear Walk Abort
bits : 23 - 22 (0 bit)
access : write-only
Enumeration:
#0 : value1
No action
#1 : value2
Abort linear walk; CHyS is cleared, channel y intensity stops changing
End of enumeration elements list.
CH8A : Channel 8 Linear Walk Abort
bits : 24 - 23 (0 bit)
access : write-only
Enumeration:
#0 : value1
No action
#1 : value2
Abort linear walk; CHyS is cleared, channel y intensity stops changing
End of enumeration elements list.
Global Clock
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FCLK_PS : Fast Clock Prescaler Factor
bits : 0 - 10 (11 bit)
access : read-write
Enumeration:
0 : value1
No clock
1 : value2
Divide by 1
4095 : value3
Divide by 4095
End of enumeration elements list.
BCS : Bit-Clock Selector
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
#0 : value1
Normal Mode: DAC_bclk is generated from DAC_fclk by a division of 4
#1 : value2
Fast Mode: DAC_bclk is the same as DAC_fclk
End of enumeration elements list.
Module Identification
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MOD_REV : Module Revision Number
bits : 0 - 6 (7 bit)
access : read-only
MOD_TYPE0 : Module Type
bits : 8 - 14 (7 bit)
access : read-only
MOD_NUMBER : Module Number Value
bits : 16 - 30 (15 bit)
access : read-only
Channel Enable
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ECH0 : Channel 0 Enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : value1
Channel is disabled, the output level is passive; the Linear Walker and the Sigma-Delta Modulator are reset, the Packer FIFO is flushed; all internal logic and INTy are reset when the channel gets disabled
#1 : value2
Channel is enabled
End of enumeration elements list.
ECH1 : Channel 1 Enable
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
#0 : value1
Channel is disabled, the output level is passive; the Linear Walker and the Sigma-Delta Modulator are reset, the Packer FIFO is flushed; all internal logic and INTy are reset when the channel gets disabled
#1 : value2
Channel is enabled
End of enumeration elements list.
ECH2 : Channel 2 Enable
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : value1
Channel is disabled, the output level is passive; the Linear Walker and the Sigma-Delta Modulator are reset, the Packer FIFO is flushed; all internal logic and INTy are reset when the channel gets disabled
#1 : value2
Channel is enabled
End of enumeration elements list.
ECH3 : Channel 3 Enable
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
#0 : value1
Channel is disabled, the output level is passive; the Linear Walker and the Sigma-Delta Modulator are reset, the Packer FIFO is flushed; all internal logic and INTy are reset when the channel gets disabled
#1 : value2
Channel is enabled
End of enumeration elements list.
ECH4 : Channel 4 Enable
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : value1
Channel is disabled, the output level is passive; the Linear Walker and the Sigma-Delta Modulator are reset, the Packer FIFO is flushed; all internal logic and INTy are reset when the channel gets disabled
#1 : value2
Channel is enabled
End of enumeration elements list.
ECH5 : Channel 5 Enable
bits : 5 - 4 (0 bit)
access : read-write
Enumeration:
#0 : value1
Channel is disabled, the output level is passive; the Linear Walker and the Sigma-Delta Modulator are reset, the Packer FIFO is flushed; all internal logic and INTy are reset when the channel gets disabled
#1 : value2
Channel is enabled
End of enumeration elements list.
ECH6 : Channel 6 Enable
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : value1
Channel is disabled, the output level is passive; the Linear Walker and the Sigma-Delta Modulator are reset, the Packer FIFO is flushed; all internal logic and INTy are reset when the channel gets disabled
#1 : value2
Channel is enabled
End of enumeration elements list.
ECH7 : Channel 7 Enable
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
#0 : value1
Channel is disabled, the output level is passive; the Linear Walker and the Sigma-Delta Modulator are reset, the Packer FIFO is flushed; all internal logic and INTy are reset when the channel gets disabled
#1 : value2
Channel is enabled
End of enumeration elements list.
ECH8 : Channel 8 Enable
bits : 8 - 7 (0 bit)
access : read-write
Enumeration:
#0 : value1
Channel is disabled, the output level is passive; the Linear Walker and the Sigma-Delta Modulator are reset, the Packer FIFO is flushed; all internal logic and INTy are reset when the channel gets disabled
#1 : value2
Channel is enabled
End of enumeration elements list.
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