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ADC2

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x2000 byte (0x0)
mem_usage : registers
protection : not protected

Registers

CTRL_STS

MAX_TIME

CTRL1

CTRL2

CTRL4

SQ1_4

SQ5_8

CAL_CH0_1

CAL_CH2_3

CAL_CH4_5

SQ_FB

CAL_CH6_7

FILTCOEFF0_7

FILT_OUT0

FILT_OUT1

FILT_OUT2

FILT_OUT3

FILT_OUT4

FILT_OUT5

FILT_OUT6

FILT_UP_CTRL

FILT_LO_CTRL

CHx_EIM

TH0_3_LOWER

TH4_7_LOWER

TH0_3_UPPER

TH4_7_UPPER

CNT0_3_LOWER

CNT4_7_LOWER

CNT0_3_UPPER

CNT4_7_UPPER

MMODE0_7

STATUS


CTRL_STS

ADC2 Control and Status Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTRL_STS CTRL_STS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SOS EOC IN_MUX_SEL

SOS : ADC2 Start of Sampling/Conversion (software mode)
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

0b0 : Disable

no conversion is started

0b1 : Enable

conversion is started

End of enumeration elements list.

EOC : ADC2 End of Conversion (software mode)
bits : 3 - 2 (0 bit)
access : read-only

Enumeration:

0b0 : Pending

conversion still running

0b1 : Finished

conversion has finished

End of enumeration elements list.

IN_MUX_SEL : Channel for software mode
bits : 8 - 10 (3 bit)
access : read-write

Enumeration:

0b0000 : CH0_EN

Channel 0 enable

0b0001 : CH1_EN

Channel 1 enable

0b0010 : CH2_EN

Channel 2 enable

0b0011 : CH3_EN

Channel 3 enable

0b0100 : CH4_EN

Channel 4 enable

0b0101 : CH5_EN

Channel 5 enable

0b0110 : CH6_EN

Channel 6 enable

0b0111 : rfu

reserved for future use

0b0111 : rfu

reserved for future use

End of enumeration elements list.


MAX_TIME

Maximum Time for Software Mode
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MAX_TIME MAX_TIME read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MAX_TIME

MAX_TIME : Maximum Time in Software Mode
bits : 0 - 6 (7 bit)
access : read-write

Enumeration:

0x00 : min

Software mode is immediately left

0xFF : max

Software mode is active for 12.75 us

End of enumeration elements list.


CTRL1

Measurement Unit Control Register 1
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTRL1 CTRL1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CALIB_EN_6_0

CALIB_EN_6_0 : Calibration Enable for Channels 6 to 0
bits : 0 - 5 (6 bit)
access : read-only

Enumeration:

0b0000001 : CH0_EN

Channel 0 calibration enable

0b0000010 : CH1_EN

Channel 1 calibration enable

0b0000100 : CH2_EN

Channel 2 calibration enable

0b0001000 : CH3_EN

Channel 3 calibration enable

0b0010000 : CH4_EN

Channel 4 calibration enable

0b0100000 : CH5_EN

Channel 5 calibration enable

0b1000000 : CH6_EN

Channel 6 calibration enable

End of enumeration elements list.


CTRL2

Measurement Unit Control Register 2
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTRL2 CTRL2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MCM_PD_N MCM_RDY SAMPLE_TIME_int

MCM_PD_N : Power Down Signal for MCM
bits : 0 - -1 (0 bit)
access : read-only

Enumeration:

0b0 : MCM Disabled

Measurement Core Module disabled

0b1 : MCM Enabled

Measurement Core Module enabled

End of enumeration elements list.

MCM_RDY : Ready Signal for MCM after Power On or Reset
bits : 7 - 6 (0 bit)
access : read-only

Enumeration:

0b0 : MCM Not Ready

Measurement Core Module in startup phase

0b1 : MCM Ready

Measurement Core Module start-up phase finished

End of enumeration elements list.

SAMPLE_TIME_int : Sample time of ADC2
bits : 8 - 10 (3 bit)
access : read-write

Enumeration:

0x0 : MICLK4

4 MI_CLK clock periods

0x1 : MICLK6

6 MI_CLK clock periods

0x2 : MICLK8

8 MI_CLK clock periods

0x3 : MICLK10

10 MI_CLK clock periods

0x4 : MICLK12

12 MI_CLK clock periods (default)

0x5 : MICLK14

14 MI_CLK clock periods

0x6 : MICLK16

16 MI_CLK clock periods

0x7 : MICLK18

18 MI_CLK clock periods

0x8 : MICLK20

20 MI_CLK clock periods

0x9 : MICLK22

22 MI_CLK clock periods

End of enumeration elements list.


CTRL4

Measurement Unit Control Register 4
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTRL4 CTRL4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FILT_OUT_SEL_6_0

FILT_OUT_SEL_6_0 : Output Filter Selection for Channels 0 to 6
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

0b0000000 : ADC2 Unfiltered Data can be monitored in the corresponding ADC2_FILT_OUTx Registers

.

0b0000001 : Channel 0 IIR Data enabled for ADC2_FILT_OUT0 Register

.

0b0000010 : Channel 1 IIR Data enabled for ADC2_FILT_OUT1 Register

.

0b0000100 : Channel 2 IIR Data enabled for ADC2_FILT_OUT2 Register

.

0b0001000 : Channel 3 IIR Data enabled for ADC2_FILT_OUT3 Register

.

0b0010000 : Channel 4 IIR Data enabled for ADC2_FILT_OUT4 Register

.

0b0100000 : Channel 5 IIR Data enabled for ADC2_FILT_OUT5 Register

.

0b1000000 : Channel 6 IIR Data enabled for ADC2_FILT_OUT6 Register

.

0b1111111 : For Channels 6-0 IIR Data is enabled for ADC2_FILT_OUTx Registers

.

End of enumeration elements list.


SQ1_4

Measurement Channel Enable Bits for Cycle 1-4
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SQ1_4 SQ1_4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SQ1 SQ2 SQ3 SQ4

SQ1 : Sequence 1 channel enable
bits : 0 - 5 (6 bit)
access : read-only

Enumeration:

0b0000001 : CH0_EN

Channel 0 enable

0b0000010 : CH1_EN

Channel 1 enable

0b0000100 : CH2_EN

Channel 2 enable

0b0001000 : CH3_EN

Channel 3 enable

0b0010000 : CH4_EN

Channel 4 enable

0b0100000 : CH5_EN

Channel 5 enable

0b1000000 : CH6_EN

Channel 6 enable

End of enumeration elements list.

SQ2 : Sequence 2 channel enable
bits : 8 - 13 (6 bit)
access : read-only

Enumeration:

0b0000001 : CH0_EN

Channel 0 enable

0b0000010 : CH1_EN

Channel 1 enable

0b0000100 : CH2_EN

Channel 2 enable

0b0001000 : CH3_EN

Channel 3 enable

0b0010000 : CH4_EN

Channel 4 enable

0b0100000 : CH5_EN

Channel 5 enable

0b1000000 : CH6_EN

Channel 6 enable

End of enumeration elements list.

SQ3 : Sequence 3 channel enable
bits : 16 - 21 (6 bit)
access : read-only

Enumeration:

0b0000001 : CH0_EN

Channel 0 enable

0b0000010 : CH1_EN

Channel 1 enable

0b0000100 : CH2_EN

Channel 2 enable

0b0001000 : CH3_EN

Channel 3 enable

0b0010000 : CH4_EN

Channel 4 enable

0b0100000 : CH5_EN

Channel 5 enable

0b1000000 : CH6_EN

Channel 6 enable

End of enumeration elements list.

SQ4 : Sequence 4 channel enable
bits : 24 - 29 (6 bit)
access : read-only

Enumeration:

0b0000001 : CH0_EN

Channel 0 enable

0b0000010 : CH1_EN

Channel 1 enable

0b0000100 : CH2_EN

Channel 2 enable

0b0001000 : CH3_EN

Channel 3 enable

0b0010000 : CH4_EN

Channel 4 enable

0b0100000 : CH5_EN

Channel 5 enable

0b1000000 : CH6_EN

Channel 6 enable

End of enumeration elements list.


SQ5_8

Measurement Channel Enable Bits for Cycle 5 - 8
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SQ5_8 SQ5_8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SQ5 SQ6 SQ7

SQ5 : Sequence 5 channel enable
bits : 0 - 5 (6 bit)
access : read-only

Enumeration:

0b0000001 : CH0_EN

Channel 0 enable

0b0000010 : CH1_EN

Channel 1 enable

0b0000100 : CH2_EN

Channel 2 enable

0b0001000 : CH3_EN

Channel 3 enable

0b0010000 : CH4_EN

Channel 4 enable

0b0100000 : CH5_EN

Channel 5 enable

0b1000000 : CH6_EN

Channel 6 enable

End of enumeration elements list.

SQ6 : Sequence 6 channel enable
bits : 8 - 13 (6 bit)
access : read-only

Enumeration:

0b0000001 : CH0_EN

Channel 0 enable

0b0000010 : CH1_EN

Channel 1 enable

0b0000100 : CH2_EN

Channel 2 enable

0b0001000 : CH3_EN

Channel 3 enable

0b0010000 : CH4_EN

Channel 4 enable

0b0100000 : CH5_EN

Channel 5 enable

0b1000000 : CH6_EN

Channel 6 enable

End of enumeration elements list.

SQ7 : Sequence 7 channel enable
bits : 16 - 21 (6 bit)
access : read-only

Enumeration:

0b0000001 : CH0_EN

Channel 0 enable

0b0000010 : CH1_EN

Channel 1 enable

0b0000100 : CH2_EN

Channel 2 enable

0b0001000 : CH3_EN

Channel 3 enable

0b0010000 : CH4_EN

Channel 4 enable

0b0100000 : CH5_EN

Channel 5 enable

0b1000000 : CH6_EN

Channel 6 enable

End of enumeration elements list.


CAL_CH0_1

Calibration for Channel 0 and 1
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAL_CH0_1 CAL_CH0_1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OFFS_CH0 GAIN_CH0 OFFS_CH1 GAIN_CH1

OFFS_CH0 : Offset Calibration for channel 0
bits : 0 - 3 (4 bit)
access : read-only

GAIN_CH0 : Gain Calibration for channel 0
bits : 8 - 14 (7 bit)
access : read-only

OFFS_CH1 : Offset Calibration for channel 1
bits : 16 - 19 (4 bit)
access : read-only

GAIN_CH1 : Gain Calibration for channel 1
bits : 24 - 30 (7 bit)
access : read-only


CAL_CH2_3

Calibration for Channel 2 and 3
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAL_CH2_3 CAL_CH2_3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OFFS_CH2 GAIN_CH2 OFFS_CH3 GAIN_CH3

OFFS_CH2 : Offset Calibration for channel 2
bits : 0 - 3 (4 bit)
access : read-only

GAIN_CH2 : Gain Calibration for channel 2
bits : 8 - 14 (7 bit)
access : read-only

OFFS_CH3 : Offset Calibration for channel 3
bits : 16 - 19 (4 bit)
access : read-only

GAIN_CH3 : Gain Calibration for channel 3
bits : 24 - 30 (7 bit)
access : read-only


CAL_CH4_5

Calibration for Channel 4 and 5
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAL_CH4_5 CAL_CH4_5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OFFS_CH4 GAIN_CH4 OFFS_CH5 GAIN_CH5

OFFS_CH4 : Offset Calibration for channel 4
bits : 0 - 3 (4 bit)
access : read-only

GAIN_CH4 : Gain Calibration for channel 4
bits : 8 - 14 (7 bit)
access : read-only

OFFS_CH5 : Offset Calibration for channel 5
bits : 16 - 19 (4 bit)
access : read-only

GAIN_CH5 : Gain Calibration for channel 5
bits : 24 - 30 (7 bit)
access : read-only


SQ_FB

Sequencer Feedback Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SQ_FB SQ_FB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SQ_FB SQ_STOP EIM_ACTIVE SQx_STS CHx_STS

SQ_FB : Current Sequence that caused software mode
bits : 0 - 2 (3 bit)
access : read-only

Enumeration:

0b0000 : SQ1

Sequence 1

0b0001 : SQ2

Sequence 2

0b0010 : SQ3

Sequence 3

0b0011 : SQ4

Sequence 4

0b0100 : SQ5

Sequence 5

0b0101 : SQ6

Sequence 6

0b0110 : SQ7

Sequence 7

0b1011 : CH_MASK

Channel Mask = 0

0b1100 : SUSPEND

Debug Suspend Mode

End of enumeration elements list.

SQ_STOP : ADC2 Sequencer Stop Signal for DPP
bits : 8 - 7 (0 bit)
access : read-only

Enumeration:

0b0 : DPP Running

Postprocessing Sequencer in running mode

0b1 : DPP Stopped

Postprocessing Sequencer stopped / Software Mode entered

End of enumeration elements list.

EIM_ACTIVE : ADC2 EIM active
bits : 9 - 8 (0 bit)
access : read-only

Enumeration:

0b0 : not active

EIM not active

0b1 : active

EIM active

End of enumeration elements list.

SQx_STS : Current Active ADC2 Sequence
bits : 11 - 12 (2 bit)
access : read-only

Enumeration:

0b000 : SQ1

Sequence 1 enable

0b001 : SQ2

Sequence 2 enable

0b010 : SQ3

Sequence 3 enable

0b011 : SQ4

Sequence 4 enable

0b100 : SQ5

Sequence 5 enable

0b101 : SQ6

Sequence 6 enable

0b110 : SQ7

Sequence 7 enable

End of enumeration elements list.

CHx_STS : Current ADC2 Channel
bits : 16 - 18 (3 bit)
access : read-only

Enumeration:

0b0000 : CH0

Channel 0 enable

0b0001 : CH1

Channel 1 enable

0b0010 : CH2

Channel 2 enable

0b0011 : CH3

Channel 3 enable

0b0100 : CH4

Channel 4 enable

0b0101 : CH5

Channel 5 enable

0b0110 : CH6

Channel 6 enable

End of enumeration elements list.


CAL_CH6_7

Calibration for Channel 6 and 7
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CAL_CH6_7 CAL_CH6_7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OFFS_CH6 GAIN_CH6

OFFS_CH6 : Offset Calibration for channel 6
bits : 0 - 3 (4 bit)
access : read-only

GAIN_CH6 : Gain Calibration for channel 6
bits : 8 - 14 (7 bit)
access : read-only


FILTCOEFF0_7

Filter Coefficients ADC Channel 0-7
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FILTCOEFF0_7 FILTCOEFF0_7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A_CH0 A_CH1 A_CH2 A_CH3 A_CH4 A_CH5 A_CH6 A_CH7

A_CH0 : Filter Coefficient A for ADC channel 0
bits : 0 - 0 (1 bit)
access : read-only

Enumeration:

0b00 : 1/2

weight of current sample

0b01 : 1/4

weight of current sample

0b10 : 1/8

weight of current sample

0b11 : 1/16

weight of current sample

End of enumeration elements list.

A_CH1 : Filter Coefficient A for ADC channel 1
bits : 2 - 2 (1 bit)
access : read-only

Enumeration:

0b00 : 1/2

weight of current sample

0b01 : 1/4

weight of current sample

0b10 : 1/8

weight of current sample

0b11 : 1/16

weight of current sample

End of enumeration elements list.

A_CH2 : Filter Coefficient A for ADC channel 2
bits : 4 - 4 (1 bit)
access : read-only

Enumeration:

0b00 : 1/2

weight of current sample

0b01 : 1/4

weight of current sample

0b10 : 1/8

weight of current sample

0b11 : 1/16

weight of current sample

End of enumeration elements list.

A_CH3 : Filter Coefficient A for ADC channel 3
bits : 6 - 6 (1 bit)
access : read-only

Enumeration:

0b00 : 1/2

weight of current sample

0b01 : 1/4

weight of current sample

0b10 : 1/8

weight of current sample

0b11 : 1/16

weight of current sample

End of enumeration elements list.

A_CH4 : Filter Coefficient A for ADC channel 4
bits : 8 - 8 (1 bit)
access : read-only

Enumeration:

0b00 : 1/2

weight of current sample

0b01 : 1/4

weight of current sample

0b10 : 1/8

weight of current sample

0b11 : 1/16

weight of current sample

End of enumeration elements list.

A_CH5 : Filter Coefficient A for ADC channel 5
bits : 10 - 10 (1 bit)
access : read-only

Enumeration:

0b00 : 1/2

weight of current sample

0b01 : 1/4

weight of current sample

0b10 : 1/8

weight of current sample

0b11 : 1/16

weight of current sample

End of enumeration elements list.

A_CH6 : Filter Coefficient A for ADC channel 6
bits : 12 - 12 (1 bit)
access : read-only

Enumeration:

0b00 : 1/2

weight of current sample

0b01 : 1/4

weight of current sample

0b10 : 1/8

weight of current sample

0b11 : 1/16

weight of current sample

End of enumeration elements list.

A_CH7 : Filter Coefficient A for ADC channel 7
bits : 14 - 14 (1 bit)
access : read-only

Enumeration:

0b00 : 1/2

weight of current sample

0b01 : 1/4

weight of current sample

0b10 : 1/8

weight of current sample

0b11 : 1/16

weight of current sample

End of enumeration elements list.


FILT_OUT0

ADC or Filter Output Channel 0
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FILT_OUT0 FILT_OUT0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUT_CH0

OUT_CH0 : ADC or filter output value channel 0
bits : 0 - 8 (9 bit)
access : read-only


FILT_OUT1

ADC or Filter Output Channel 1
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FILT_OUT1 FILT_OUT1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUT_CH1

OUT_CH1 : ADC or filter output value channel 1
bits : 0 - 8 (9 bit)
access : read-only


FILT_OUT2

ADC or Filter Output Channel 2
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FILT_OUT2 FILT_OUT2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUT_CH2

OUT_CH2 : ADC or filter output value channel 2
bits : 0 - 8 (9 bit)
access : read-only


FILT_OUT3

ADC or Filter Output Channel 3
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FILT_OUT3 FILT_OUT3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUT_CH3

OUT_CH3 : ADC or filter output value channel 3
bits : 0 - 8 (9 bit)
access : read-only


FILT_OUT4

ADC or Filter Output Channel 4
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FILT_OUT4 FILT_OUT4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUT_CH4

OUT_CH4 : ADC or filter output value channel 4
bits : 0 - 8 (9 bit)
access : read-only


FILT_OUT5

ADC or Filter Output Channel 5
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FILT_OUT5 FILT_OUT5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUT_CH5

OUT_CH5 : ADC or filter output value channel 5
bits : 0 - 8 (9 bit)
access : read-only


FILT_OUT6

ADC or Filter Output Channel 6
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FILT_OUT6 FILT_OUT6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUT_CH6

OUT_CH6 : ADC or filter output value channel 6
bits : 0 - 8 (9 bit)
access : read-only


FILT_UP_CTRL

Upper Threshold Filter Enable
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FILT_UP_CTRL FILT_UP_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UPEN_Ch0 UPEN_Ch1 UPEN_Ch2 UPEN_Ch3 UPEN_Ch4 UPEN_Ch5 UPEN_Ch6

UPEN_Ch0 : Upper threshold IIR filter enable ch 0
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

0b0 : value1

disable

0b1 : value2

enable

End of enumeration elements list.

UPEN_Ch1 : Upper threshold IIR filter enable ch 1
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

0b0 : value1

disable

0b1 : value2

enable

End of enumeration elements list.

UPEN_Ch2 : Upper threshold IIR filter enable ch 2
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

0b0 : value1

disable

0b1 : value2

enable

End of enumeration elements list.

UPEN_Ch3 : Upper threshold IIR filter enable ch 3
bits : 3 - 2 (0 bit)
access : read-write

Enumeration:

0b0 : value1

disable

0b1 : value2

enable

End of enumeration elements list.

UPEN_Ch4 : Upper threshold IIR filter enable ch 4
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

0b0 : value1

disable

0b1 : value2

enable

End of enumeration elements list.

UPEN_Ch5 : Upper threshold IIR filter enable ch 5
bits : 5 - 4 (0 bit)
access : read-write

Enumeration:

0b0 : value1

disable

0b1 : value2

enable

End of enumeration elements list.

UPEN_Ch6 : Upper threshold IIR filter enable ch 6
bits : 6 - 5 (0 bit)
access : read-write

Enumeration:

0b0 : value1

disable

0b1 : value2

enable

End of enumeration elements list.


FILT_LO_CTRL

Lower Threshold Filter Enable
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FILT_LO_CTRL FILT_LO_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LOEN_Ch0 LOEN_Ch1 LOEN_Ch2 LOEN_Ch3 LOEN_Ch4 LOEN_Ch5 LOEN_Ch6

LOEN_Ch0 : Lower threshold IIR filter enable ch 0
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

0b0 : value1

disable

0b1 : value2

enable

End of enumeration elements list.

LOEN_Ch1 : Lower threshold IIR filter enable ch 1
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

0b0 : value1

disable

0b1 : value2

enable

End of enumeration elements list.

LOEN_Ch2 : Lower threshold IIR filter enable ch 2
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

0b0 : value1

disable

0b1 : value2

enable

End of enumeration elements list.

LOEN_Ch3 : Lower threshold IIR filter enable ch 3
bits : 3 - 2 (0 bit)
access : read-write

Enumeration:

0b0 : value1

disable

0b1 : value2

enable

End of enumeration elements list.

LOEN_Ch4 : Lower threshold IIR filter enable ch 4
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

0b0 : value1

disable

0b1 : value2

enable

End of enumeration elements list.

LOEN_Ch5 : Lower threshold IIR filter enable ch 5
bits : 5 - 4 (0 bit)
access : read-write

Enumeration:

0b0 : value1

disable

0b1 : value2

enable

End of enumeration elements list.

LOEN_Ch6 : Lower threshold IIR filter enable ch 6
bits : 6 - 5 (0 bit)
access : read-write

Enumeration:

0b0 : value1

disable

0b1 : value2

enable

End of enumeration elements list.


CHx_EIM

Channel Settings Bits for Exceptional Interrupt Measurement
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CHx_EIM CHx_EIM read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CHx_SEL REP EN SEL

CHx_SEL : Channel set for exceptional interrupt measurement (EIM)
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0b000 : CH0_EN

Channel 0 enable

0b001 : CH1_EN

Channel 1 enable

0b010 : CH2_EN

Channel 2 enable

0b011 : CH3_EN

Channel 3 enable

0b100 : CH4_EN

Channel 4 enable

0b101 : CH5_EN

Channel 5 enable

0b110 : CH6_EN

Channel 6 enable

0b111 : rfu

reserved for future use

End of enumeration elements list.

REP : Repeat count for exceptional interrupt measurement (EIM)
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0b000 : 1

Measurements

0b001 : 2

Measurements

0b010 : 4

Measurements

0b011 : 8

Measurements

0b100 : 16

Measurements

0b101 : 32

Measurements

0b110 : 64

Measurements

0b111 : 128

Measurements

End of enumeration elements list.

EN : Exceptional interrupt measurement (EIM) Trigger Event enable
bits : 11 - 10 (0 bit)
access : read-write

Enumeration:

0b0 : DISABLE

start of EIM disabled

0b1 : ENABLE

start of IEM enabled

End of enumeration elements list.

SEL : Exceptional interrupt measurement (EIM) Trigger select
bits : 12 - 11 (0 bit)
access : read-write

Enumeration:

0b0 : GPT12PISEL.T3_GPT12_SEL

GPT12_PISEL triggers EIM

0b1 : not supported

None

End of enumeration elements list.


TH0_3_LOWER

Lower Comparator Trigger Level Channel 0 -3
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TH0_3_LOWER TH0_3_LOWER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 THLO_CH0 THLO_CH1 THLO_CH2 THLO_CH3

THLO_CH0 : Channel 0 lower trigger level
bits : 0 - 6 (7 bit)
access : read-only

Enumeration:

0x00 : value1

Min. threshold value

0xFF : value2

Max. threshold value

End of enumeration elements list.

THLO_CH1 : Channel 1 lower trigger level
bits : 8 - 14 (7 bit)
access : read-write

Enumeration:

0x00 : value1

Min. threshold value

0xFF : value2

Max. threshold value

End of enumeration elements list.

THLO_CH2 : Channel 2 lower trigger level
bits : 16 - 22 (7 bit)
access : read-only

Enumeration:

0x00 : value1

Min. threshold value

0xFF : value2

Max. threshold value

End of enumeration elements list.

THLO_CH3 : Channel 3 lower trigger level
bits : 24 - 30 (7 bit)
access : read-only

Enumeration:

0x00 : value1

Min. threshold value

0xFF : value2

Max. threshold value

End of enumeration elements list.


TH4_7_LOWER

Lower Comparator Trigger Level Channel 4 to 7
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TH4_7_LOWER TH4_7_LOWER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 THLO_CH4 THLO_CH5 THLO_CH6 THLO_CH7

THLO_CH4 : Channel 4 lower trigger level
bits : 0 - 6 (7 bit)
access : read-only

Enumeration:

0x00 : value1

Min. threshold value

0xFF : value2

Max. threshold value

End of enumeration elements list.

THLO_CH5 : Channel 5 lower trigger level
bits : 8 - 14 (7 bit)
access : read-write

Enumeration:

0x00 : value1

Min. threshold value

0xFF : value2

Max. threshold value

End of enumeration elements list.

THLO_CH6 : Channel 6 lower trigger level
bits : 16 - 22 (7 bit)
access : read-write

Enumeration:

0x00 : value1

Min. threshold value

0xFF : value2

Max. threshold value

End of enumeration elements list.

THLO_CH7 : Channel 7 lower trigger level
bits : 24 - 30 (7 bit)
access : read-write

Enumeration:

0x00 : value1

Min. threshold value

0xFF : value2

Max. threshold value

End of enumeration elements list.


TH0_3_UPPER

Upper Comparator Trigger Level Channel 0-3
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TH0_3_UPPER TH0_3_UPPER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 THUP_CH0 THUP_CH1 THUP_CH2 THUP_CH3

THUP_CH0 : Channel 0 upper trigger level
bits : 0 - 6 (7 bit)
access : read-write

Enumeration:

0x00 : value1

min. threshold value = 0

0xFF : value2

max. threshold value = 255

End of enumeration elements list.

THUP_CH1 : Channel 1 upper trigger level
bits : 8 - 14 (7 bit)
access : read-write

Enumeration:

0x00 : value1

min. threshold value = 0

0xFF : value2

max. threshold value = 255

End of enumeration elements list.

THUP_CH2 : Channel 2 upper trigger level
bits : 16 - 22 (7 bit)
access : read-write

Enumeration:

0x00 : value1

min. threshold value = 0

0xFF : value2

max. threshold value = 255

End of enumeration elements list.

THUP_CH3 : Channel 3 upper trigger level
bits : 24 - 30 (7 bit)
access : read-write

Enumeration:

0x00 : value1

min. threshold value = 0

0xFF : value2

max. threshold value = 255

End of enumeration elements list.


TH4_7_UPPER

Upper Comparator Trigger Level Channel 4 -7
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TH4_7_UPPER TH4_7_UPPER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 THUP_CH4 THUP_CH5 THUP_CH6 THUP_CH7

THUP_CH4 : Channel 4 upper trigger level
bits : 0 - 6 (7 bit)
access : read-only

Enumeration:

0x00 : value1

min. threshold value = 0

0xFF : value2

max. threshold value = 255

End of enumeration elements list.

THUP_CH5 : Channel 5 upper trigger level
bits : 8 - 14 (7 bit)
access : read-only

Enumeration:

0x00 : value1

min. threshold value = 0

0xFF : value2

max. threshold value = 255

End of enumeration elements list.

THUP_CH6 : Channel 6 upper trigger level
bits : 16 - 22 (7 bit)
access : read-only

Enumeration:

0x00 : value1

min threshold value = 0

0xFF : value2

max. threshold value = 255

End of enumeration elements list.

THUP_CH7 : Channel 7 upper trigger level
bits : 24 - 30 (7 bit)
access : read-only

Enumeration:

0x00 : value1

min. threshold value = 0

0xFF : value2

max. threshold value = 255

End of enumeration elements list.


CNT0_3_LOWER

Lower Counter Trigger Level Channel 0 - 3
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CNT0_3_LOWER CNT0_3_LOWER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CNT_LO_CH0 HYST_LO_CH0 CNT_LO_CH1 HYST_LO_CH1 CNT_LO_CH2 HYST_LO_CH2 CNT_LO_CH3 HYST_LO_CH3

CNT_LO_CH0 : Lower timer trigger threshold channel 0
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0x0 : value1

1 measurement

0x1 : value2

2 measurements

0x2 : value3

4 measurements

0x3 : value4

8 measurements

0x4 : value5

16 measurements

0x5 : value6

32 measurements

0x6 : value7

63 measurements

0x7 : value8

63 measurements

End of enumeration elements list.

HYST_LO_CH0 : Channel 0 lower hysteresis
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0x0 : HYSTOFF

hysteresis switched off

0x1 : HYST4

hysteresis = 4

0x2 : HYST8

hysteresis = 8

0x3 : HYST16

hysteresis = 16

End of enumeration elements list.

CNT_LO_CH1 : Lower timer trigger threshold channel 1
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0x0 : value1

1 measurement

0x1 : value2

2 measurements

0x2 : value3

4 measurements

0x3 : value4

8 measurements

0x4 : value5

16 measurements

0x5 : value6

32 measurements

0x6 : value7

63 measurements

0x7 : value8

63 measurements

End of enumeration elements list.

HYST_LO_CH1 : Channel 1 lower hysteresis
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

0x0 : HYSTOFF

hysteresis switched off

0x1 : HYST4

hysteresis = 4

0x2 : HYST8

hysteresis = 8

0x3 : HYST16

hysteresis = 16

End of enumeration elements list.

CNT_LO_CH2 : Lower timer trigger threshold channel 2
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0x0 : value1

1 measurement

0x1 : value2

2 measurements

0x2 : value3

4 measurements

0x3 : value4

8 measurements

0x4 : value5

16 measurements

0x5 : value6

32 measurements

0x6 : value7

63 measurements

0x7 : value8

63 measurements

End of enumeration elements list.

HYST_LO_CH2 : Channel 2 lower hysteresis
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

0x0 : HYSTOFF

hysteresis switched off

0x1 : HYST4

hysteresis = 4

0x2 : HYST8

hysteresis = 8

0x3 : HYST16

hysteresis = 16

End of enumeration elements list.

CNT_LO_CH3 : Lower timer trigger threshold channel 3
bits : 24 - 25 (2 bit)
access : read-write

Enumeration:

0x0 : value1

1 measurement

0x1 : value2

2 measurements

0x2 : value3

4 measurements

0x3 : value4

8 measurements

0x4 : value5

16 measurements

0x5 : value6

32 measurements

0x6 : value7

63 measurements

0x7 : value8

63 measurements

End of enumeration elements list.

HYST_LO_CH3 : Channel 3 lower hysteresis
bits : 27 - 27 (1 bit)
access : read-write

Enumeration:

0x0 : HYSTOFF

hysteresis switched off

0x1 : HYST4

hysteresis = 4

0x2 : HYST8

hysteresis = 8

0x3 : HYST16

hysteresis = 16

End of enumeration elements list.


CNT4_7_LOWER

Lower Counter Trigger Level Channel 4 to 7
address_offset : 0x9C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CNT4_7_LOWER CNT4_7_LOWER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CNT_LO_CH4 HYST_LO_CH4 CNT_LO_CH5 HYST_LO_CH5 CNT_LO_CH6 HYST_LO_CH6 CNT_LO_CH7 HYST_LO_CH7

CNT_LO_CH4 : Lower timer trigger threshold channel 4
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0x0 : value1

1 measurement

0x1 : value2

2 measurements

0x2 : value3

4 measurements

0x3 : value4

8 measurements

0x4 : value5

16 measurements

0x5 : value6

32 measurements

0x6 : value7

63 measurements

0x7 : value8

63 measurements

End of enumeration elements list.

HYST_LO_CH4 : Channel 4 lower hysteresis
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0x0 : HYSTOFF

hysteresis switched off

0x1 : HYST4

hysteresis = 4

0x2 : HYST8

hysteresis = 8

0x3 : HYST16

hysteresis = 16

End of enumeration elements list.

CNT_LO_CH5 : Lower timer trigger threshold channel 5
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0x0 : value1

1 measurement

0x1 : value2

2 measurements

0x2 : value3

4 measurements

0x3 : value4

8 measurements

0x4 : value5

16 measurements

0x5 : value6

32 measurements

0x6 : value7

63 measurements

0x7 : value8

63 measurements

End of enumeration elements list.

HYST_LO_CH5 : Channel 5 lower hysteresis
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

0x0 : HYSTOFF

hysteresis switched off

0x1 : HYST4

hysteresis = 4

0x2 : HYST8

hysteresis = 8

0x3 : HYST16

hysteresis = 16

End of enumeration elements list.

CNT_LO_CH6 : Lower timer trigger threshold channel 6
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0x0 : value1

1 measurement

0x1 : value2

2 measurements

0x2 : value3

4 measurements

0x3 : value4

8 measurements

0x4 : value5

16 measurements

0x5 : value6

32 measurements

0x6 : value7

63 measurements

0x7 : value8

63 measurements

End of enumeration elements list.

HYST_LO_CH6 : Channel 6 lower hysteresis
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

0x0 : HYSTOFF

hysteresis switched off

0x1 : HYST4

hysteresis = 4

0x2 : HYST8

hysteresis = 8

0x3 : HYST16

hysteresis = 16

End of enumeration elements list.

CNT_LO_CH7 : Lower timer trigger threshold channel 6
bits : 24 - 25 (2 bit)
access : read-write

Enumeration:

0x0 : value1

1 measurement

0x1 : value2

2 measurements

0x2 : value3

4 measurements

0x3 : value4

8 measurements

0x4 : value5

16 measurements

0x5 : value6

32 measurements

0x6 : value7

63 measurements

0x7 : value8

63 measurements

End of enumeration elements list.

HYST_LO_CH7 : Channel 6 lower hysteresis
bits : 27 - 27 (1 bit)
access : read-write

Enumeration:

0x0 : HYSTOFF

hysteresis switched off

0x1 : HYST4

hysteresis = 4

0x2 : HYST8

hysteresis = 8

0x3 : HYST16

hysteresis = 16

End of enumeration elements list.


CNT0_3_UPPER

Upper Counter Trigger Level Channel 0 - 3
address_offset : 0xA4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CNT0_3_UPPER CNT0_3_UPPER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CNT_UP_CH0 HYST_UP_CH0 CNT_UP_CH1 HYST_UP_CH1 CNT_UP_CH2 HYST_UP_CH2 CNT_UP_CH3 HYST_UP_CH3

CNT_UP_CH0 : Upper timer trigger threshold channel 0
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0x0 : value1

1 measurement

0x1 : value2

2 measurements

0x2 : value3

4 measurements

0x3 : value4

8 measurements

0x4 : value5

16 measurements

0x5 : value6

32 measurements

0x6 : value7

63 measurements

0x7 : value8

63 measurements

End of enumeration elements list.

HYST_UP_CH0 : Channel 0 upper hysteresis
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0x0 : HYSTOFF

hysteresis switched off

0x1 : HYST4

hysteresis = 4

0x2 : HYST8

hysteresis = 8

0x3 : HYST16

hysteresis = 16

End of enumeration elements list.

CNT_UP_CH1 : Upper timer trigger threshold channel 1
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0x0 : value1

1 measurement

0x1 : value2

2 measurements

0x2 : value3

4 measurements

0x3 : value4

8 measurements

0x4 : value5

16 measurements

0x5 : value6

32 measurements

0x6 : value7

63 measurements

0x7 : value8

63 measurements

End of enumeration elements list.

HYST_UP_CH1 : Channel 1 upper hysteresis
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

0x0 : HYSTOFF

hysteresis switched off

0x1 : HYST4

hysteresis = 4

0x2 : HYST8

hysteresis = 8

0x3 : HYST16

hysteresis = 16

End of enumeration elements list.

CNT_UP_CH2 : Upper timer trigger threshold channel 2
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0x0 : value1

1 measurement

0x1 : value2

2 measurements

0x2 : value3

4 measurements

0x3 : value4

8 measurements

0x4 : value5

16 measurements

0x5 : value6

32 measurements

0x6 : value7

63 measurements

0x7 : value8

63 measurements

End of enumeration elements list.

HYST_UP_CH2 : Channel 2 upper hysteresis
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

0x0 : HYSTOFF

hysteresis switched off

0x1 : HYST4

hysteresis = 4

0x2 : HYST8

hysteresis = 8

0x3 : HYST16

hysteresis = 16

End of enumeration elements list.

CNT_UP_CH3 : Upper timer trigger threshold channel 3
bits : 24 - 25 (2 bit)
access : read-write

Enumeration:

0x0 : value1

1 measurement

0x1 : value2

2 measurements

0x2 : value3

4 measurements

0x3 : value4

8 measurements

0x4 : value5

16 measurements

0x5 : value6

32 measurements

0x6 : value7

63 measurements

0x7 : value8

63 measurements

End of enumeration elements list.

HYST_UP_CH3 : Channel 3 upper hysteresis
bits : 27 - 27 (1 bit)
access : read-write

Enumeration:

0x0 : HYSTOFF

hysteresis switched off

0x1 : HYST4

hysteresis = 4

0x2 : HYST8

hysteresis = 8

0x3 : HYST16

hysteresis = 16

End of enumeration elements list.


CNT4_7_UPPER

Upper Counter Trigger Level Channel 4 to 7
address_offset : 0xA8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CNT4_7_UPPER CNT4_7_UPPER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CNT_UP_CH4 HYST_UP_CH4 CNT_UP_CH5 HYST_UP_CH5 CNT_UP_CH6 HYST_UP_CH6 CNT_UP_CH7 HYST_UP_CH7

CNT_UP_CH4 : Upper timer trigger threshold channel 4
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0x0 : value1

1 measurement

0x1 : value2

2 measurements

0x2 : value3

4 measurements

0x3 : value4

8 measurements

0x4 : value5

16 measurements

0x5 : value6

32 measurements

0x6 : value7

63 measurements

0x7 : value8

63 measurements

End of enumeration elements list.

HYST_UP_CH4 : Channel 4 upper hysteresis
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0x0 : HYSTOFF

hysteresis switched off

0x1 : HYST4

hysteresis = 4

0x2 : HYST8

hysteresis = 8

0x3 : HYST16

hysteresis = 16

End of enumeration elements list.

CNT_UP_CH5 : Upper timer trigger threshold channel 5
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0x0 : value1

1 measurement

0x1 : value2

2 measurements

0x2 : value3

4 measurements

0x3 : value4

8 measurements

0x4 : value5

16 measurements

0x5 : value6

32 measurements

0x6 : value7

63 measurements

0x7 : value8

63 measurements

End of enumeration elements list.

HYST_UP_CH5 : Channel 5 upper hysteresis
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

0x0 : HYSTOFF

hysteresis switched off

0x1 : HYST4

hysteresis = 4

0x2 : HYST8

hysteresis = 8

0x3 : HYST16

hysteresis = 16

End of enumeration elements list.

CNT_UP_CH6 : Upper timer trigger threshold channel 6
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0x0 : value1

1 measurement

0x1 : value2

2 measurements

0x2 : value3

4 measurements

0x3 : value4

8 measurements

0x4 : value5

16 measurements

0x5 : value6

32 measurements

0x6 : value7

63 measurements

0x7 : value8

63 measurements

End of enumeration elements list.

HYST_UP_CH6 : Channel 6 upper hysteresis
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

0x0 : HYSTOFF

hysteresis switched off

0x1 : HYST4

hysteresis = 4

0x2 : HYST8

hysteresis = 8

0x3 : HYST16

hysteresis = 16

End of enumeration elements list.

CNT_UP_CH7 : Upper timer trigger threshold channel 7
bits : 24 - 25 (2 bit)
access : read-write

Enumeration:

0x0 : value1

1 measurement

0x1 : value2

2 measurements

0x2 : value3

4 measurements

0x3 : value4

8 measurements

0x4 : value5

16 measurements

0x5 : value6

32 measurements

0x6 : value7

63 measurements

0x7 : value8

63 measurements

End of enumeration elements list.

HYST_UP_CH7 : Channel 7 upper hysteresis
bits : 27 - 27 (1 bit)
access : read-write

Enumeration:

0x0 : HYSTOFF

hysteresis switched off

0x1 : HYST4

hysteresis = 4

0x2 : HYST8

hysteresis = 8

0x3 : HYST16

hysteresis = 16

End of enumeration elements list.


MMODE0_7

Measurement Mode of Ch 0-7
address_offset : 0xB0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MMODE0_7 MMODE0_7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MSEL_Ch0 MSEL_Ch1 MSEL_Ch2 MSEL_Ch3 MSEL_Ch4 MSEL_Ch5 MSEL_Ch6 MSEL_Ch7

MSEL_Ch0 : Measurement mode ch 0
bits : 0 - 0 (1 bit)
access : read-only

Enumeration:

0b00 : MMODE0

upper and lower voltage/limit measurement

0b01 : MMODEUV

undervoltage/-limit measurement

0b10 : MMODEOV

overvoltage/-limit measurement

End of enumeration elements list.

MSEL_Ch1 : Measurement mode ch 1
bits : 2 - 2 (1 bit)
access : read-only

Enumeration:

0b00 : MMODE0

upper and lower voltage/limit measurement

0b01 : MMODEUV

undervoltage/-limit measurement

0b10 : MMODEOV

overvoltage/-limit measurement

End of enumeration elements list.

MSEL_Ch2 : Measurement mode ch 2
bits : 4 - 4 (1 bit)
access : read-only

Enumeration:

0b00 : MMODE0

upper and lower voltage/limit measurement

0b01 : MMODEUV

undervoltage/-limit measurement

0b10 : MMODEOV

overvoltage/-limit measurement

End of enumeration elements list.

MSEL_Ch3 : Measurement mode ch 3
bits : 6 - 6 (1 bit)
access : read-only

Enumeration:

0b00 : MMODE0

upper and lower voltage/limit measurement

0b01 : MMODEUV

undervoltage/-limit measurement

0b10 : MMODEOV

overvoltage/-limit measurement

End of enumeration elements list.

MSEL_Ch4 : Measurement mode ch 4
bits : 8 - 8 (1 bit)
access : read-only

Enumeration:

0b00 : MMODE0

upper and lower voltage/limit measurement

0b01 : MMODEUV

undervoltage/-limit measurement

0b10 : MMODEOV

overvoltage/-limit measurement

End of enumeration elements list.

MSEL_Ch5 : Measurement mode ch 5
bits : 10 - 10 (1 bit)
access : read-only

Enumeration:

0b00 : MMODE0

upper and lower voltage/limit measurement

0b01 : MMODEUV

undervoltage/-limit measurement

0b10 : MMODEOV

overvoltage/-limit measurement

End of enumeration elements list.

MSEL_Ch6 : Measurement mode ch 6
bits : 12 - 12 (1 bit)
access : read-only

Enumeration:

0b00 : MMODE0

upper and lower voltage/limit measurement

0b01 : MMODEUV

undervoltage/-limit measurement

0b10 : MMODEOV

overvoltage/-limit measurement

End of enumeration elements list.

MSEL_Ch7 : Measurement mode ch 7
bits : 14 - 14 (1 bit)
access : read-only

Enumeration:

0b00 : MMODE0

upper and lower voltage/limit measurement

0b01 : MMODEUV

undervoltage/-limit measurement

0b10 : MMODEOV

overvoltage/-limit measurement

End of enumeration elements list.


STATUS

ADC2 HV Status Register
address_offset : 0xBC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

STATUS STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 READY

READY : HVADC Ready bit
bits : 1 - 0 (0 bit)
access : read-only

Enumeration:

0b0 : Not ready

Module in power down or in init phase

0b1 : Ready

set automatically 5 ADC clock cycles after module is enabled

End of enumeration elements list.



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