Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x200 byte (0x0)
mem_usage : registers
protection : not protected
Gain Control Register 00
address_offset : 0x180 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GAIN0 : Gain Control 0
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
#0000 : value1
Gain factor = 1
#0001 : value2
Gain factor = 3
#0010 : value3
Gain factor = 6
#0011 : value4
Gain factor = 12
End of enumeration elements list.
GAIN1 : Gain Control 1
bits : 4 - 6 (3 bit)
access : read-write
Enumeration:
#0000 : value1
Gain factor = 1
#0001 : value2
Gain factor = 3
#0010 : value3
Gain factor = 6
#0011 : value4
Gain factor = 12
End of enumeration elements list.
GAIN2 : Gain Control 2
bits : 8 - 10 (3 bit)
access : read-write
Enumeration:
#0000 : value1
Gain factor = 1
#0001 : value2
Gain factor = 3
#0010 : value3
Gain factor = 6
#0011 : value4
Gain factor = 12
End of enumeration elements list.
GAIN3 : Gain Control 3
bits : 12 - 14 (3 bit)
access : read-write
Enumeration:
#0000 : value1
Gain factor = 1
#0001 : value2
Gain factor = 3
#0010 : value3
Gain factor = 6
#0011 : value4
Gain factor = 12
End of enumeration elements list.
GAIN4 : Gain Control 4
bits : 16 - 18 (3 bit)
access : read-write
Enumeration:
#0000 : value1
Gain factor = 1
#0001 : value2
Gain factor = 3
#0010 : value3
Gain factor = 6
#0011 : value4
Gain factor = 12
End of enumeration elements list.
GAIN5 : Gain Control 5
bits : 20 - 22 (3 bit)
access : read-write
Enumeration:
#0000 : value1
Gain factor = 1
#0001 : value2
Gain factor = 3
#0010 : value3
Gain factor = 6
#0011 : value4
Gain factor = 12
End of enumeration elements list.
GAIN6 : Gain Control 6
bits : 24 - 26 (3 bit)
access : read-write
Enumeration:
#0000 : value1
Gain factor = 1
#0001 : value2
Gain factor = 3
#0010 : value3
Gain factor = 6
#0011 : value4
Gain factor = 12
End of enumeration elements list.
GAIN7 : Gain Control 7
bits : 28 - 30 (3 bit)
access : read-write
Enumeration:
#0000 : value1
Gain factor = 1
#0001 : value2
Gain factor = 3
#0010 : value3
Gain factor = 6
#0011 : value4
Gain factor = 12
End of enumeration elements list.
Gain Control Register 10
address_offset : 0x190 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GAIN0 : Gain Control 0
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
#0000 : value1
Gain factor = 1
#0001 : value2
Gain factor = 3
#0010 : value3
Gain factor = 6
#0011 : value4
Gain factor = 12
End of enumeration elements list.
GAIN1 : Gain Control 1
bits : 4 - 6 (3 bit)
access : read-write
Enumeration:
#0000 : value1
Gain factor = 1
#0001 : value2
Gain factor = 3
#0010 : value3
Gain factor = 6
#0011 : value4
Gain factor = 12
End of enumeration elements list.
GAIN2 : Gain Control 2
bits : 8 - 10 (3 bit)
access : read-write
Enumeration:
#0000 : value1
Gain factor = 1
#0001 : value2
Gain factor = 3
#0010 : value3
Gain factor = 6
#0011 : value4
Gain factor = 12
End of enumeration elements list.
GAIN3 : Gain Control 3
bits : 12 - 14 (3 bit)
access : read-write
Enumeration:
#0000 : value1
Gain factor = 1
#0001 : value2
Gain factor = 3
#0010 : value3
Gain factor = 6
#0011 : value4
Gain factor = 12
End of enumeration elements list.
GAIN4 : Gain Control 4
bits : 16 - 18 (3 bit)
access : read-write
Enumeration:
#0000 : value1
Gain factor = 1
#0001 : value2
Gain factor = 3
#0010 : value3
Gain factor = 6
#0011 : value4
Gain factor = 12
End of enumeration elements list.
GAIN5 : Gain Control 5
bits : 20 - 22 (3 bit)
access : read-write
Enumeration:
#0000 : value1
Gain factor = 1
#0001 : value2
Gain factor = 3
#0010 : value3
Gain factor = 6
#0011 : value4
Gain factor = 12
End of enumeration elements list.
GAIN6 : Gain Control 6
bits : 24 - 26 (3 bit)
access : read-write
Enumeration:
#0000 : value1
Gain factor = 1
#0001 : value2
Gain factor = 3
#0010 : value3
Gain factor = 6
#0011 : value4
Gain factor = 12
End of enumeration elements list.
GAIN7 : Gain Control 7
bits : 28 - 30 (3 bit)
access : read-write
Enumeration:
#0000 : value1
Gain factor = 1
#0001 : value2
Gain factor = 3
#0010 : value3
Gain factor = 6
#0011 : value4
Gain factor = 12
End of enumeration elements list.
SHS Configuration Register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DIVS : Divider Factor for the SHS Clock
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
#0000 : value1
fSH = fCONV / 1
#0001 : value2
fSH = fCONV / 2
#1111 : value3
fSH = fCONV / 16
End of enumeration elements list.
AREF : Analog Reference Voltage Selection
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#00 : value1
External reference, upper supply range
#10 : value3
Internal reference, upper supply range
#11 : value4
Internal reference, lower supply range
End of enumeration elements list.
ANOFF : Analog Converter Power Down Force
bits : 12 - 11 (0 bit)
access : read-write
Enumeration:
#0 : value1
Converter controlled by bitfields ANONS (digital control block)
#1 : value2
Converter is permanently off
End of enumeration elements list.
ANRDY : Analog Converter Ready
bits : 14 - 13 (0 bit)
access : read-only
Enumeration:
#0 : value1
Converter is in power-down mode
#1 : value2
Converter is operable
End of enumeration elements list.
SCWC : Write Control for SHS Configuration
bits : 15 - 14 (0 bit)
access : write-only
Enumeration:
#0 : value1
No write access to SHS configuration
#1 : value2
Bitfields ANOFF, AREF, DIVS can be written
End of enumeration elements list.
SP0 : Sample Pending on S&H Unit x
bits : 16 - 15 (0 bit)
access : read-only
Enumeration:
#0 : value1
No sample pending
#1 : value2
S&H unit x has finished the sample phase
End of enumeration elements list.
SP1 : Sample Pending on S&H Unit x
bits : 17 - 16 (0 bit)
access : read-only
Enumeration:
#0 : value1
No sample pending
#1 : value2
S&H unit x has finished the sample phase
End of enumeration elements list.
TC : Test Control
bits : 24 - 26 (3 bit)
access : read-write
Enumeration:
#1011 : value1
Internal test functions enabled
End of enumeration elements list.
STATE : Current State of Sequencer
bits : 28 - 30 (3 bit)
access : read-only
Enumeration:
#0000 : value1
Idle
#0001 : value2
Offset calibration active
#0010 : value3
Gain calibration active
#0011 : value4
Startup calibration active
#1000 : value5
Stepper process active for S&H unit 0
#1001 : value6
Stepper process active for S&H unit 1
End of enumeration elements list.
Stepper Configuration Register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KSEL0 : Kernel Select
bits : 0 - 1 (2 bit)
access : read-write
SEN0 : Step x Enable
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
#0 : value1
Off: This step is not part of the stepper sequence
#1 : value2
Active: This step is executed during the sequence
End of enumeration elements list.
KSEL1 : Kernel Select
bits : 4 - 5 (2 bit)
access : read-write
SEN1 : Step x Enable
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
#0 : value1
Off: This step is not part of the stepper sequence
#1 : value2
Active: This step is executed during the sequence
End of enumeration elements list.
KSEL2 : Kernel Select
bits : 8 - 9 (2 bit)
access : read-write
SEN2 : Step x Enable
bits : 11 - 10 (0 bit)
access : read-write
Enumeration:
#0 : value1
Off: This step is not part of the stepper sequence
#1 : value2
Active: This step is executed during the sequence
End of enumeration elements list.
KSEL3 : Kernel Select
bits : 12 - 13 (2 bit)
access : read-write
SEN3 : Step x Enable
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
#0 : value1
Off: This step is not part of the stepper sequence
#1 : value2
Active: This step is executed during the sequence
End of enumeration elements list.
KSEL4 : Kernel Select
bits : 16 - 17 (2 bit)
access : read-write
SEN4 : Step x Enable
bits : 19 - 18 (0 bit)
access : read-write
Enumeration:
#0 : value1
Off: This step is not part of the stepper sequence
#1 : value2
Active: This step is executed during the sequence
End of enumeration elements list.
KSEL5 : Kernel Select
bits : 20 - 21 (2 bit)
access : read-write
SEN5 : Step x Enable
bits : 23 - 22 (0 bit)
access : read-write
Enumeration:
#0 : value1
Off: This step is not part of the stepper sequence
#1 : value2
Active: This step is executed during the sequence
End of enumeration elements list.
KSEL6 : Kernel Select
bits : 24 - 25 (2 bit)
access : read-write
SEN6 : Step x Enable
bits : 27 - 26 (0 bit)
access : read-write
Enumeration:
#0 : value1
Off: This step is not part of the stepper sequence
#1 : value2
Active: This step is executed during the sequence
End of enumeration elements list.
KSEL7 : Kernel Select
bits : 28 - 29 (2 bit)
access : read-write
SEN7 : Step x Enable
bits : 31 - 30 (0 bit)
access : read-write
Enumeration:
#0 : value1
Off: This step is not part of the stepper sequence
#1 : value2
Active: This step is executed during the sequence
End of enumeration elements list.
Loop Control Register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LPCH0 : Loop y Channel
bits : 0 - 3 (4 bit)
access : read-write
LPSH0 : Loop y Sample&Hold Unit
bits : 8 - 7 (0 bit)
access : read-write
LPEN0 : Loop y Enable
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
0x0 : value1
Off: standard operation
0x1 : value2
ON: sigma-delta-loop is active
End of enumeration elements list.
LPCH1 : Loop y Channel
bits : 16 - 19 (4 bit)
access : read-write
LPSH1 : Loop y Sample&Hold Unit
bits : 24 - 23 (0 bit)
access : read-write
LPEN1 : Loop y Enable
bits : 31 - 30 (0 bit)
access : read-write
Enumeration:
0x0 : value1
Off: standard operation
0x1 : value2
ON: sigma-delta-loop is active
End of enumeration elements list.
Module Identification Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MOD_REV : Module Revision
bits : 0 - 6 (7 bit)
access : read-only
MOD_TYPE : Module Type
bits : 8 - 14 (7 bit)
access : read-only
MOD_NUMBER : Module Number
bits : 16 - 30 (15 bit)
access : read-only
Timing Configuration Register 0
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AT : Accelerated Timing
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : value1
Compatible timing: Result available after standard conversion time
#1 : value2
Accelerated timing: Result available as soon as converted
End of enumeration elements list.
FCRT : Fast Compare Mode Response Time
bits : 4 - 6 (3 bit)
access : read-write
Enumeration:
0x0 : value1
Result after tADCI * 2
0xF : value2
Result after tADCI * 32
End of enumeration elements list.
SST : Short Sample Time
bits : 8 - 12 (5 bit)
access : read-write
Enumeration:
0x00 : value1
Compatible timing: Sample time is defined by DIVA and STC.
0x01 : value2
Sample time is tADC * 1
0x3F : value3
Sample time is tADC * 63
End of enumeration elements list.
TGEN : Timing Generator
bits : 16 - 28 (13 bit)
access : read-only
Timing Configuration Register 1
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AT : Accelerated Timing
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : value1
Compatible timing: Result available after standard conversion time
#1 : value2
Accelerated timing: Result available as soon as converted
End of enumeration elements list.
FCRT : Fast Compare Mode Response Time
bits : 4 - 6 (3 bit)
access : read-write
Enumeration:
0x0 : value1
Result after tADCI * 2
0xF : value2
Result after tADCI * 32
End of enumeration elements list.
SST : Short Sample Time
bits : 8 - 12 (5 bit)
access : read-write
Enumeration:
0x00 : value1
Compatible timing: Sample time is defined by DIVA and STC.
0x01 : value2
Sample time is tADC * 1
0x3F : value3
Sample time is tADC * 63
End of enumeration elements list.
TGEN : Timing Generator
bits : 16 - 28 (13 bit)
access : read-only
Calibration Control Register
address_offset : 0xBC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CALORD : Calibration Order
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : value1
Do conversions then calibration
#1 : value2
Do calibration then conversions
End of enumeration elements list.
CALGNSTC : Gain Calibration Sample Time Control
bits : 8 - 12 (5 bit)
access : read-write
SUCALVAL : Startup Calibration Cycles
bits : 16 - 21 (6 bit)
access : read-write
CALMAX : Calibration Maximum Timing
bits : 24 - 28 (5 bit)
access : read-write
SUCAL : Start-Up Calibration
bits : 31 - 30 (0 bit)
access : write-only
Enumeration:
#0 : value1
No action
#1 : value2
Initiate the start-up calibration phase (indication in bitfield SHSCFG.STATE)
End of enumeration elements list.
Gain Calibration Control Register 0
address_offset : 0xC0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CALGNVALS : Gain Calibration Value, Standard Reference
bits : 0 - 12 (13 bit)
access : read-write
GNSWC : Gain Calibration Write Control, Standard
bits : 15 - 14 (0 bit)
access : write-only
Enumeration:
#0 : value1
No write access to gain calibration parameter
#1 : value2
CALGNVALS can be written
End of enumeration elements list.
CALGNVALA : Gain Calibration Value, Alternate Reference
bits : 16 - 28 (13 bit)
access : read-write
GNAWC : Gain Calibration Write Control, Alternate
bits : 31 - 30 (0 bit)
access : write-only
Enumeration:
#0 : value1
No write access to gain calibration parameter
#1 : value2
CALGNVALA can be written
End of enumeration elements list.
Gain Calibration Control Register 1
address_offset : 0xC4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CALGNVALS : Gain Calibration Value, Standard Reference
bits : 0 - 12 (13 bit)
access : read-write
GNSWC : Gain Calibration Write Control, Standard
bits : 15 - 14 (0 bit)
access : write-only
Enumeration:
#0 : value1
No write access to gain calibration parameter
#1 : value2
CALGNVALS can be written
End of enumeration elements list.
CALGNVALA : Gain Calibration Value, Alternate Reference
bits : 16 - 28 (13 bit)
access : read-write
GNAWC : Gain Calibration Write Control, Alternate
bits : 31 - 30 (0 bit)
access : write-only
Enumeration:
#0 : value1
No write access to gain calibration parameter
#1 : value2
CALGNVALA can be written
End of enumeration elements list.
Offset Calibration Control Register 0
address_offset : 0xE0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CALOFFVAL0 : Offset Calibration Value for Gain Level z
bits : 0 - 5 (6 bit)
access : read-write
CALOFFVAL1 : Offset Calibration Value for Gain Level z
bits : 8 - 13 (6 bit)
access : read-write
OFFWC : Offset Calibration Write Control
bits : 15 - 14 (0 bit)
access : write-only
Enumeration:
#0 : value1
No write access to offset cal. parameters
#1 : value2
CALOFFVALz can be written
End of enumeration elements list.
CALOFFVAL2 : Offset Calibration Value for Gain Level z
bits : 16 - 21 (6 bit)
access : read-write
CALOFFVAL3 : Offset Calibration Value for Gain Level z
bits : 24 - 29 (6 bit)
access : read-write
DISCAL : Disable Calibration
bits : 31 - 30 (0 bit)
access : read-write
Enumeration:
#0 : value1
Calibration enabled (offset and gain)
#1 : value2
No calibration
End of enumeration elements list.
Offset Calibration Control Register 1
address_offset : 0xE4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CALOFFVAL0 : Offset Calibration Value for Gain Level z
bits : 0 - 5 (6 bit)
access : read-write
CALOFFVAL1 : Offset Calibration Value for Gain Level z
bits : 8 - 13 (6 bit)
access : read-write
OFFWC : Offset Calibration Write Control
bits : 15 - 14 (0 bit)
access : write-only
Enumeration:
#0 : value1
No write access to offset cal. parameters
#1 : value2
CALOFFVALz can be written
End of enumeration elements list.
CALOFFVAL2 : Offset Calibration Value for Gain Level z
bits : 16 - 21 (6 bit)
access : read-write
CALOFFVAL3 : Offset Calibration Value for Gain Level z
bits : 24 - 29 (6 bit)
access : read-write
DISCAL : Disable Calibration
bits : 31 - 30 (0 bit)
access : read-write
Enumeration:
#0 : value1
Calibration enabled (offset and gain)
#1 : value2
No calibration
End of enumeration elements list.
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