\n
address_offset : 0x0 Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection : not protected
Channel Intensit0 Shadow
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TCHINT : Target Channel Intensity
bits : 0 - 10 (11 bit)
access : read-write
Packer Counter
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OFFCNTVAL : Off-Time Counter Value
bits : 0 - 6 (7 bit)
access : read-write
ONCNTVAL : On-Time Counter Value
bits : 16 - 22 (7 bit)
access : read-write
Channel Intensit0
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CHINT : Channel Intensity
bits : 0 - 10 (11 bit)
access : read-only
Channel Configuration
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PKTH : Packer Threshold
bits : 0 - 1 (2 bit)
access : read-write
PEN : Packer Enable
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
#0 : value1
The packer is not used
#1 : value2
On-time and off-time counters are running and the packed output bitstream with the packer trigger are generated.
End of enumeration elements list.
DSEL : Dimming Select
bits : 4 - 5 (2 bit)
access : read-write
Enumeration:
#000 : value1
Dimming Engine 0
#001 : value2
Dimming Engine 1
#010 : value3
Dimming Engine 2
#111 : value8
Global Dimming Level
End of enumeration elements list.
DBP : Dimming Input Bypass
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
#0 : value1
Channel brightness is the product of the selected dimming input and the channel intensity
#1 : value2
No dimming input is used, channel brightness is only determined by the channel intensity level
End of enumeration elements list.
GEN : Gating Enable
bits : 8 - 7 (0 bit)
access : read-write
Enumeration:
#0 : value1
Gating function is disabled, the input signal (BCCU.INy) has no effect
#1 : value2
Gating function is enabled, the output gating signal is BCCU.INy
End of enumeration elements list.
WEN : Flicker Watchdog Enable
bits : 9 - 8 (0 bit)
access : read-write
Enumeration:
#0 : value1
The flicker watchdog is not used
#1 : value2
The flicker watchdog is active and limits the number of consecutive zeroes at the sigma-delta modulator output according to GLOBCON.WDMBN
End of enumeration elements list.
TRED : Trigger Edge
bits : 10 - 9 (0 bit)
access : read-write
Enumeration:
#0 : value1
Channel triggers occur on channel output transition from passive to active level
#1 : value2
Channel triggers occur on channel output transition from active to passive level
End of enumeration elements list.
ENFT : Forced Trigger Enable
bits : 11 - 10 (0 bit)
access : read-write
Enumeration:
#0 : value1
No forced trigger is generated
#1 : value2
The trigger generator generates a trigger if the output of the sigma-delta modulator hasn't changed state for 256 bit times; only takes effect if the packer is disabled (PEN=0)
End of enumeration elements list.
LINPRES : Linear Walker Clock Prescaler
bits : 16 - 24 (9 bit)
access : read-write
Packer Compare
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OFFCMP : Packer Off-Time Compare Level
bits : 0 - 6 (7 bit)
access : read-write
ONCMP : Packer On-Time Compare Level
bits : 16 - 22 (7 bit)
access : read-write
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