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USB

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection : not protected

Registers

DIEPCTL_ISOCONT

DIEPCTL_INTBULK

DIEPTSIZ

DIEPDMA

DTXFSTS

DIEPDMAB

DOEPCTL_ISOCONT

DOEPCTL_INTBULK

DOEPINT

DOEPTSIZ_ISO

DOEPTSIZ_CONTROL

DOEPDMA

DOEPDMAB

DIEPINT


DIEPCTL_ISOCONT

Device Endpoint Control Register [ISOCONT]
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEPCTL_ISOCONT DIEPCTL_ISOCONT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MPS USBActEP EO_FrNum NAKSts EPType Snp Stall TxFNum CNAK SNAK SetEvenFr SetOddFr EPDis EPEna

MPS : Maximum Packet Size
bits : 0 - 9 (10 bit)
access : read-write

USBActEP : USB Active Endpoint
bits : 15 - 14 (0 bit)
access : read-write

EO_FrNum : Even/Odd Frame
bits : 16 - 15 (0 bit)
access : read-only

Enumeration:

#0 : value1

Even frame

#1 : value2

Odd rame

End of enumeration elements list.

NAKSts : NAK Status
bits : 17 - 16 (0 bit)
access : read-only

Enumeration:

#0 : value1

The core is transmitting non-NAK handshakes based on the FIFO status.

#1 : value2

The core is transmitting NAK handshakes on this endpoint.

End of enumeration elements list.

EPType : Endpoint Type
bits : 18 - 18 (1 bit)
access : read-write

Enumeration:

#00 : value1

Control

#01 : value2

Isochronous

#10 : value3

Bulk

#11 : value4

Interrupt

End of enumeration elements list.

Snp : Snoop Mode
bits : 20 - 19 (0 bit)
access : read-write

Stall : STALL Handshake
bits : 21 - 20 (0 bit)
access : read-write

TxFNum : TxFIFO Number
bits : 22 - 24 (3 bit)
access : read-write

CNAK : Clear NAK
bits : 26 - 25 (0 bit)
access : write-only

SNAK : Set NAK
bits : 27 - 26 (0 bit)
access : write-only

SetEvenFr : In non-Scatter/Gather DMA mode: Set Even frame
bits : 28 - 27 (0 bit)
access : write-only

SetOddFr : Set Odd frame
bits : 29 - 28 (0 bit)
access : write-only

EPDis : Endpoint Disable
bits : 30 - 29 (0 bit)
access : read-write

EPEna : Endpoint Enable
bits : 31 - 30 (0 bit)
access : read-write


DIEPCTL_INTBULK

Device Endpoint Control Register [INTBULK]
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : DIEPCTL_ISOCONT
reset_Mask : 0x0

DIEPCTL_INTBULK DIEPCTL_INTBULK read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MPS USBActEP DPID NAKSts EPType Snp Stall TxFNum CNAK SNAK SetD0PID SetD1PID EPDis EPEna

MPS : Maximum Packet Size
bits : 0 - 9 (10 bit)
access : read-write

USBActEP : USB Active Endpoint
bits : 15 - 14 (0 bit)
access : read-write

DPID : Endpoint Data PID
bits : 16 - 15 (0 bit)
access : read-only

Enumeration:

#0 : value1

DATA0

#1 : value2

DATA1

End of enumeration elements list.

NAKSts : NAK Status
bits : 17 - 16 (0 bit)
access : read-only

Enumeration:

#0 : value1

The core is transmitting non-NAK handshakes based on the FIFO status.

#1 : value2

The core is transmitting NAK handshakes on this endpoint.

End of enumeration elements list.

EPType : Endpoint Type
bits : 18 - 18 (1 bit)
access : read-write

Enumeration:

#00 : value1

Control

#01 : value2

Isochronous

#10 : value3

Bulk

#11 : value4

Interrupt

End of enumeration elements list.

Snp : Snoop Mode
bits : 20 - 19 (0 bit)
access : read-write

Stall : STALL Handshake
bits : 21 - 20 (0 bit)
access : read-write

TxFNum : TxFIFO Number
bits : 22 - 24 (3 bit)
access : read-write

CNAK : Clear NAK
bits : 26 - 25 (0 bit)
access : write-only

SNAK : Set NAK
bits : 27 - 26 (0 bit)
access : write-only

SetD0PID : Set DATA0 PID
bits : 28 - 27 (0 bit)
access : write-only

SetD1PID : 29 Set DATA1 PID
bits : 29 - 28 (0 bit)
access : write-only

EPDis : Endpoint Disable
bits : 30 - 29 (0 bit)
access : read-write

EPEna : Endpoint Enable
bits : 31 - 30 (0 bit)
access : read-write


DIEPTSIZ

Device Endpoint Transfer Size Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEPTSIZ DIEPTSIZ read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 XferSize PktCnt

XferSize : Transfer Size
bits : 0 - 17 (18 bit)
access : read-write

PktCnt : Packet Count
bits : 19 - 27 (9 bit)
access : read-write


DIEPDMA

Device Endpoint DMA Address Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEPDMA DIEPDMA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DMAAddr

DMAAddr : DMA Address
bits : 0 - 30 (31 bit)
access : read-write


DTXFSTS

Device IN Endpoint Transmit FIFO Status Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DTXFSTS DTXFSTS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INEPTxFSpcAvail

INEPTxFSpcAvail : IN Endpoint TxFIFO Space Avail
bits : 0 - 14 (15 bit)
access : read-only

Enumeration:

0x0 : value1

Endpoint TxFIFO is full

0x1 : value2

1 word available

0x2 : value3

2 words available

End of enumeration elements list.


DIEPDMAB

Device Endpoint DMA Buffer Address Register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEPDMAB DIEPDMAB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DMABufferAddr

DMABufferAddr : DMA Buffer Address
bits : 0 - 30 (31 bit)
access : read-only


DOEPCTL_ISOCONT

Device Endpoint Control Register [ISOCONT]
address_offset : 0x200 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOEPCTL_ISOCONT DOEPCTL_ISOCONT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MPS USBActEP EO_FrNum NAKSts EPType Snp Stall TxFNum CNAK SNAK SetEvenFr SetOddFr EPDis EPEna

MPS : Maximum Packet Size
bits : 0 - 9 (10 bit)
access : read-write

USBActEP : USB Active Endpoint
bits : 15 - 14 (0 bit)
access : read-write

EO_FrNum : Even/Odd Frame
bits : 16 - 15 (0 bit)
access : read-only

Enumeration:

#0 : value1

Even frame

#1 : value2

Odd rame

End of enumeration elements list.

NAKSts : NAK Status
bits : 17 - 16 (0 bit)
access : read-only

Enumeration:

#0 : value1

The core is transmitting non-NAK handshakes based on the FIFO status.

#1 : value2

The core is transmitting NAK handshakes on this endpoint.

End of enumeration elements list.

EPType : Endpoint Type
bits : 18 - 18 (1 bit)
access : read-write

Enumeration:

#00 : value1

Control

#01 : value2

Isochronous

#10 : value3

Bulk

#11 : value4

Interrupt

End of enumeration elements list.

Snp : Snoop Mode
bits : 20 - 19 (0 bit)
access : read-write

Stall : STALL Handshake
bits : 21 - 20 (0 bit)
access : read-write

TxFNum : TxFIFO Number
bits : 22 - 24 (3 bit)
access : read-write

CNAK : Clear NAK
bits : 26 - 25 (0 bit)
access : write-only

SNAK : Set NAK
bits : 27 - 26 (0 bit)
access : write-only

SetEvenFr : In non-Scatter/Gather DMA mode: Set Even frame
bits : 28 - 27 (0 bit)
access : write-only

SetOddFr : Set Odd frame
bits : 29 - 28 (0 bit)
access : write-only

EPDis : Endpoint Disable
bits : 30 - 29 (0 bit)
access : read-write

EPEna : Endpoint Enable
bits : 31 - 30 (0 bit)
access : read-write


DOEPCTL_INTBULK

Device Endpoint Control Register [INTBULK]
address_offset : 0x200 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : DOEPCTL_ISOCONT
reset_Mask : 0x0

DOEPCTL_INTBULK DOEPCTL_INTBULK read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MPS USBActEP DPID NAKSts EPType Snp Stall TxFNum CNAK SNAK SetD0PID SetD1PID EPDis EPEna

MPS : Maximum Packet Size
bits : 0 - 9 (10 bit)
access : read-write

USBActEP : USB Active Endpoint
bits : 15 - 14 (0 bit)
access : read-write

DPID : Endpoint Data PID
bits : 16 - 15 (0 bit)
access : read-only

Enumeration:

#0 : value1

DATA0

#1 : value2

DATA1

End of enumeration elements list.

NAKSts : NAK Status
bits : 17 - 16 (0 bit)
access : read-only

Enumeration:

#0 : value1

The core is transmitting non-NAK handshakes based on the FIFO status.

#1 : value2

The core is transmitting NAK handshakes on this endpoint.

End of enumeration elements list.

EPType : Endpoint Type
bits : 18 - 18 (1 bit)
access : read-write

Enumeration:

#00 : value1

Control

#01 : value2

Isochronous

#10 : value3

Bulk

#11 : value4

Interrupt

End of enumeration elements list.

Snp : Snoop Mode
bits : 20 - 19 (0 bit)
access : read-write

Stall : STALL Handshake
bits : 21 - 20 (0 bit)
access : read-write

TxFNum : TxFIFO Number
bits : 22 - 24 (3 bit)
access : read-write

CNAK : Clear NAK
bits : 26 - 25 (0 bit)
access : write-only

SNAK : Set NAK
bits : 27 - 26 (0 bit)
access : write-only

SetD0PID : Set DATA0 PID
bits : 28 - 27 (0 bit)
access : write-only

SetD1PID : 29 Set DATA1 PID
bits : 29 - 28 (0 bit)
access : write-only

EPDis : Endpoint Disable
bits : 30 - 29 (0 bit)
access : read-write

EPEna : Endpoint Enable
bits : 31 - 30 (0 bit)
access : read-write


DOEPINT

Device Endpoint Interrupt Register
address_offset : 0x208 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOEPINT DOEPINT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 XferCompl EPDisbld AHBErr SetUp OUTTknEPdis StsPhseRcvd Back2BackSETup BNAIntr PktDrpSts BbleErrIntrpt NAKIntrpt NYETIntrpt

XferCompl : Transfer Completed Interrupt
bits : 0 - -1 (0 bit)
access : read-write

EPDisbld : Endpoint Disabled Interrupt
bits : 1 - 0 (0 bit)
access : read-write

AHBErr : AHB Error
bits : 2 - 1 (0 bit)
access : read-write

SetUp : SETUP Phase Done
bits : 3 - 2 (0 bit)
access : read-write

OUTTknEPdis : OUT Token Received When Endpoint Disabled
bits : 4 - 3 (0 bit)
access : read-write

StsPhseRcvd : Status Phase Received For Control Write
bits : 5 - 4 (0 bit)
access : read-write

Back2BackSETup : Back-to-Back SETUP Packets Received
bits : 6 - 5 (0 bit)
access : read-write

BNAIntr : BNA (Buffer Not Available) Interrupt
bits : 9 - 8 (0 bit)
access : read-write

PktDrpSts : Packet Dropped Status
bits : 11 - 10 (0 bit)
access : read-write

BbleErrIntrpt : BbleErr (Babble Error) interrupt
bits : 12 - 11 (0 bit)
access : read-write

NAKIntrpt : NAK interrupt
bits : 13 - 12 (0 bit)
access : read-write

NYETIntrpt : NYET interrupt
bits : 14 - 13 (0 bit)
access : read-write


DOEPTSIZ_ISO

Device Endpoint Transfer Size Register [ISO]
address_offset : 0x210 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOEPTSIZ_ISO DOEPTSIZ_ISO read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 XferSize PktCnt RxDPID

XferSize : Transfer Size
bits : 0 - 17 (18 bit)
access : read-write

PktCnt : Packet Count
bits : 19 - 27 (9 bit)
access : read-write

RxDPID : Received Data PID
bits : 29 - 29 (1 bit)
access : read-only

Enumeration:

#00 : value1

DATA0

#01 : value2

DATA2

#10 : value3

DATA1

#11 : value4

MDATA

End of enumeration elements list.


DOEPTSIZ_CONTROL

Device Endpoint Transfer Size Register [CONT]
address_offset : 0x210 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : DOEPTSIZ_ISO
reset_Mask : 0x0

DOEPTSIZ_CONTROL DOEPTSIZ_CONTROL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 XferSize PktCnt SUPCnt

XferSize : Transfer Size
bits : 0 - 17 (18 bit)
access : read-write

PktCnt : Packet Count
bits : 19 - 27 (9 bit)
access : read-write

SUPCnt : SETUP Packet Count: 0b00=1 packet, 0b00=2 packets, 0b00=3 packets,
bits : 29 - 29 (1 bit)
access : read-write


DOEPDMA

Device Endpoint DMA Address Register
address_offset : 0x214 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOEPDMA DOEPDMA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DMAAddr

DMAAddr : DMA Address
bits : 0 - 30 (31 bit)
access : read-write


DOEPDMAB

Device Endpoint DMA Buffer Address Register
address_offset : 0x21C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DOEPDMAB DOEPDMAB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DMABufferAddr

DMABufferAddr : DMA Buffer Address
bits : 0 - 30 (31 bit)
access : read-only


DIEPINT

Device Endpoint Interrupt Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIEPINT DIEPINT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 XferCompl EPDisbld AHBErr TimeOUT INTknTXFEmp INEPNakEff TxFEmp BNAIntr

XferCompl : Transfer Completed Interrupt
bits : 0 - -1 (0 bit)
access : read-write

EPDisbld : Endpoint Disabled Interrupt
bits : 1 - 0 (0 bit)
access : read-write

AHBErr : AHB Error
bits : 2 - 1 (0 bit)
access : read-write

TimeOUT : Timeout Condition
bits : 3 - 2 (0 bit)
access : read-write

INTknTXFEmp : IN Token Received When TxFIFO is Empty
bits : 4 - 3 (0 bit)
access : read-write

INEPNakEff : IN Endpoint NAK Effective
bits : 6 - 5 (0 bit)
access : read-write

TxFEmp : Transmit FIFO Empty
bits : 7 - 6 (0 bit)
access : read-only

BNAIntr : BNA (Buffer Not Available) Interrupt
bits : 9 - 8 (0 bit)
access : read-write



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