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CAN

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x100 byte (0x0)
mem_usage : registers
protection : not protected

Registers

NCR

NBTR

NECNT

NFCR

NSR

NIPR

NPCR


NCR

Node Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NCR NCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INIT TRIE LECIE ALIE CANDIS TXDIS CCE CALM

INIT : Node Initialization
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : value1

Resetting bit INIT enables the participation of the node in the CAN traffic. If the CAN node is in the bus-off state, the ongoing bus-off recovery (which does not depend on the INIT bit) is continued. With the end of the bus-off recovery sequence the CAN node is allowed to take part in the CAN traffic. If the CAN node is not in the bus-off state, a sequence of 11 consecutive recessive bits must be detected before the node is allowed to take part in the CAN traffic.

#1 : value2

Setting this bit terminates the participation of this node in the CAN traffic. Any ongoing frame transfer is cancelled and the transmit line goes recessive. If the CAN node is in the bus-off state, then the running bus-off recovery sequence is continued. If the INIT bit is still set after the successful completion of the bus-off recovery sequence, i.e. after detecting 128 sequences of 11 consecutive recessive bits (11 1), then the CAN node leaves the bus-off state but remains inactive as long as INIT remains set.

End of enumeration elements list.

TRIE : Transfer Interrupt Enable
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

#0 : value1

Transfer interrupt is disabled.

#1 : value2

Transfer interrupt is enabled.

End of enumeration elements list.

LECIE : LEC Indicated Error Interrupt Enable
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : value1

Last error code interrupt is disabled.

#1 : value2

Last error code interrupt is enabled.

End of enumeration elements list.

ALIE : Alert Interrupt Enable
bits : 3 - 2 (0 bit)
access : read-write

Enumeration:

#0 : value1

Alert interrupt is disabled.

#1 : value2

Alert interrupt is enabled.

End of enumeration elements list.

CANDIS : CAN Disable
bits : 4 - 3 (0 bit)
access : read-write

TXDIS : Transmit Disable
bits : 5 - 4 (0 bit)
access : read-write

CCE : Configuration Change Enable
bits : 6 - 5 (0 bit)
access : read-write

Enumeration:

#0 : value1

The Bit Timing Register, the Port Control Register, Error Counter Register may only be read. All attempts to modify them are ignored.

#1 : value2

The Bit Timing Register, the Port Control Register, Error Counter Register may be read and written.

End of enumeration elements list.

CALM : CAN Analyzer Mode
bits : 7 - 6 (0 bit)
access : read-write


NBTR

Node Bit Timing Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NBTR NBTR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BRP SJW TSEG1 TSEG2 DIV8

BRP : Baud Rate Prescaler
bits : 0 - 4 (5 bit)
access : read-write

SJW : (Re) Synchronization Jump Width
bits : 6 - 6 (1 bit)
access : read-write

TSEG1 : Time Segment Before Sample Point
bits : 8 - 10 (3 bit)
access : read-write

TSEG2 : Time Segment After Sample Point
bits : 12 - 13 (2 bit)
access : read-write

DIV8 : Divide Prescaler Clock by 8
bits : 15 - 14 (0 bit)
access : read-write

Enumeration:

#0 : value1

A time quantum lasts (BRP+1) clock cycles.

#1 : value2

A time quantum lasts 8 (BRP+1) clock cycles.

End of enumeration elements list.


NECNT

Node Error Counter Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NECNT NECNT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 REC TEC EWRNLVL LETD LEINC

REC : Receive Error Counter
bits : 0 - 6 (7 bit)
access : read-write

TEC : Transmit Error Counter
bits : 8 - 14 (7 bit)
access : read-write

EWRNLVL : Error Warning Level
bits : 16 - 22 (7 bit)
access : read-write

LETD : Last Error Transfer Direction
bits : 24 - 23 (0 bit)
access : read-only

Enumeration:

#0 : value1

The last error occurred while the CAN node x was receiver (REC has been incremented).

#1 : value2

The last error occurred while the CAN node x was transmitter (TEC has been incremented).

End of enumeration elements list.

LEINC : Last Error Increment
bits : 25 - 24 (0 bit)
access : read-only

Enumeration:

#0 : value1

The last error led to an error counter increment of 1.

#1 : value2

The last error led to an error counter increment of 8.

End of enumeration elements list.


NFCR

Node Frame Counter Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NFCR NFCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CFC CFSEL CFMOD CFCIE CFCOV

CFC : CAN Frame Counter
bits : 0 - 14 (15 bit)
access : read-write

CFSEL : CAN Frame Count Selection
bits : 16 - 17 (2 bit)
access : read-write

CFMOD : CAN Frame Counter Mode
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

#00 : value1

Frame Count Mode: The frame counter is incremented upon the reception and transmission of frames.

#01 : value2

Time Stamp Mode: The frame counter is used to count bit times.

#10 : value3

Bit Timing Mode: The frame counter is used for analysis of the bit timing.

#11 : value4

Error Count Mode: The frame counter is used for counting when an error frame is received or an error is detected by the node.

End of enumeration elements list.

CFCIE : CAN Frame Count Interrupt Enable
bits : 22 - 21 (0 bit)
access : read-write

Enumeration:

#0 : value1

CAN frame counter overflow interrupt is disabled.

#1 : value2

CAN frame counter overflow interrupt is enabled.

End of enumeration elements list.

CFCOV : CAN Frame Counter Overflow Flag
bits : 23 - 22 (0 bit)
access : read-write

Enumeration:

#0 : value1

No overflow has occurred since last flag reset.

#1 : value2

An overflow has occurred since last flag reset.

End of enumeration elements list.


NSR

Node Status Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NSR NSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LEC TXOK RXOK ALERT EWRN BOFF LLE LOE

LEC : Last Error Code
bits : 0 - 1 (2 bit)
access : read-write

TXOK : Message Transmitted Successfully
bits : 3 - 2 (0 bit)
access : read-write

Enumeration:

#0 : value1

No successful transmission since last (most recent) flag reset.

#1 : value2

A message has been transmitted successfully (error-free and acknowledged by at least another node).

End of enumeration elements list.

RXOK : Message Received Successfully
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

#0 : value1

No successful reception since last (most recent) flag reset.

#1 : value2

A message has been received successfully.

End of enumeration elements list.

ALERT : Alert Warning
bits : 5 - 4 (0 bit)
access : read-write

EWRN : Error Warning Status
bits : 6 - 5 (0 bit)
access : read-only

Enumeration:

#0 : value1

No warning limit exceeded.

#1 : value2

One of the error counters REC or TEC reached the warning limit EWRNLVL.

End of enumeration elements list.

BOFF : Bus-off Status
bits : 7 - 6 (0 bit)
access : read-only

Enumeration:

#0 : value1

CAN controller is not in the bus-off state.

#1 : value2

CAN controller is in the bus-off state.

End of enumeration elements list.

LLE : List Length Error
bits : 8 - 7 (0 bit)
access : read-write

Enumeration:

#0 : value1

No List Length Error since last (most recent) flag reset.

#1 : value2

A List Length Error has been detected during message acceptance filtering. The number of elements in the list that belongs to this CAN node differs from the list SIZE given in the list termination pointer.

End of enumeration elements list.

LOE : List Object Error
bits : 9 - 8 (0 bit)
access : read-write

Enumeration:

#0 : value1

No List Object Error since last (most recent) flag reset.

#1 : value2

A List Object Error has been detected during message acceptance filtering. A message object with wrong LIST index entry in the Message Object Status Register has been detected.

End of enumeration elements list.


NIPR

Node Interrupt Pointer Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NIPR NIPR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ALINP LECINP TRINP CFCINP

ALINP : Alert Interrupt Node Pointer
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

#0000 : value1

Interrupt output line INT_O0 is selected.

#0001 : value2

Interrupt output line INT_O1 is selected.

#1110 : value3

Interrupt output line INT_O14 is selected.

#1111 : value4

Interrupt output line INT_O15 is selected.

End of enumeration elements list.

LECINP : Last Error Code Interrupt Node Pointer
bits : 4 - 6 (3 bit)
access : read-write

Enumeration:

#0000 : value1

Interrupt output line INT_O0 is selected.

#0001 : value2

Interrupt output line INT_O1 is selected.

#1110 : value3

Interrupt output line INT_O14 is selected.

#1111 : value4

Interrupt output line INT_O15 is selected.

End of enumeration elements list.

TRINP : Transfer OK Interrupt Node Pointer
bits : 8 - 10 (3 bit)
access : read-write

Enumeration:

#0000 : value1

Interrupt output line INT_O0 is selected.

#0001 : value2

Interrupt output line INT_O1 is selected.

#1110 : value3

Interrupt output line INT_O14 is selected.

#1111 : value4

Interrupt output line INT_O15 is selected.

End of enumeration elements list.

CFCINP : Frame Counter Interrupt Node Pointer
bits : 12 - 14 (3 bit)
access : read-write

Enumeration:

#0000 : value1

Interrupt output line INT_O0 is selected.

#0001 : value2

Interrupt output line INT_O1 is selected.

#1110 : value3

Interrupt output line INT_O14 is selected.

#1111 : value4

Interrupt output line INT_O15 is selected.

End of enumeration elements list.


NPCR

Node Port Control Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NPCR NPCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RXSEL LBM

RXSEL : Receive Select
bits : 0 - 1 (2 bit)
access : read-write

LBM : Loop-Back Mode
bits : 8 - 7 (0 bit)
access : read-write

Enumeration:

#0 : value1

Loop-Back Mode is disabled.

#1 : value2

Loop-Back Mode is enabled. This node is connected to an internal (virtual) loop-back CAN bus. All CAN nodes which are in Loop-Back Mode are connected to this virtual CAN bus so that they can communicate with each other internally. The external transmit line is forced recessive in Loop-Back Mode.

End of enumeration elements list.



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