\n

Power Manager

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x200 byte (0x0)
mem_usage : registers
protection : not protected

Registers

PWR_RST_CTRL

WUD_CTRL

WUD_PULSE0

WUD_PULSE1

WUD_SEEN0

WUD_SEEN1

MARGIN_CTRL

DIE_TYPE

BASE_PART_NUM

INTFL

MASK_ID0

MASK_ID1

PERIPHERAL_RESET

INTEN

SVM_EVENTS


PWR_RST_CTRL

Power Reset Control and Status
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWR_RST_CTRL PWR_RST_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 afe_powered io_active usb_powered pullups_enabled firmware_reset arm_lockup_reset tamper_detect fw_command_sysman watchdog_timeout fw_command_arm arm_lockup srstn_assertion por low_power_mode

afe_powered : AFE Powered
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

End of enumeration elements list.

io_active : I/O Active
bits : 3 - 6 (4 bit)
access : read-write

Enumeration:

End of enumeration elements list.

usb_powered : USB Powered
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

End of enumeration elements list.

pullups_enabled : Static Pullups Enabled
bits : 5 - 10 (6 bit)
access : read-write

Enumeration:

End of enumeration elements list.

firmware_reset : Firmware Initiated Reset
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

End of enumeration elements list.

arm_lockup_reset : ARM Lockup Reset
bits : 9 - 18 (10 bit)
access : read-write

Enumeration:

End of enumeration elements list.

tamper_detect : Reset Caused By - Tamper Detect
bits : 16 - 32 (17 bit)
access : read-only

Enumeration:

End of enumeration elements list.

fw_command_sysman : Reset Caused By - Firmware Commanded Reset (SysMan)
bits : 17 - 34 (18 bit)
access : read-only

Enumeration:

End of enumeration elements list.

watchdog_timeout : Reset Caused By - Watchdog Timeout
bits : 18 - 36 (19 bit)
access : read-only

Enumeration:

End of enumeration elements list.

fw_command_arm : Reset Caused By - Firmware Commanded Reset (ARM Core)
bits : 19 - 38 (20 bit)
access : read-only

Enumeration:

End of enumeration elements list.

arm_lockup : Reset Caused By - ARM Lockup
bits : 20 - 40 (21 bit)
access : read-only

Enumeration:

End of enumeration elements list.

srstn_assertion : Reset Caused By - External System Reset
bits : 21 - 42 (22 bit)
access : read-only

Enumeration:

End of enumeration elements list.

por : Reset Caused By - Power On Reset (POR)
bits : 22 - 44 (23 bit)
access : read-only

Enumeration:

End of enumeration elements list.

low_power_mode : Power Manager Dynamic Clock Gating Enable
bits : 31 - 62 (32 bit)
access : read-write

Enumeration:

End of enumeration elements list.


WUD_CTRL

Wake-Up Detect Control
address_offset : 0x10 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WUD_CTRL WUD_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 pad_select pad_mode clear_all ctrl_enable

pad_select : Wake-Up Pad Select
bits : 0 - 5 (6 bit)
access : read-write

Enumeration:

End of enumeration elements list.

pad_mode : Wake-Up Pad Signal Mode
bits : 8 - 17 (10 bit)
access : read-write

Enumeration:

End of enumeration elements list.

clear_all : Clear All WUD Pad States
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ctrl_enable : Enable WUD Control Modification
bits : 16 - 32 (17 bit)
access : read-write

Enumeration:

End of enumeration elements list.


WUD_PULSE0

WUD Pulse To Mode Bit 0
address_offset : 0x14 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WUD_PULSE0 WUD_PULSE0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

WUD_PULSE1

WUD Pulse To Mode Bit 1
address_offset : 0x18 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WUD_PULSE1 WUD_PULSE1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

WUD_SEEN0

Wake-up Detect Status for P0/P1/P2/P3
address_offset : 0x1C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WUD_SEEN0 WUD_SEEN0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 gpio0 gpio1 gpio2 gpio3 gpio4 gpio5 gpio6 gpio7 gpio8 gpio9 gpio10 gpio11 gpio12 gpio13 gpio14 gpio15 gpio16 gpio17 gpio18 gpio19 gpio20 gpio21 gpio22 gpio23 gpio24 gpio25 gpio26 gpio27 gpio28 gpio29 gpio30 gpio31

gpio0 : Wake-Up Detect Status for P0.0
bits : 0 - 0 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio1 : Wake-Up Detect Status for P0.1
bits : 1 - 2 (2 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio2 : Wake-Up Detect Status for P0.2
bits : 2 - 4 (3 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio3 : Wake-Up Detect Status for P0.3
bits : 3 - 6 (4 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio4 : Wake-Up Detect Status for P0.4
bits : 4 - 8 (5 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio5 : Wake-Up Detect Status for P0.5
bits : 5 - 10 (6 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio6 : Wake-Up Detect Status for P0.6
bits : 6 - 12 (7 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio7 : Wake-Up Detect Status for P0.7
bits : 7 - 14 (8 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio8 : Wake-Up Detect Status for P1.0
bits : 8 - 16 (9 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio9 : Wake-Up Detect Status for P1.1
bits : 9 - 18 (10 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio10 : Wake-Up Detect Status for P1.2
bits : 10 - 20 (11 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio11 : Wake-Up Detect Status for P1.3
bits : 11 - 22 (12 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio12 : Wake-Up Detect Status for P1.4
bits : 12 - 24 (13 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio13 : Wake-Up Detect Status for P1.5
bits : 13 - 26 (14 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio14 : Wake-Up Detect Status for P1.6
bits : 14 - 28 (15 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio15 : Wake-Up Detect Status for P1.7
bits : 15 - 30 (16 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio16 : Wake-Up Detect Status for P2.0
bits : 16 - 32 (17 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio17 : Wake-Up Detect Status for P2.1
bits : 17 - 34 (18 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio18 : Wake-Up Detect Status for P2.2
bits : 18 - 36 (19 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio19 : Wake-Up Detect Status for P2.3
bits : 19 - 38 (20 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio20 : Wake-Up Detect Status for P2.4
bits : 20 - 40 (21 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio21 : Wake-Up Detect Status for P2.5
bits : 21 - 42 (22 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio22 : Wake-Up Detect Status for P2.6
bits : 22 - 44 (23 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio23 : Wake-Up Detect Status for P2.7
bits : 23 - 46 (24 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio24 : Wake-Up Detect Status for P3.0
bits : 24 - 48 (25 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio25 : Wake-Up Detect Status for P3.1
bits : 25 - 50 (26 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio26 : Wake-Up Detect Status for P3.2
bits : 26 - 52 (27 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio27 : Wake-Up Detect Status for P3.3
bits : 27 - 54 (28 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio28 : Wake-Up Detect Status for P3.4
bits : 28 - 56 (29 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio29 : Wake-Up Detect Status for P3.5
bits : 29 - 58 (30 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio30 : Wake-Up Detect Status for P3.6
bits : 30 - 60 (31 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio31 : Wake-Up Detect Status for P3.7
bits : 31 - 62 (32 bit)
access : read-only

Enumeration:

End of enumeration elements list.


WUD_SEEN1

Wake-up Detect Status for P4/P5/P6/P7
address_offset : 0x20 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WUD_SEEN1 WUD_SEEN1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 gpio32 gpio33 gpio34 gpio35 gpio36 gpio37 gpio38 gpio39 gpio40 gpio41 gpio42 gpio43 gpio44 gpio45 gpio46 gpio47 gpio48

gpio32 : Wake-Up Detect Status for P4.0
bits : 0 - 0 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio33 : Wake-Up Detect Status for P4.1
bits : 1 - 2 (2 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio34 : Wake-Up Detect Status for P4.2
bits : 2 - 4 (3 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio35 : Wake-Up Detect Status for P4.3
bits : 3 - 6 (4 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio36 : Wake-Up Detect Status for P4.4
bits : 4 - 8 (5 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio37 : Wake-Up Detect Status for P4.5
bits : 5 - 10 (6 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio38 : Wake-Up Detect Status for P4.6
bits : 6 - 12 (7 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio39 : Wake-Up Detect Status for P4.7
bits : 7 - 14 (8 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio40 : Wake-Up Detect Status for P5.0
bits : 8 - 16 (9 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio41 : Wake-Up Detect Status for P5.1
bits : 9 - 18 (10 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio42 : Wake-Up Detect Status for P5.2
bits : 10 - 20 (11 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio43 : Wake-Up Detect Status for P5.3
bits : 11 - 22 (12 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio44 : Wake-Up Detect Status for P5.4
bits : 12 - 24 (13 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio45 : Wake-Up Detect Status for P5.5
bits : 13 - 26 (14 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio46 : Wake-Up Detect Status for P5.6
bits : 14 - 28 (15 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio47 : Wake-Up Detect Status for P5.7
bits : 15 - 30 (16 bit)
access : read-only

Enumeration:

End of enumeration elements list.

gpio48 : Wake-Up Detect Status for P6.0
bits : 16 - 32 (17 bit)
access : read-only

Enumeration:

End of enumeration elements list.


MARGIN_CTRL

SRAM Margin Adjustment
address_offset : 0x34 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MARGIN_CTRL MARGIN_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 extra_margin extra_write_margin write_assist_en write_assist_margin

extra_margin : Extra Margin Adjustment
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

End of enumeration elements list.

extra_write_margin : Extra Write Margin Adjustment
bits : 3 - 7 (5 bit)
access : read-write

Enumeration:

End of enumeration elements list.

write_assist_en : Write Assist Enable
bits : 5 - 10 (6 bit)
access : read-write

Enumeration:

End of enumeration elements list.

write_assist_margin : Write Assist Margin Adjustment
bits : 6 - 13 (8 bit)
access : read-write

Enumeration:

End of enumeration elements list.


DIE_TYPE

Die Type ID Register
address_offset : 0x38 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DIE_TYPE DIE_TYPE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

BASE_PART_NUM

Base Part Number
address_offset : 0x3C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BASE_PART_NUM BASE_PART_NUM read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 base_part_number

base_part_number : Base Part Number
bits : 0 - 15 (16 bit)
access : read-only

Enumeration:

End of enumeration elements list.


INTFL

Interrupt Flags
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTFL INTFL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 v1_2_warning v1_8_warning rtc_warning vdda_warning vddb_warning

v1_2_warning : 1.2V Warning Monitor Int Flag
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

v1_8_warning : 1.8V Warning Monitor Int Flag
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

rtc_warning : RTC Warning Monitor Int Flag
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

End of enumeration elements list.

vdda_warning : VDDA Warning Monitor Int Flag
bits : 3 - 6 (4 bit)
access : read-write

Enumeration:

End of enumeration elements list.

vddb_warning : VDDB Warning Monitor Int Flag
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

End of enumeration elements list.


MASK_ID0

Mask ID Register 0
address_offset : 0x40 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MASK_ID0 MASK_ID0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 revision_id mask_id

revision_id : Revision ID
bits : 0 - 3 (4 bit)
access : read-only

Enumeration:

End of enumeration elements list.

mask_id : Mask ID[27:0]
bits : 4 - 35 (32 bit)
access : read-only

Enumeration:

End of enumeration elements list.


MASK_ID1

Mask ID Register 1
address_offset : 0x44 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MASK_ID1 MASK_ID1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 mask_id mask_id_enable

mask_id : Mask ID[58:28]
bits : 0 - 30 (31 bit)
access : read-only

Enumeration:

End of enumeration elements list.

mask_id_enable : Enable Mask ID
bits : 31 - 62 (32 bit)
access : read-write

Enumeration:

End of enumeration elements list.


PERIPHERAL_RESET

Peripheral Reset Control Register
address_offset : 0x48 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PERIPHERAL_RESET PERIPHERAL_RESET read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ssb spix pmu usb crc tpu watchdog0 gpio timer0 timer1 timer2 timer3 timer4 timer5 pulse_train uart0 uart1 uart2 uart3 i2cm0 i2cm1 i2cm2 i2cs spim0 spim1 spim2 spib owm adc

ssb : Reset SSB
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

spix : Reset SPI XIP
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

pmu : Reset PMU
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

End of enumeration elements list.

usb : Reset USB
bits : 3 - 6 (4 bit)
access : read-write

Enumeration:

End of enumeration elements list.

crc : Reset CRC
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

End of enumeration elements list.

tpu : Reset TPU
bits : 5 - 10 (6 bit)
access : read-write

Enumeration:

End of enumeration elements list.

watchdog0 : Reset Watchdog Timer 0
bits : 6 - 12 (7 bit)
access : read-write

Enumeration:

End of enumeration elements list.

gpio : Reset GPIO
bits : 7 - 14 (8 bit)
access : read-write

Enumeration:

End of enumeration elements list.

timer0 : Reset Timer/Counter Module 0
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

End of enumeration elements list.

timer1 : Reset Timer/Counter Module 1
bits : 9 - 18 (10 bit)
access : read-write

Enumeration:

End of enumeration elements list.

timer2 : Reset Timer/Counter Module 2
bits : 10 - 20 (11 bit)
access : read-write

Enumeration:

End of enumeration elements list.

timer3 : Reset Timer/Counter Module 3
bits : 11 - 22 (12 bit)
access : read-write

Enumeration:

End of enumeration elements list.

timer4 : Reset Timer/Counter Module 4
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

End of enumeration elements list.

timer5 : Reset Timer/Counter Module 5
bits : 13 - 26 (14 bit)
access : read-write

Enumeration:

End of enumeration elements list.

pulse_train : Reset All Pulse Trains
bits : 14 - 28 (15 bit)
access : read-write

Enumeration:

End of enumeration elements list.

uart0 : Reset UART 0
bits : 15 - 30 (16 bit)
access : read-write

Enumeration:

End of enumeration elements list.

uart1 : Reset UART 1
bits : 16 - 32 (17 bit)
access : read-write

Enumeration:

End of enumeration elements list.

uart2 : Reset UART 2
bits : 17 - 34 (18 bit)
access : read-write

Enumeration:

End of enumeration elements list.

uart3 : Reset UART 3
bits : 18 - 36 (19 bit)
access : read-write

Enumeration:

End of enumeration elements list.

i2cm0 : Reset I2C Master 0
bits : 19 - 38 (20 bit)
access : read-write

Enumeration:

End of enumeration elements list.

i2cm1 : Reset I2C Master 1
bits : 20 - 40 (21 bit)
access : read-write

Enumeration:

End of enumeration elements list.

i2cm2 : Reset I2C Master 2
bits : 21 - 42 (22 bit)
access : read-write

Enumeration:

End of enumeration elements list.

i2cs : Reset I2C Slave
bits : 22 - 44 (23 bit)
access : read-write

Enumeration:

End of enumeration elements list.

spim0 : Reset SPI Master 0
bits : 23 - 46 (24 bit)
access : read-write

Enumeration:

End of enumeration elements list.

spim1 : Reset SPI Master 1
bits : 24 - 48 (25 bit)
access : read-write

Enumeration:

End of enumeration elements list.

spim2 : Reset SPI Master 2
bits : 25 - 50 (26 bit)
access : read-write

Enumeration:

End of enumeration elements list.

spib : Reset SPI Bridge
bits : 26 - 52 (27 bit)
access : read-write

Enumeration:

End of enumeration elements list.

owm : Reset 1-Wire Master
bits : 27 - 54 (28 bit)
access : read-write

Enumeration:

End of enumeration elements list.

adc : Reset ADC
bits : 28 - 56 (29 bit)
access : read-write

Enumeration:

End of enumeration elements list.


INTEN

Interrupt Enable/Disable Controls
address_offset : 0x8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTEN INTEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 v1_2_warning v1_8_warning rtc_warning vdda_warning vddb_warning

v1_2_warning : 1.2V Warning Monitor Int Enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

v1_8_warning : 1.8V Warning Monitor Int Enable
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

rtc_warning : RTC Warning Monitor Int Enable
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

End of enumeration elements list.

vdda_warning : VDDA Warning Monitor Int Enable
bits : 3 - 6 (4 bit)
access : read-write

Enumeration:

End of enumeration elements list.

vddb_warning : VDDB Warning Monitor Int Enable
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

End of enumeration elements list.


SVM_EVENTS

SVM Event Status Flags (read-only)
address_offset : 0xC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SVM_EVENTS SVM_EVENTS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 v1_2_warning v1_8_warning rtc_warning vdda_warning vddb_warning

v1_2_warning : 1.2V Warning Monitor Event Input
bits : 0 - 0 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

v1_8_warning : 1.8V Warning Monitor Event Input
bits : 1 - 2 (2 bit)
access : read-only

Enumeration:

End of enumeration elements list.

rtc_warning : RTC Warning Monitor Event Input
bits : 2 - 4 (3 bit)
access : read-only

Enumeration:

End of enumeration elements list.

vdda_warning : VDDA Warning Monitor Event Input
bits : 3 - 6 (4 bit)
access : read-only

Enumeration:

End of enumeration elements list.

vddb_warning : VDDB Warning Monitor Event Input
bits : 4 - 8 (5 bit)
access : read-only

Enumeration:

End of enumeration elements list.



Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !

This website is sponsored by EmbeetleEmbeetle, an IDE designed from scratch for embedded software developers.