\n

ICC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected

Registers

ID

CTRL_STAT

MEM_CFG

INVDT_ALL


ID

Device ID Register
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ID ID read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 rtl_version part_num cache_id

rtl_version : RTL Release Version
bits : 0 - 5 (6 bit)
access : read-only

Enumeration:

End of enumeration elements list.

part_num : Part Number ID
bits : 6 - 15 (10 bit)
access : read-only

Enumeration:

End of enumeration elements list.

cache_id : Cache ID
bits : 10 - 25 (16 bit)
access : read-only

Enumeration:

End of enumeration elements list.


CTRL_STAT

Control and Status
address_offset : 0x100 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTRL_STAT CTRL_STAT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 enable ready

enable : Cache Enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ready : Cache Ready Status
bits : 16 - 32 (17 bit)
access : read-only

Enumeration:

End of enumeration elements list.


MEM_CFG

Memory Configuration Register
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEM_CFG MEM_CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 cache_size main_memory_size

cache_size : Instruction Cache Size
bits : 0 - 15 (16 bit)
access : read-only

Enumeration:

End of enumeration elements list.

main_memory_size : Internal Flash Memory Size
bits : 16 - 47 (32 bit)
access : read-only

Enumeration:

End of enumeration elements list.


INVDT_ALL

Invalidate (Clear) Cache Control
address_offset : 0x700 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INVDT_ALL INVDT_ALL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0


Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !

This website is sponsored by EmbeetleEmbeetle, an IDE designed from scratch for embedded software developers.