Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected
UART Control Register
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
uart_en : UART Enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
rx_fifo_en : RX FIFO Enable
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
End of enumeration elements list.
tx_fifo_en : TX FIFO Enable
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
End of enumeration elements list.
data_size : Data Size
bits : 4 - 9 (6 bit)
access : read-write
Enumeration:
End of enumeration elements list.
extra_stop : Extra Stop Enable
bits : 8 - 16 (9 bit)
access : read-write
Enumeration:
End of enumeration elements list.
parity : Parity Mode
bits : 12 - 25 (14 bit)
access : read-write
Enumeration:
End of enumeration elements list.
cts_en : CTS Enable
bits : 16 - 32 (17 bit)
access : read-write
Enumeration:
End of enumeration elements list.
cts_polarity : CTS Polarity
bits : 17 - 34 (18 bit)
access : read-write
Enumeration:
End of enumeration elements list.
rts_en : RTS Enable
bits : 18 - 36 (19 bit)
access : read-write
Enumeration:
End of enumeration elements list.
rts_polarity : RTS Polarity
bits : 19 - 38 (20 bit)
access : read-write
Enumeration:
End of enumeration elements list.
rts_level : RX FIFO LTE Level for RTS Assert
bits : 20 - 45 (26 bit)
access : read-write
Enumeration:
End of enumeration elements list.
UART Multidrop Control Register
address_offset : 0x10 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
slave_addr : Slave Address
bits : 0 - 7 (8 bit)
access : read-write
Enumeration:
End of enumeration elements list.
slave_addr_msk : Slave Address Mask
bits : 8 - 23 (16 bit)
access : read-write
Enumeration:
End of enumeration elements list.
md_mstr : Multidrop Master
bits : 16 - 32 (17 bit)
access : read-write
Enumeration:
End of enumeration elements list.
tx_addr_mark : RX Address Mark
bits : 17 - 34 (18 bit)
access : read-write
Enumeration:
End of enumeration elements list.
UART Interrupt Flags
address_offset : 0x14 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
tx_done : TX Done Interrupt Flag
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
tx_unstalled : TX Unstalled Interrupt Flag
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
End of enumeration elements list.
tx_fifo_ae : TX FIFO Almost Empty Interrupt Flag
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
End of enumeration elements list.
rx_fifo_not_empty : RX FIFO Not Empty Interrupt Flag
bits : 3 - 6 (4 bit)
access : read-write
Enumeration:
End of enumeration elements list.
rx_stalled : RX Stalled Interrupt Flag
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
End of enumeration elements list.
rx_fifo_af : RX FIFO Almost Full Interrupt Flag
bits : 5 - 10 (6 bit)
access : read-write
Enumeration:
End of enumeration elements list.
rx_fifo_overflow : RX FIFO Overflow Interrupt Flag
bits : 6 - 12 (7 bit)
access : read-write
Enumeration:
End of enumeration elements list.
rx_framing_err : RX Framing Error Interrupt Flag
bits : 7 - 14 (8 bit)
access : read-write
Enumeration:
End of enumeration elements list.
rx_parity_err : RX Parity Error Interrupt Flag
bits : 8 - 16 (9 bit)
access : read-write
Enumeration:
End of enumeration elements list.
UART Interrupt Enable/Disable Controls
address_offset : 0x18 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
tx_done : TX Done Interrupt Enable/Disable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
End of enumeration elements list.
tx_unstalled : TX Unstalled Interrupt Enable/Disable
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
End of enumeration elements list.
tx_fifo_ae : TX FIFO Almost Empty Interrupt Enable/Disable
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
End of enumeration elements list.
rx_fifo_not_empty : RX FIFO Not Empty Interrupt Enable/Disable
bits : 3 - 6 (4 bit)
access : read-write
Enumeration:
End of enumeration elements list.
rx_stalled : RX Stalled Interrupt Enable/Disable
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
End of enumeration elements list.
rx_fifo_af : RX FIFO Almost Full Interrupt Enable/Disable
bits : 5 - 10 (6 bit)
access : read-write
Enumeration:
End of enumeration elements list.
rx_fifo_overflow : RX FIFO Overflow Interrupt Enable/Disable
bits : 6 - 12 (7 bit)
access : read-write
Enumeration:
End of enumeration elements list.
rx_framing_err : RX Framing Error Interrupt Enable/Disable
bits : 7 - 14 (8 bit)
access : read-write
Enumeration:
End of enumeration elements list.
rx_parity_err : RX Parity Error Interrupt Enable/Disable
bits : 8 - 16 (9 bit)
access : read-write
Enumeration:
End of enumeration elements list.
UART Baud Control Register
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
baud_divisor : Baud Divisor
bits : 0 - 7 (8 bit)
access : read-write
Enumeration:
End of enumeration elements list.
UART TX Fifo Control Register
address_offset : 0x8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
fifo_entry : TX FIFO Entries
bits : 0 - 4 (5 bit)
access : read-only
Enumeration:
End of enumeration elements list.
fifo_ae_lvl : TX FIFO AE Level
bits : 16 - 37 (22 bit)
access : read-write
Enumeration:
End of enumeration elements list.
UART RX Fifo Control Register
address_offset : 0xC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
fifo_entry : RX FIFO Entries
bits : 0 - 4 (5 bit)
access : read-only
Enumeration:
End of enumeration elements list.
fifo_af_lvl : RX FIFO AF Level
bits : 16 - 37 (22 bit)
access : read-write
Enumeration:
End of enumeration elements list.
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