CRYPTO_INTEN

CRYPTO_PRNG_KEY0

CRYPTO_PRNG_KEY1

CRYPTO_PRNG_KEY2

CRYPTO_PRNG_KEY3

CRYPTO_PRNG_KEY4

CRYPTO_PRNG_KEY5

CRYPTO_PRNG_KEY6

CRYPTO_PRNG_KEY7

CRYPTO_INTSTS

CRYPTO_AES_FDBCK0

CRYPTO_AES_FDBCK1

CRYPTO_AES_FDBCK2

CRYPTO_AES_FDBCK3

CRYPTO_TDES_FDBCKH

CRYPTO_TDES_FDBCKL

CRYPTO_PRNG_CTL

CRYPTO_PRNG_SEED

AESIEN : AES Interrupt Enable Bit\nNote: In DMA mode, an interrupt will be triggered when amount of data set in AES_DMA_CNT is fed into the AES engine. In Non-DMA mode, an interrupt will be triggered when the AES engine finishes the operation.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

AESEIEN : AES Error Flag Enable Bit
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TDESIEN : TDES/DES Interrupt Enable Bit\nNote: In DMA mode, an interrupt will be triggered when amount of data set in TDES_DMA_CNT is fed into the TDES engine. In Non-DMA mode, an interrupt will be triggered when the TDES engine finishes the operation.
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TDESEIEN : TDES/DES Error Flag Enable Bit
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PRNGIEN : PRNG Interrupt Enable Bit
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ECCIEN : ECC Interrupt Enable Bit\nNote: In DMA mode, an interrupt will be triggered when amount of data set in ECC_DMA_CNT is fed into the ECC engine. In Non-DMA mode, an interrupt will be triggered when the ECC engine finishes the operation.
bits : 22 - 22 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ECCEIEN : ECC Error Interrupt Enable Bit
bits : 23 - 23 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SHAIEN : SHA Interrupt Enable Bit\nNote: In DMA mode, an interrupt will be triggered when amount of data set in SHA _DMA_CNT is fed into the SHA engine. In Non-DMA mode, an interrupt will be triggered when the SHA engine finishes the operation.
bits : 24 - 24 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SHAEIEN : SHA Error Interrupt Enable Bit
bits : 25 - 25 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

KEY : Store PRNG Generated Key (Read Only)\nThe bits store the key that is generated by PRNG.
bits : 0 - 31 (32 bit)
access : read-only

AESIF : AES Finish Interrupt Flag\nThis bit is cleared by writing 1, and it has no effect by writing 0.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

AESEIF : AES Error Flag\nThis bit is cleared by writing 1, and it has no effect by writing 0.
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TDESIF : TDES/DES Finish Interrupt Flag\nThis bit is cleared by writing 1, and it has no effect by writing 0.
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TDESEIF : TDES/DES Error Flag\nThis bit includes the operating and setting error. The detailed flag is shown in the CRYPTO_TDES_STS register. This includes operating and setting error.\nThis bit is cleared by writing 1, and it has no effect by writing 0.
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PRNGIF : PRNG Finish Interrupt Flag\nThis bit is cleared by writing 1, and it has no effect by writing 0.
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ECCIF : ECC Finish Interrupt Flag\nThis bit is cleared by writing 1, and it has no effect by writing 0.
bits : 22 - 22 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ECCEIF : ECC Error Flag\nThis register includes operating and setting error. The detail flag is shown in CRYPTO_ECC_STS register.\nThis bit is cleared by writing 1, and it has no effect by writing 0.
bits : 23 - 23 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SHAIF : SHA Finish Interrupt Flag\nThis bit is cleared by writing 1, and it has no effect by writing 0.
bits : 24 - 24 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SHAEIF : SHA Error Flag\nThis register includes operating and setting error. The detail flag is shown in CRYPTO_SHA_STS register.\nThis bit is cleared by writing 1, and it has no effect by writing 0.
bits : 25 - 25 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

FDBCK : AES Feedback Information\nThe feedback value is 128 bits in size.\nThe AES engine uses the data from CRYPTO_AES_FDBCKx as the data inputted to CRYPTO_AESn_IVx for the next block in DMA cascade mode.\nThe AES engine outputs feedback information for IV in the next block's operation. Software can use this feedback information to implement more than four DMA channels. Software can store that feedback value temporarily. After switching back, fill the stored feedback value to CRYPTO_AESn_IVx in the same channel operation, and then continue the operation with the original setting.
bits : 0 - 31 (32 bit)
access : read-only

FDBCK : TDES/DES Feedback\nThe feedback value is 64 bits in size.\nThe TDES/DES engine uses the data from {CRYPTO_TDES_FDBCKH, CRYPTO_TDES_FDBCKL} as the data inputted to {CRYPTO_TDESn_IVH, CRYPTO_TDESn_IVL} for the next block in DMA cascade mode. The feedback register is for CBC, CFB, and OFB mode.\nTDES/DES engine outputs feedback information for IV in the next block's operation. Software can use this feedback information to implement more than four DMA channels. Software can store that feedback value temporarily. After switching back, fill the stored feedback value to CRYPTO_TDESn_IVH/L in the same channel operation. Then can continue the operation with the original setting.
bits : 0 - 31 (32 bit)
access : read-only

START : Start PRNG Engine
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SEEDRLD : Reload New Seed for PRNG Engine
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

KEYSZ : PRNG Generate Key Size
bits : 2 - 3 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

BUSY : PRNG Busy (Read Only)
bits : 8 - 8 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

SEED : Seed for PRNG (Write Only)\nThe bits store the seed for PRNG engine.
bits : 0 - 31 (32 bit)
access : write-only