Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
Descriptor Table Control Register of PDMA Channel n
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OPMODE : PDMA Operation Mode Selection\nNote: Before filling transfer task in the Descriptor Table, user must check if the descriptor table is complete.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
#00 : 0
Idle state: Channel is stopped or this table is complete, when PDMA finish channel table task, OPMODE will be cleared to idle state automatically
#01 : 1
Basic mode: The descriptor table only has one task. When this task is finished, the PDMA_INTSTS[n] will be asserted
#10 : 2
Scatter-Gather mode: When operating in this mode, user must give the next descriptor table address in PDMA_DSCT_NEXT register; PDMA controller will ignore this task, then load the next task to execute
#11 : 3
Reserved.
End of enumeration elements list.
TXTYPE : Transfer Type
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Burst transfer type
#1 : 1
Single transfer type
End of enumeration elements list.
BURSIZE : Burst Size\nNote: This field is only useful in burst transfer type.
bits : 4 - 6 (3 bit)
access : read-write
Enumeration:
#000 : 0
128 Transfers
#001 : 1
64 Transfers
#010 : 2
32 Transfers
#011 : 3
16 Transfers
#100 : 4
8 Transfers
#101 : 5
4 Transfers
#110 : 6
2 Transfers
#111 : 7
1 Transfers
End of enumeration elements list.
TBINTDIS : Table Interrupt Disable Bit\nThis field can be used to decide whether to enable table interrupt or not. If the TBINTDIS bit is enabled when PDMA controller finishes transfer task, it will not generates interrupt. \nNote: If this bit set to '1', the TEMPTYF will not be set.
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
Table interrupt Enabled
#1 : 1
Table interrupt Disabled
End of enumeration elements list.
SAINC : Source Address Increment\nThis field is used to set the source address increment size.
bits : 8 - 9 (2 bit)
access : read-write
Enumeration:
#11 : 3
No increment (fixed address)
End of enumeration elements list.
DAINC : Destination Address Increment\nThis field is used to set the destination address increment size.
bits : 10 - 11 (2 bit)
access : read-write
Enumeration:
#11 : 3
No increment (fixed address)
End of enumeration elements list.
TXWIDTH : Transfer Width Selection\nThis field is used for transfer width.\nNote: The PDMA transfer source address (PDMA_DSCT_SA) and PDMA transfer destination address (PDMA_DSCT_DA) should be alignment under the TXWIDTH selection
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
#00 : 0
One byte (8 bit) is transferred for every operation
#01 : 1
One half-word (16 bit) is transferred for every operation
#10 : 2
One word (32-bit) is transferred for every operation
#11 : 3
Reserved.
End of enumeration elements list.
TXCNT : Transfer Count\nThe TXCNT represents the required number of PDMA transfer, the real transfer count is (TXCNT + 1); The maximum transfer count is 16384, every transfer may be byte, half-word or word that is dependent on TXWIDTH field.\nNote: When PDMA finish each transfer data, this field will be decrease immediately.
bits : 16 - 29 (14 bit)
access : read-write
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