\n

PDMA

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

Registers

PDMA_DSCTn_DA


PDMA_DSCTn_DA

Destination Address Register of PDMA Channel n
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PDMA_DSCTn_DA PDMA_DSCTn_DA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DA

DA : PDMA Transfer Destination Address Register\nThis field indicates a 32-bit destination address of PDMA controller.
bits : 0 - 31 (32 bit)
access : read-write



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