WDT_CTL (CTL)

WDT_ALTCTL (ALTCTL)

RSTCNT : Reset WDT Up Counter (Write Protect)\nNote1: This bit is write protected. Refer to the SYS_REGLCTL register.\nNote2: This bit will be automatically cleared by hardware.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RSTEN : WDT Time-out Reset Enable Control (Write Protect)\nSetting this bit will enable the WDT time-out reset function If the WDT up counter value has not been cleared after the specific WDT reset delay period expires.\nNote: This bit is write protected. Refer to the SYS_REGLCTL register.
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RSTF : WDT Time-out Reset Flag\nThis bit indicates the system has been reset by WDT time-out reset or not.\nNote: This bit is cleared by writing 1 to it.
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

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IF : WDT Time-out Interrupt Flag\nThis bit will set to 1 while WDT up counter value reaches the selected WDT time-out interval\nNote: This bit is cleared by writing 1 to it.
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

WKEN : WDT Time-out Wake-up Function Control (Write Protect)\nIf this bit is set to 1, while WDT time-out interrupt flag IF (WDT_CTL[3]) is generated to 1 and interrupt enable bit INTEN (WDT_CTL[6]) is enabled, the WDT time-out interrupt signal will generate a wake-up trigger event to chip.\nNote1: This bit is write protected. Refer to the SYS_REGLCTL register.\nNote2: Chip can be woken-up by WDT time-out interrupt signal generated only if WDT clock source is selected to LIRC or LXT.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

WKF : WDT Time-out Wake-up Flag (Write Protect)\nThis bit indicates the interrupt wake-up flag status of WDT\nNote1: This bit is write protected. Refer to the SYS_REGLCTL register.\nNote2: This bit is cleared by writing 1 to it.
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

INTEN : WDT Time-out Interrupt Enable Control (Write Protect)\nIf this bit is enabled, the WDT time-out interrupt signal is generated and inform to CPU. \nNote: This bit is write protected. Refer to the SYS_REGLCTL register.
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

WDTEN : WDT Enable Control (Write Protect)\nNote1: This bit is write protected. Refer to the SYS_REGLCTL register.\nNote2: If CWDTEN[2:0] (combined by Config0[31] and Config0[4:3]) bits is not configure to 111, this bit is forced as 1 and user cannot change this bit to 0.
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TOUTSEL : WDT Time-out Interval Selection (Write Protect)\nThese three bits select the time-out interval period for the WDT.\nNote: This bit is write protected. Refer to the SYS_REGLCTL register.
bits : 8 - 10 (3 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ICEDEBUG : ICE Debug Mode Acknowledge Disable Control (Write Protect)\nWDT up counter will keep going no matter CPU is held by ICE or not.\nNote: This bit is write protected. Refer to the SYS_REGLCTL register.
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RSTDSEL : WDT Reset Delay Selection (Write Protect)\nWhen WDT time-out happened, user has a time named WDT Reset Delay Period to clear WDT counter by setting RSTCNT (WDT_CTL[0]) to prevent WDT time-out reset happened. User can select a suitable setting of RSTDSEL for different WDT Reset Delay Period.\nNote1: This bit is write protected. Refer to the SYS_REGLCTL register.\nNote2: This register will be reset to 0 if WDT time-out reset happened.
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.