UART_DAT

UART_MODEM

UART_MODEMSTS

UART_FIFOSTS

UART_INTSTS

UART_TOUT

UART_BAUD

UART_IRDA

UART_ALTCTL

UART_FUNCSEL

UART_INTEN

UART_FIFO

UART_LINE

DAT : Receiving/Transmit Buffer\nWrite Operation:\nBy writing one byte to this register, the data byte will be stored in transmitter FIFO. The UART Controller will send out the data stored in transmitter FIFO top location through the UART_TXD. Read Operation:\nBy reading this register, the UART will return an 8-bit data received from receiving FIFO.
bits : 0 - 7 (8 bit)
access : read-write

RTS : nRTS (Request-to-send) Signal Control\nThis bit is direct control internal nRTS signal active or not, and then drive the nRTS pin output with RTSACTLV bit configuration.\nNote1: This nRTS signal control bit is not effective when nRTS auto-flow control is enabled in UART function mode.\nNote2: This nRTS signal control bit is not effective when RS-485 auto direction mode (AUD) is enabled in RS-485 function mode.
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RTSACTLV : nRTS Pin Active Level\nThis bit defines the active level state of nRTS pin output.\nNote1: Refer to Figure 6.1310 and Figure 6.1311 for UART function mode.\nNote2: Refer to Figure 6.1314 and Figure 6.1315 for RS-485 function mode.
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RTSSTS : nRTS Pin Status (Read Only)\nThis bit mirror from nRTS pin output of voltage logic status.
bits : 13 - 13 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

CTSDETF : Detect nCTS State Change Flag (Read Only)\nThis bit is set whenever nCTS input has change state, and it will generate Modem interrupt to CPU when MODEMIEN (UART_INTEN [3]) is set to 1.\nNote: This bit is read only, but can be cleared by writing '1' to it.
bits : 0 - 0 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

CTSSTS : nCTS Pin Status (Read Only)\nThis bit mirror from nCTS pin input of voltage logic status.\nNote: This bit echoes when UART Controller peripheral clock is enabled, and nCTS multi-function port is selected.
bits : 4 - 4 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

CTSACTLV : nCTS Pin Active Level\nThis bit defines the active level state of nCTS pin input.
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RXOVIF : RX Overflow Error Interrupt Flag (Read Only)\nThis bit is set when RX FIFO overflow.\nIf the number of bytes of received data is greater than RX_FIFO (UART_DAT) size, 16 bytes this bit will be set.\nNote: This bit is read only, but can be cleared by writing '1' to it.
bits : 0 - 0 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

ABRDIF : Auto-baud Rate Detect Interrupt (Read Only) \nThis bit is set to logic '1' when auto-baud rate detect function is finished. \nNote: This bit is read only, but can be cleared by writing '1' to it.
bits : 1 - 1 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

ABRDTOIF : Auto-baud Rate Time-out Interrupt (Read Only) \nNote1: This bit is set to logic '1' in Auto-baud Rate Detect mode and the baud rate counter is overflow.\nNote2: This bit is read only, but can be cleared by writing '1' to it.
bits : 2 - 2 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

ADDRDETF : RS-485 Address Byte Detect Flag (Read Only) \nNote1: This field is used for RS-485 function mode and ADDRDEN (UART_ALTCTL[15]) is set to 1 to enable Address detection mode .\nNote2: This bit is read only, but can be cleared by writing '1' to it.
bits : 3 - 3 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

PEF : Parity Error Flag (Read Only)\nThis bit is set to logic 1 whenever the received character does not have a valid 'parity bit'.\nNote: This bit is read only, but can be cleared by writing '1' to it.
bits : 4 - 4 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

FEF : Framing Error Flag (Read Only)\nThis bit is set to logic 1 whenever the received character does not have a valid 'stop bit' (that is, the stop bit following the last data bit or parity bit is detected as logic 0).\nNote: This bit is read only, but can be cleared by writing '1' to it.
bits : 5 - 5 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

BIF : Break Interrupt Flag (Read Only)\nThis bit is set to logic 1 whenever the received data input (RX) is held in the 'spacing state' (logic 0) for longer than a full word transmission time (that is, the total time of 'start bit' + data bits + parity + stop bits).\nNote: This bit is read only, but can be cleared by writing '1' to it.
bits : 6 - 6 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

RXPTR : RX FIFO Pointer (Read Only)\nThis field indicates the RX FIFO Buffer Pointer. When UART receives one byte from external device, RXPTR increases one. When one byte of RX FIFO is read by CPU, RXPTR decreases one.\nThe Maximum value shown in RXPTR is 15. When the using level of RX FIFO Buffer equal to 16, the RXFULL bit is set to 1 and RXPTR will show 0. As one byte of RX FIFO is read by CPU, the RXFULL bit is cleared to 0 and RXPTR will show 15.
bits : 8 - 13 (6 bit)
access : read-only

RXEMPTY : Receiver FIFO Empty (Read Only)\nThis bit initiate RX FIFO empty or not.\nNote: When the last byte of RX FIFO has been read by CPU, hardware sets this bit high. It will be cleared when UART receives any new data.
bits : 14 - 14 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

RXFULL : Receiver FIFO Full (Read Only)\nThis bit initiates RX FIFO full or not.\nNote: This bit is set when the number of usage in RX FIFO Buffer is equal to 16, otherwise is cleared by hardware.
bits : 15 - 15 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

TXPTR : TX FIFO Pointer (Read Only)\nThis field indicates the TX FIFO Buffer Pointer. When CPU writes one byte into UART_DAT, TXPTR increases one. When one byte of TX FIFO is transferred to Transmitter Shift Register, TXPTR decreases one.\nThe Maximum value shown in TXPTR is 15. When the using level of TX FIFO Buffer equal to 16, the TXFULL bit is set to 1 and TXPTR will show 0. As one byte of TX FIFO is transferred to Transmitter Shift Register, the TXFULL bit is cleared to 0 and TXPTR will show 15.
bits : 16 - 21 (6 bit)
access : read-only

TXEMPTY : Transmitter FIFO Empty (Read Only)\nThis bit indicates TX FIFO empty or not.\nNote: When the last byte of TX FIFO has been transferred to Transmitter Shift Register, hardware sets this bit high. It will be cleared when writing data into DAT (TX FIFO not empty).
bits : 22 - 22 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

TXFULL : Transmitter FIFO Full (Read Only)\nThis bit indicates TX FIFO full or not.\nNote: This bit is set when the number of usage in TX FIFO Buffer is equal to 16, otherwise is cleared by hardware.
bits : 23 - 23 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

TXOVIF : TX Overflow Error Interrupt Flag (Read Only)\nIf TX FIFO (UART_DAT) is full, an additional write to UART_DAT will cause this bit to logic 1.\nNote: This bit is read only, but can be cleared by writing '1' to it.
bits : 24 - 24 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

TXEMPTYF : Transmitter Empty Flag (Read Only)\nThis bit is set by hardware when TX FIFO (UART_DAT) is empty and the STOP bit of the last byte has been transmitted.\nNote: This bit is cleared automatically when TX FIFO is not empty or the last byte transmission has not completed.
bits : 28 - 28 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

RDAIF : Receive Data Available Interrupt Flag (Read Only)\nWhen the number of bytes in the RX FIFO equals the RFITL then the RDAIF(UART_INTSTS[0]) will be set. If RDAIEN (UART_INTEN [0]) is enabled, the RDA interrupt will be generated.\nNote: This bit is read only and it will be cleared when the number of unread bytes of RX FIFO drops below the threshold level (RFITL(UART_FIFO[7:4]).
bits : 0 - 0 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

THREIF : Transmit Holding Register Empty Interrupt Flag (Read Only) \nThis bit is set when the last data of TX FIFO is transferred to Transmitter Shift Register. If THREIEN (UART_INTEN[1]) is enabled, the THRE interrupt will be generated.\nNote: This bit is read only and it will be cleared when writing data into UART_DAT (TX FIFO not empty).
bits : 1 - 1 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

RLSIF : Receive Line Interrupt Flag (Read Only) \nThis bit is set when the RX receive data have parity error, frame error or break error (at least one of 3 bits, BIF(UART_FIFOSTS[6]), FEF(UART_FIFOSTS[5]) and PEF(UART_FIFOSTS[4]), is set). If RLSIEN (UART_INTEN [2]) is enabled, the RLS interrupt will be generated.\nNote2: This bit is read only and reset to 0 when all bits of BIF (UART_FIFOSTS[6]), FEF(UART_FIFOSTS[5]) and PEF(UART_FIFOSTS[4]) are cleared.\nNote3: In RS-485 function mode, this bit is read only and reset to 0 when all bits of BIF (UART_FIFOSTS[6]), FEF(UART_FIFOSTS[5]) and PEF(UART_FIFOSTS[4]) and ADDRDETF (UART_FIFOSTS[3]) are cleared.
bits : 2 - 2 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

MODEMIF : Note: This bit is read only and reset to 0 when bit CTSDETF is cleared by a write 1 on CTSDETF(UART_MODEMSTS[0]).
bits : 3 - 3 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

RXTOIF : Time-out Interrupt Flag (Read Only)\nThis bit is set when the RX FIFO is not empty and no activities occurred in the RX FIFO and the time-out counter equal to TOIC. If TOUTIEN (UART_INTEN [4]) is enabled, the Tout interrupt will be generated.\nNote: This bit is read only and user can read UART_DAT (RX is in active) to clear it.
bits : 4 - 4 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

BUFERRIF : Buffer Error Interrupt Flag (Read Only)\nThis bit is set when the TX FIFO or RX FIFO overflows (TXOVIF (UART_FIFOSTS[24]) or RXOVIF (UART_FIFOSTS[0]) is set). When BERRIF (UART_INTSTS[5])is set, the transfer is not correct. If BFERRIEN (UART_INTEN [8]) is enabled, the buffer error interrupt will be generated.\nNote: This bit is read only. This bit is cleared if both of RXOVIF(UART_FIFOSTS[0]) and TXOVIF(UART_FIFOSTS[24]) are cleared to 0 by writing 1 to RXOVIF(UART_FIFOSTS[0]) and TXOVIF(UART_FIFOSTS[24]).
bits : 5 - 5 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

WKIF : UART Wake-up Interrupt Flag (Read Only)\nThis bit is set when DATWKIF (UART_INTSTS[17]) or CTSWKIF(UART_INTSTS[16]) is set to 1.\nNote: This bit is read only. This bit is cleared if both of DATWKIF (UART_INTSTS[17]) and CTSWKIF(UART_INTSTS[16]) are cleared to 0 by writing 1 to DATWKIF (UART_INTSTS[17]) and CTSWKIF (UART_INTSTS[17]).
bits : 6 - 6 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

RDAINT : Receive Data Available Interrupt Indicator (Read Only)\nThis bit is set if RDAIEN (UART_INTEN[0]) and RDAIF (UART_INTSTS[0]) are both set to 1.
bits : 8 - 8 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

THREINT : Transmit Holding Register Empty Interrupt Indicator (Read Only)\nThis bit is set if THREIEN (UART_INTEN[1])and THREIF(UART_INTSTS[1]) are both set to 1.
bits : 9 - 9 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

RLSINT : Receive Line Status Interrupt Indicator (Read Only) \nThis bit is set if RLSIEN (UART_INTEN[2]) and RLSIF(UART_INTSTS[2]) are both set to 1.
bits : 10 - 10 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

MODEMINT : MODEM Status Interrupt Indicator (Read Only)\nThis bit is set if MODEMIEN(UART_INTEN[3] and MODEMIF(UART_INTSTS[4]) are both set to 1
bits : 11 - 11 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

RXTOINT : Time-out Interrupt Indicator (Read Only)\nThis bit is set if TOUTIEN(UART_INTEN[4]) and RXTOIF(UART_INTSTS[4]) are both set to 1.
bits : 12 - 12 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

BUFERRINT : Buffer Error Interrupt Indicator (Read Only)\nThis bit is set if BFERRIEN(UART_INTEN[5] and BERRIF(UART_INTSTS[5]) are both set to 1.
bits : 13 - 13 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

CTSWKIF : nCTS Wake-up Interrupt Flag (Read Only)\nNote1: If WKCTSIEN (UART_INTEN[9])is enabled, the wake-up interrupt is generated.\nNote2: This bit is read only, but can be cleared by writing '1' to it.
bits : 16 - 16 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

DATWKIF : Data Wake-up Interrupt Flag (Read Only)\nThis bit is set if chip wake-up from power-down state by data wake-up.\nNote1: If WKDATIEN (UART_INTEN[10]) is enabled, the wake-up interrupt is generated.\nNote2: This bit is read only, but can be cleared by writing '1' to it.
bits : 17 - 17 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

HWRLSIF : in DMA Mode, Receive Line Status Flag (Read Only)\nThis bit is set when the RX receive data have parity error, frame error or break error (at least one of 3 bits, BIF (UART_FIFOSTS[6]), FEF (UART_FIFOSTS[5]) and PEF (UART_FIFOSTS[4]) is set). If RLSIEN (UART_INTEN [2]) is enabled, the RLS interrupt will be generated.\nNote2: In UART function mode, this bit is read only and reset to 0 when all bits of BIF(UART_FIFOSTS[6]), FEF(UART_FIFOSTS[5]) and PEF(UART_FIFOSTS[4]) are cleared. \nNote3: In RS-485 function mode, this bit is read only and reset to 0 when all bits of BIF(UART_FIFOSTS[6]), FEF(UART_FIFOSTS[5]) and PEF(UART_FIFOSTS[4]) and ADDRDETF (UART_FIFOSTS[3]) are cleared.
bits : 18 - 18 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

HWMODIF : in DMA Mode, MODEM Interrupt Flag (Read Only)\nNote: This bit is read only and reset to 0 when the bit UART_CTSDETF (US_MSR[0]) is cleared by writing 1 on CTSDETF (UART_CTSDETF [0]).
bits : 19 - 19 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

HWTOIF : in DMA Mode, Time-out Interrupt Flag (Read Only)\nThis bit is set when the RX FIFO is not empty and no activities occurred in the RX FIFO and the time-out counter equal to TOIC (UART_TOUT[7:0]). If TOUTIEN (UART_INTEN [4]) is enabled, the Tout interrupt will be generated. \nNote: This bit is read only and user can read UART_DAT (RX is in active) to clear it.
bits : 20 - 20 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

HWBUFEIF : in DMA Mode, Buffer Error Interrupt Flag (Read Only)\nThis bit is set when the TX or RX FIFO overflows (TXOVIF (UART_FIFOSTS [24]) or RXOVIF (UART_FIFOSTS[0]) is set). When BERRIF (UART_INTSTS[5]) is set, the transfer maybe is not correct. If BFERRIEN (UART_INTEN [5]) is enabled, the buffer error interrupt will be generated.\nNote: This bit is cleared when both TXOVIF (UART_FIFOSTS[24]]) and RXOVIF (UART_FIFOSTS[0]) are cleared.
bits : 21 - 21 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

HWRLSINT : in DMA Mode, Receive Line Status Interrupt Indicator (Read Only)\nThis bit is set if RLSIEN (UART_INTEN[2])and HWRLSIF(UART_INTSTS[18]) are both set to 1.
bits : 26 - 26 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

HWMODINT : in DMA Mode, MODEM Status Interrupt Indicator (Read Only)\nThis bit is set if MODEMIEN(UART_INTEN[3]) and HWMODIF(UART_INTSTS[3]) are both set to 1.
bits : 27 - 27 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

HWTOINT : in DMA Mode, Time-out Interrupt Indicator (Read Only)\nThis bit is set if TOUTIEN (UART_INTEN[4])and HWTOIF(UART_INTSTS[20]) are both set to 1.
bits : 28 - 28 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

HWBUFEINT : in DMA Mode, Buffer Error Interrupt Indicator (Read Only)\nThis bit is set if BFERRIEN (UART_INTEN[5]) and HWBEIF (UART_INTSTS[5])are both set to 1.
bits : 29 - 29 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

TOIC : Time-out Interrupt Comparator
bits : 0 - 7 (8 bit)
access : read-write

DLY : TX Delay Time Value \nThis field is used to programming the transfer delay time between the last stop bit and next start bit. The unit is bit time.
bits : 8 - 15 (8 bit)
access : read-write

BRD : Baud Rate Divider\nThe field indicates the baud rate divider. This filed is used in baud rate calculation. The detail description is shown in Table 6.133.
bits : 0 - 15 (16 bit)
access : read-write

EDIVM1 : Extra Divider for BAUD Rate Mode 1\nThis field is used for baud rate calculation in mode 1 and has no effect for baud rate calculation in mode 0 and mode 2. The detail description is shown in Table 6.133.
bits : 24 - 27 (4 bit)
access : read-write

BAUDM0 : BAUD Rate Mode Selection Bit 0\nThis bit is baud rate mode selection bit 0. UART provides three baud rate calculation modes. This bit combines with BAUDM1 (UART_BAUD[29]) to select baud rate calculation mode. The detail description is shown in Table 6.133.
bits : 28 - 28 (1 bit)
access : read-write

BAUDM1 : BAUD Rate Mode Selection Bit 1\nThis bit is baud rate mode selection bit 1. UART provides three baud rate calculation modes. This bit combines with BAUDM0 (UART_BAUD[28]) to select baud rate calculation mode. The detail description is shown in Table 6.133.\nNote: In IrDA mode must be operated in mode 0.
bits : 29 - 29 (1 bit)
access : read-write

TXEN : IrDA Receiver/Transmitter Selection Enable Bit
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TXINV : IrDA Inverse Transmitting Output Signal
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RXINV : IrDA Inverse Receive Input Signal
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RS485NMM : RS-485 Normal Multi-drop Operation Mode (NMM) \nNote: It cannot be active with RS-485_AAD operation mode.
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RS485AAD : RS-485 Auto Address Detection Operation Mode (AAD)\nNote: It cannot be active with RS-485_NMM operation mode.
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RS485AUD : RS-485 Auto Direction Function (AUD) \nNote: It can be active with RS-485_AAD or RS-485_NMM operation mode.
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADDRDEN : RS-485 Address Detection Enable Bit\nThis bit is used to enable RS-485 Address Detection mode. \nNote: This bit is used for RS-485 any operation mode.
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ABRIF : Auto-baud Rate Interrupt Flag (Read Only) \nThis bit is set when auto-baud rate detection function finished or the auto-baud rate counter was overflow and if ABRIEN(UART_INTEN [18]) is set then the auto-baud rate interrupt will be generated. \nNote: This bit is read only, but it can be cleared by writing '1' to ABRDTOIF (UART_FIFOSTS[2]) and ABRDIF(UART_FIFOSTS[1]).
bits : 17 - 17 (1 bit)
access : read-only

ABRDEN : Auto-baud Rate Detect Enable Bit\nThis bit is cleared automatically after auto-baud detection is finished.
bits : 18 - 18 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ABRDBITS : Auto-baud Rate Detect Bit Length \nNote : The calculation of bit number includes the START bit.
bits : 19 - 20 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ADDRMV : Address Match Value \nThis field contains the RS-485 address match values.\nNote: This field is used for RS-485 auto address detection mode.
bits : 24 - 31 (8 bit)
access : read-write

FUNCSEL : Function Select
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RDAIEN : Receive Data Available Interrupt Enable Bit
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

THREIEN : Transmit Holding Register Empty Interrupt Enable Bit
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RLSIEN : Receive Line Status Interrupt Enable Bit
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

MODEMIEN : Modem Status Interrupt Enable Bit
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RXTOIEN : RX Time-out Interrupt Enable Bit
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

BUFERRIEN : Buffer Error Interrupt Enable Bit
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

WKCTSIEN : nCTS Wake-up Interrupt Enable Bit
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

WKDATIEN : Incoming Data Wake-up Interrupt Enable Bit\nNote: Hardware will clear this bit when the incoming data wake-up operation finishes and 'system clock' work stable.
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TOCNTEN : Time-out Counter Enable Bit
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ATORTSEN : nRTS Auto-flow Control Enable Bit\nNote: When nRTS auto-flow is enabled, if the number of bytes in the RX FIFO equals the RTSTRGLV (UART_FIFO[19:16]), the UART will de-assert nRTS signal.
bits : 12 - 12 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ATOCTSEN : nCTS Auto-flow Control Enable Bit\nNote: When nCTS auto-flow is enabled, the UART will send data to external device if nCTS input assert (UART will not send data to device until nCTS is asserted).
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TXPDMAEN : TX DMA Enable Bit\nThis bit can enable or disable TX DMA service.
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RXPDMAEN : RX DMA Enable Bit\nThis bit can enable or disable RX DMA service.
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ABRIEN : Auto-baud Rate Interrupt Enable Bit
bits : 18 - 18 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RXRST : RX Field Software Reset\nWhen RXRST (UART_FIFO[1]) is set, all the byte in the receiver FIFO and RX internal state machine are cleared.\nNote: This bit will automatically clear at least 3 UART peripheral clock cycles.
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TXRST : TX Field Software Reset\nWhen TXRST (UART_FIFO[2]) is set, all the byte in the transmit FIFO and TX internal state machine are cleared.\nNote: This bit will automatically clear at least 3 UART peripheral clock cycles.
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RFITL : RX FIFO Interrupt Trigger Level\nWhen the number of bytes in the receive FIFO equals the RFITL, the RDAIF will be set (if RDAIEN (UART_INTEN [0]) enabled, and an interrupt will be generated).
bits : 4 - 7 (4 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RXOFF : Receiver Disable \nThe receiver is disabled or not (set 1 to disable receiver)\nNote: This bit is used for RS-485 Normal Multi-drop mode. It should be programmed before RS485NMM (UART_ALTCTL [8]) is programmed.
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RTSTRGLV : nRTS Trigger Level for Auto-flow Control Use\nNote: This field is used for auto nRTS flow control.
bits : 16 - 19 (4 bit)
access : read-write

Enumeration:

End of enumeration elements list.

WLS : Word Length Selection\nThis field sets UART word length.
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

NSB : Number of 'STOP Bit'
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PBE : Parity Bit Enable Bit\nNote : Parity bit is generated on each outgoing character and is checked on each incoming data.
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

EPE : Even Parity Enable Bit\nNote:This bit has effect only when PBE (UART_LINE[3]) is set.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SPE : Stick Parity Enable Bit\nNote: If PBE (UART_LINE[3]) and EPE (UART_LINE[4]) are logic 1, the parity bit is transmitted and checked as logic 0. If PBE (UART_LINE[3]) is 1 and EPE (UART_LINE[4]) is 0 then the parity bit is transmitted and checked as 1.
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

BCB : Break Control Bit\nNote: When this bit is set to logic 1, the serial data output (TX) is forced to the Spacing State (logic 0). This bit acts only on TX line and has no effect on the transmitter logic.
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.