\n
address_offset : 0x0 Bytes (0x0)
size : 0x88 byte (0x0)
mem_usage : registers
protection : not protected
MCU IRQ0 (BOD_INT) interrupt source identify
address_offset : 0x0 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0
INT_SRC : Interrupt Source\nDefine the interrupt sources for interrupt event.
bits : 0 - 3 (4 bit)
access : read-only
MCU IRQ4 (BOD_INT) interrupt source identify
address_offset : 0x10 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCU IRQ5 (BOD_INT) interrupt source identify
address_offset : 0x14 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCU IRQ6 (BOD_INT) interrupt source identify
address_offset : 0x18 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCU IRQ7 (BOD_INT) interrupt source identify
address_offset : 0x1C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCU IRQ8 (BOD_INT) interrupt source identify
address_offset : 0x20 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCU IRQ9 (BOD_INT) interrupt source identify
address_offset : 0x24 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCU IRQ10 (BOD_INT) interrupt source identify
address_offset : 0x28 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCU IRQ11 (BOD_INT) interrupt source identify
address_offset : 0x2C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCU IRQ12 (BOD_INT) interrupt source identify
address_offset : 0x30 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCU IRQ13 (BOD_INT) interrupt source identify
address_offset : 0x34 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCU IRQ14 (BOD_INT) interrupt source identify
address_offset : 0x38 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCU IRQ15 (BOD_INT) interrupt source identify
address_offset : 0x3C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCU IRQ1 (BOD_INT) interrupt source identify
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCU IRQ16 (BOD_INT) interrupt source identify
address_offset : 0x40 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCU IRQ017 (BOD_INT) interrupt source identify
address_offset : 0x44 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCU IRQ18 (BOD_INT) interrupt source identify
address_offset : 0x48 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCU IRQ19 (BOD_INT) interrupt source identify
address_offset : 0x4C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCU IRQ20 (BOD_INT) interrupt source identify
address_offset : 0x50 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCU IRQ21 (BOD_INT) interrupt source identify
address_offset : 0x54 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCU IRQ22 (BOD_INT) interrupt source identify
address_offset : 0x58 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCU IRQ23 (BOD_INT) interrupt source identify
address_offset : 0x5C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCU IRQ24 (BOD_INT) interrupt source identify
address_offset : 0x60 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCU IRQ25 (BOD_INT) interrupt source identify
address_offset : 0x64 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCU IRQ26 (BOD_INT) interrupt source identify
address_offset : 0x68 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCU IRQ27 (BOD_INT) interrupt source identify
address_offset : 0x6C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCU IRQ28 (BOD_INT) interrupt source identify
address_offset : 0x70 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCU IRQ29 (BOD_INT) interrupt source identify
address_offset : 0x74 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCU IRQ30 (BOD_INT) interrupt source identify
address_offset : 0x78 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCU IRQ31 (BOD_INT) interrupt source identify
address_offset : 0x7C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCU IRQ2 (BOD_INT) interrupt source identify
address_offset : 0x8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NMI source interrupt select control register
address_offset : 0x80 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NMI_SEL : The NMI interrupt to Cortex-M0 can be selected from one of the interrupt[31:0]\nThe NMI_SEL bit[4:0] used to select the NMI interrupt source
bits : 0 - 4 (5 bit)
access : read-write
MCU interrupt request source register
address_offset : 0x84 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCU_IRQ : MCU IRQ Source Register
The MCU_IRQ collects all the interrupts from the peripherals and generates the synchronous interrupt to MCU Cortex-M0. There are two modes to generate interrupt to Cortex-M0, the normal mode and test mode.
In Test mode, all the interrupts from peripheral are blocked, and the interrupts sent to MCU are replaced by set the bit31~bit0.
When the MCU_IRQ[n] is 0 , setting MCU_IRQ[n] 1 will generate an interrupt to Cortex_M0 NVIC[n].
When the MCU_IRQ[n] is 1 (means an interrupt is asserted), setting the MCU_bit[n] will clear the interrupt
Set MCU_IRQ[n] 0 : no any effect
bits : 0 - 31 (32 bit)
access : read-write
MCU IRQ3 (BOD_INT) interrupt source identify
address_offset : 0xC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !
This website is sponsored by Embeetle, an IDE designed from scratch for embedded software developers.