WDT_CTL (CTL)

WDT_INTEN (INTEN)

WDT_STATUS (STATUS)

RSTCNT : Reset Watchdog TimerCounter (Write Protect)\nPlease refer to open lock sequence to program it.\nSetting this bit will reset the Watchdog timer counter.\nNote: This bit will be auto cleared after 1 PCLK clock cycle.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RSTEN : Watchdog Timer Reset Function EnableBit (Write Protect)\nPlease refer to open lock sequence to program it.\nSetting this bit will enable the Watchdog timer reset function.
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

WKEN : Watchdog Timer Wake-up Function EnableBit(Write Protect)\nPlease refer to open lock sequence to program it.
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

WDTEN : Watchdog Timer EnableBit(Write Protect)\nPlease refer to open lock sequence to program it.
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

WTIS : Watchdog Timer Interval Selection(Write Protect)\nPlease refer to open lock sequence to program it.\nThe three bits select the time-out interval for the Watchdog timer. This count is free running counter.\nPlease refer toTable6.111.
bits : 4 - 6 (3 bit)
access : read-write

WTRDSEL : Watchdog Timer Reset Delay Selection\nWhen watchdog time-out happened, software has a time named watchdog reset delay period to clear watchdog timer to prevent watchdog reset happened. Software can select a suitable value of watchdog reset delay period for different watchdog time-out period.\nNote: This bit will be reset if watchdog reset happened
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

DBGEN : WDT Debug Mode Enable Control (Write Protect)
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

WDTIEN : Watchdog Timer Time-out Interrupt EnableBit
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

WDTIF : Watchdog Timer Time-out Interrupt StatusFlag If the Watchdog timer time-out interrupt is enabled, then the hardware will set this bit to indicate that the Watchdog timer time-out interrupt has occurred. If the Watchdog timer time-out interrupt is not enabled, then this bit indicates that a time-out period has elapsed. Note:This bit is read only, but can be cleared by writing 1 to it.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RSTF : Watchdog Timer Reset StatusFlag When the Watchdog timer initiates a reset, the hardware will set this bit. This flag can be read by software to determine the source of reset. Software is responsible to clear it manually by writing 1 to it. If RSTEN is disabled, then the Watchdog timer has no effect on this bit. Note: This bit is read only, but can be cleared by writing 1 to it.
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

WKF : Watchdog Timer Wake-up StatusFlag If Watchdog timer causes system to wake up from Power-down mode, this bit will be set to 1. It must be cleared by software with a write 1 to this bit. Note1: When system in Power-down mode and watchdog time-out, hardware will set WKF and WDTIF. Note2: After one engine clock, this bit can be cleared by writing 1 to it
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.