\n

ACMP

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection : not protected

Registers

ACMP_CR0 (CR0)

ACMP_MODCR0 (MODCR0)

ACMP_CR1 (CR1)

ACMP_SR (SR)

ACMP_RVCR (RVCR)


ACMP_CR0 (CR0)

Analog Comparator 0 Control Register
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ACMP_CR0 ACMP_CR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACMP0EN ACMP0IE ACMP0_HYSEN CN0 ACMP0_EX ACOMP0_PN_AutoEx ACMP0_FILTER CPO0_SEL CPP0SEL ACMP0_WKEUP_EN

ACMP0EN : Comparator ACMP0 Enable Control\nNote: Comparator output needs to wait 10 us stable time after ACMP0EN is set.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

ACMP0IE : Comparator ACMP0 Interrupt Enable Control Note: Interrupt generated if ACMP0IE bit is set to 1 after ACMP0 output changed.
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

ACMP0 interrupt function Disabled

#1 : 1

ACMP0 interrupt function Enabled

End of enumeration elements list.

ACMP0_HYSEN : Comparator ACMP0 Hysteresis Enable Control\n
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

ACMP0 Hysteresis function Disabled

#1 : 1

ACMP0 Hysteresis function Enabled. The typical range is 20mV

End of enumeration elements list.

CN0 : Comparator ACMP0 Negative Input Selection\n
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 0

The comparator reference pin ACMP0_N is selected as the negative comparator input

#01 : 1

The internal comparator reference voltage (CRV) is selected as the negative comparator input

#10 : 2

The internal reference voltage (Int_VREF) is selected as the negative comparator input

#11 : 3

The AGND is selected as the negative comparator input

End of enumeration elements list.

ACMP0_EX : Comparator ACMP0 Swap\nNote: This bit swaps the comparator inputs and inverts the comparator output.
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

No swap to the comparator inputs and output

#1 : 1

Swap the comparator inputs with ACMP0_Px and ACMP0_N, and invert the polarity of comparator 0 output

End of enumeration elements list.

ACOMP0_PN_AutoEx : Comparator Analog ACMP0_Px ACMP0_N Input Swap Function Automatically This bit is only for sigma-delta ADC mode use.
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled to swap comparator ACMP0 input function, ACMP0_Px and ACMP0_N, automatically

#1 : 1

Enabled to swap comparator ACMP0 input function, ACMP0_Px and ACMP0_N, automatically

End of enumeration elements list.

ACMP0_FILTER : Comparator ACMP0 Output Filter\n
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

#0 : 0

Comparator ACMP0 output is not filtered by internal RC filter

#1 : 1

Comparator ACMP0 output is filtered by internal RC filter

End of enumeration elements list.

CPO0_SEL : Comparator ACMP0 Output to Timer Path Selection\n
bits : 21 - 21 (1 bit)
access : read-write

Enumeration:

#0 : 0

Comparator ACMP0 output to Timer is through internal path

#1 : 1

Comparator ACMP0 output to Timer is through external pin (through PF.4)

End of enumeration elements list.

CPP0SEL : Comparator ACMP0 Positive Input Selection\n
bits : 29 - 30 (2 bit)
access : read-write

Enumeration:

#00 : 0

Input from PA.4

#01 : 1

Input from PA.3

#10 : 2

Input from PA.2

#11 : 3

Input from PA.1

End of enumeration elements list.

ACMP0_WKEUP_EN : Comparator ACMP0 Wake-up Enable Control\n
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

#0 : 0

Wake-up function Disabled

#1 : 1

Wake-up function Enabled when the system enters Power-down mode

End of enumeration elements list.


ACMP_MODCR0 (MODCR0)

Analog Comparator 0 Mode Control Register
address_offset : 0x10 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ACMP_MODCR0 ACMP_MODCR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MOD_SEL TMR_SEL TMR_TRI_LV CH_DIS_PIN_SEL CH_DIS_FUN_SEL START

MOD_SEL : Comparator Mode Selection\n
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

#00 : 0

Normal Comparator Mode

#01 : 1

Sigma-Delta ADC Mode

#10 : 2

Single Slope ADC Mode

#11 : 3

Reserved

End of enumeration elements list.

TMR_SEL : Analog Comparator 0 Co-operation Timer Selection\n
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Select TIMER0 as co-operation Timer

#1 : 1

Select TIMER2 as co-operation Timer

End of enumeration elements list.

TMR_TRI_LV : Timer Trigger Level\nThis bit is for Sigma-Delta ADC Mode.\n
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Comparator Output Low to High to Enable Timer

#1 : 1

Comparator Output High to Low to Enable Timer

End of enumeration elements list.

CH_DIS_PIN_SEL : Charge or Discharge Pin Selection\n
bits : 4 - 6 (3 bit)
access : read-write

Enumeration:

#000 : 0

PA.1

#001 : 1

PA.2

#010 : 2

PA.3

#011 : 3

PA.4

#100 : 4

PA.5

#101 : 5

PA.6

#110 : 6

PA.14

#111 : 7

PF.5

End of enumeration elements list.

CH_DIS_FUN_SEL : Charge or Discharge Pin Function Option\nThis bit is for Single Slope ADC Mode only.\n
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

Drive low on charge pin to dis-charge capacitor and drive high on charge pin to charge capacitor

#1 : 1

Drive high on charge pin to dis-charge capacitor and drive low on charge pin to charge capacitor

End of enumeration elements list.

START : Start ADC Mode\n
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

#0 : 0

Stop Sigma-Delta ADC Mode or Single Slope ADC Mode

#1 : 1

Start Sigma-Delta ADC Mode or Single Slope ADC Mode

End of enumeration elements list.


ACMP_CR1 (CR1)

Analog Comparator 1 Control Register
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ACMP_CR1 ACMP_CR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACMP1EN ACMP1IE ACMP1_HYSEN CN1 ACMP1_WKEUP_EN

ACMP1EN : Comparator ACMP1 Enable Control\nNote: Comparator output needs to wait 10 us stable time after ACMP1EN is set.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

ACMP1IE : Comparator ACMP1 Interrupt Enable Control Note: Interrupt is generated if ACMP0IE bit is set to 1 after ACMP1 output changed.
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

ACMP1 interrupt function Disabled

#1 : 1

ACMP1 interrupt function Enabled

End of enumeration elements list.

ACMP1_HYSEN : Comparator ACMP1 Hysteresis Enable Control\n
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

ACMP1 Hysteresis function Disabled

#1 : 1

ACMP1 Hysteresis function Enabled. The typical range is 20mV

End of enumeration elements list.

CN1 : Comparator ACMP1 Negative Input Selection\n
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#00 : 0

The comparator reference pin ACMP0_N is selected as the negative comparator input

#01 : 1

The internal comparator reference voltage (CRV) is selected as the negative comparator input

#10 : 2

The internal reference voltage (Int_VREF) is selected as the negative comparator input

#11 : 3

The AGND is selected as the negative comparator input

End of enumeration elements list.

ACMP1_WKEUP_EN : Comparator ACMP1 Wake-up Enable Control\n
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

#0 : 0

Wake-up function Disabled

#1 : 1

Wake-up function Enabled when the system enters Power-down mode

End of enumeration elements list.


ACMP_SR (SR)

Analog Comparator Status Register
address_offset : 0x8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ACMP_SR ACMP_SR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACMPF0 ACMPF1 CO0 CO1

ACMPF0 : Comparator ACMP0 Flag This bit is set by hardware whenever the comparator 0 output changes state. This will generate an interrupt if ACMP0IE set. Note: Write 1 to clear this bit to 0.
bits : 0 - 0 (1 bit)
access : read-write

ACMPF1 : Comparator ACMP1 Flag This bit is set by hardware whenever the comparator 1 output changes state. This will generate an interrupt if ACMP1IE set. Note: Write 1 to clear this bit to 0.
bits : 1 - 1 (1 bit)
access : read-write

CO0 : Comparator ACMP0 Output\n
bits : 2 - 2 (1 bit)
access : read-write

CO1 : Comparator ACMP1 Output\n
bits : 3 - 3 (1 bit)
access : read-write


ACMP_RVCR (RVCR)

Analog Comparator Reference Voltage Control Register
address_offset : 0xC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ACMP_RVCR ACMP_RVCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CRVS CRV_EN CRVSRC_SEL

CRVS : Comparator Reference Voltage Setting\n
bits : 0 - 3 (4 bit)
access : read-write

CRV_EN : CRV Enable Control\n
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

CRV Disabled

#1 : 1

CRV Enabled

End of enumeration elements list.

CRVSRC_SEL : CRV Source Selection\n
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

From AVDD

#1 : 1

From Int_VREF

End of enumeration elements list.



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