BPWM_CLKPSC (CLKPSC)

BPWM_CMPDAT0 (CMPDAT0)

BPWM_CNT0 (CNT0)

BPWM_PERIOD1 (PERIOD1)

BPWM_CMPDAT1 (CMPDAT1)

BPWM_CNT1 (CNT1)

BPWM_CLKDIV (CLKDIV)

BPWM_INTEN (INTEN)

BPWM_INTSTS (INTSTS)

BPWM_POEN (POEN)

BPWM_CTL (CTL)

BPWM_PERIOD0 (PERIOD0)

CLKPSC01 : Clock Prescaler\nClock input is divided by (CLKPSC01 + 1) before it is fed to the corresponding PWM-timer\n
bits : 0 - 7 (8 bit)
access : read-write

DTI01 : Dead-zone Interval for Pair of Channel 0 and Channel 1\nThese 8-bit determine the Dead-zone length.\n
bits : 16 - 23 (8 bit)
access : read-write

CMP : PWM Comparator Register\nCMP determines the PWM duty.\nNote: Any write to PERIOD will take effect in next PWM cycle.
bits : 0 - 15 (16 bit)
access : read-write

CNT : PWM Data Register\nUser can monitor CNT to know the current value in 16-bit counter.
bits : 0 - 15 (16 bit)
access : read-only

CLKDIV0 : PWM Timer 0 Clock Source Divider Selection\nSelect clock source divider for PWM timer 0.\n(Table is the same as CLKDIV1)
bits : 0 - 2 (3 bit)
access : read-write

CLKDIV1 : PWM Timer 1 Clock Source Divider Selection\nSelect clock source divider for PWM timer 1.\n
bits : 4 - 6 (3 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PIEN0 : BPWM Channel 0 Period Interrupt Enable Control\n
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PIEN1 : BPWM Channel 1 Period Interrupt Enable Control\n
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

DIEN0 : BPWM Channel 0 Duty Interrupt Enable Control\n
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

DIEN1 : BPWM Channel 1 Duty Interrupt Enable Control\n
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PINTTYPE : BPWM Interrupt Period Type Selection\nNote: This bit is effective when BPWM in Center-aligned type only.
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PIF0 : BPWM Channel 0 Period Interrupt Status\nThis bit is set by hardware when BPWM0 counter reaches the requirement of interrupt (depend on PINTTYPE bit of PWM_INTEN register), software can write 1 to clear this bit to 0.
bits : 0 - 0 (1 bit)
access : read-write

PIF1 : BPWM Channel 1 Period Interrupt Status\nThis bit is set by hardware when BPWM1 counter reaches the requirement of interrupt (depend on PINTTYPE bit of PWM_INTEN register), software can write 1 to clear this bit to 0.
bits : 1 - 1 (1 bit)
access : read-write

DIF0 : BPWM Channel 0 Duty Interrupt Flag\nFlag is set by hardware when channel 0 BPWM counter down count and reaches BPWM_CMPDAT 0, software can clear this bit by writing a one to it.\nNote: If CMP equal to PERIOD, this flag is not working in Edge-aligned type selection
bits : 8 - 8 (1 bit)
access : read-write

DIF1 : BPWM Channel 1 Duty Interrupt Flag\nFlag is set by hardware when channel 1 BPWM counter down count and reaches BPWM_CMPDAT 1, software can clear this bit by writing a one to it.\nNote: If CMP equal to PERIOD, this flag is not working in Edge-aligned type selection
bits : 9 - 9 (1 bit)
access : read-write

POEN0 : Channel 0 Output Enable Register\nNote: The corresponding GPIO pin must also be switched to BPWM function
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

POEN1 : Channel 1 Output Enable Register\nNote: The corresponding GPIO pin must also be switched to BPWM function
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CNTEN0 : PWM-timer 0 Enable Control\n
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PINV0 : PWM-timer 0 Output Polar Inverse Enable Control\n
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CMPINV0 : PWM-timer 0 Output Inverter Enable Control\n
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CNTMODE0 : PWM-timer 0 Auto-reload/One-shot Mode\nNote: If there is a transition at this bit, it will cause BPWM_PERIOD0 and BPWM_CMPDAT0 be cleared.
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

DTCNT01 : Dead-zone 0 Generator Enable Control\nNote: When Dead-zone generator is enabled, the pair of PWM0 and PWM1 becomes a complementary pair.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CNTEN1 : PWM-timer 1 Enable Control\n
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PINV1 : PWM-timer 1 Output Polar Inverse Enable Control\n
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CMPINV1 : PWM-timer 1 Output Inverter Enable Control\n
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CNTMODE1 : PWM-timer 1 Auto-reload/One-shot Mode\nNote: If there is a transition at this bit, it will cause BPWM_PERIOD1 and BPWM_CMPDAT1 be cleared.
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CNTTYPE01 : PWM01 Aligned Type Selection\n
bits : 30 - 30 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PERIOD : Basic PWM Period Counter Register\nPERIOD data determines the PWM period.\nFor Edge-aligned type:\nNote: Any write to PERIOD will take effect in next PWM cycle.\nNote: When PWM operating at Center-aligned type, PERIOD value should be set between 0x0000 to 0xFFFE. If PERIOD equal to 0xFFFF, the PWM will work unpredictable.\nNote: When PERIOD value is set to 0, PWM output is always high.
bits : 0 - 15 (16 bit)
access : read-write