Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection : not protected
External Bus Interface General Control Register
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ExtEN : EBI Enable Control\nThis bit is the functional enable bit for EBI.\n
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
EBI function Disabled
#1 : 1
EBI function Enabled
End of enumeration elements list.
ExtBW16 : EBI Data Width 16-bit / 8-bit\nThis bit defines if the data bus is 8-bit or 16-bit.\n
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
EBI data width is 8 bit
#1 : 1
EBI data width is 16 bit
End of enumeration elements list.
MCLKDIV : External Output Clock Divider\nThe frequency of EBI output clock (MCLK) is controlled by MCLKDIV as follows:\nNote: The default value of output clock is HCLK/1.
bits : 8 - 10 (3 bit)
access : read-write
Enumeration:
#000 : 0
MCLK frequency is HCLK/1
#001 : 1
MCLK frequency is HCLK/2
#010 : 2
MCLK frequency is HCLK/4
#011 : 3
MCLK frequency is HCLK/8
#100 : 4
MCLK frequency is HCLK/16
#101 : 5
MCLK frequency is HCLK/32
End of enumeration elements list.
ExttALE : Expand Time of ALE\nThis field is used to control the ALE pulse width (tALE) for address latch.\n
bits : 16 - 18 (3 bit)
access : read-write
External Bus Interface Timing Control Register
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ExttACC : EBI Data Access Time\nExttACC defines data access time (tACC).\n
bits : 3 - 7 (5 bit)
access : read-write
ExttAHD : EBI Data Access Hold Time\nExttAHD defines data access hold time (tAHD).\n
bits : 8 - 10 (3 bit)
access : read-write
ExtIW2X : Idle State Cycle After Write\nWhen write action is finished, idle state is inserted and nCS signal return to high if ExtIW2X is not 0.\n
bits : 12 - 15 (4 bit)
access : read-write
ExtIR2R : Idle State Cycle Between Read-Read\nWhen read action is finished and the next action is going to read, idle state is inserted and nCS signal return to high if ExtIR2R is not 0.\n
bits : 24 - 27 (4 bit)
access : read-write
External Bus Interface General Control Register 2
address_offset : 0x8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WBUFF_EN : EBI Write Buffer Enable Control\nEnable this function to improve CPU and EBI access performance.\n
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
EBI write buffer Disabled
#1 : 1
EBI write buffer Enabled
End of enumeration elements list.
RAHD_OFF : Access Hold Time Disable Control When Read\n
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
tAHD is controlled by ExttAHD[2:0] when read through EBI
#1 : 1
Zero tAHD when read through EBI
End of enumeration elements list.
WAHD_OFF : Access Hold Time Disable Control When Write\n
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
tAHD is controlled by ExttAHD[2:0] when write through EBI
#1 : 1
Zero tAHD when write through EBI
End of enumeration elements list.
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