\n

INT

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x88 byte (0x0)
mem_usage : registers
protection : not protected

Registers

IRQ0_SRC

IRQ4_SRC

IRQ5_SRC

IRQ6_SRC

IRQ7_SRC

IRQ8_SRC

IRQ9_SRC

IRQ10_SRC

IRQ11_SRC

IRQ12_SRC

IRQ13_SRC

IRQ14_SRC

IRQ15_SRC

IRQ1_SRC

IRQ16_SRC

IRQ17_SRC

IRQ18_SRC

IRQ19_SRC

IRQ20_SRC

IRQ21_SRC

IRQ22_SRC

IRQ23_SRC

IRQ24_SRC

IRQ25_SRC

IRQ26_SRC

IRQ27_SRC

IRQ28_SRC

IRQ29_SRC

IRQ30_SRC

IRQ31_SRC

IRQ2_SRC

NMI_CON

MCU_IRQ

IRQ3_SRC


IRQ0_SRC

IRQ0 (BOD) interrupt source identity
address_offset : 0x0 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ0_SRC IRQ0_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BOD_INT

BOD_INT : Identify BOD interrupt source.
bits : 0 - 0 (1 bit)
access : read-only


IRQ4_SRC

IRQ4 (P0-P4) interrupt source identity
address_offset : 0x10 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ4_SRC IRQ4_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0_INT P1_INT P2_INT P3_INT P4_INT

P0_INT : Identify P0 interrupt source.
bits : 0 - 0 (1 bit)
access : read-only

P1_INT : Identify P1 interrupt source.
bits : 1 - 1 (1 bit)
access : read-only

P2_INT : Identify P2 interrupt source.
bits : 2 - 2 (1 bit)
access : read-only

P3_INT : Identify P3 interrupt source.
bits : 3 - 3 (1 bit)
access : read-only

P4_INT : Identify P4 interrupt source.
bits : 4 - 4 (1 bit)
access : read-only


IRQ5_SRC

IRQ5 (P5-PA) interrupt source identity
address_offset : 0x14 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ5_SRC IRQ5_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P5_INT P6_INT P7_INT P8_INT P9_INT PA_INT

P5_INT : Identify P5 interrupt source.
bits : 0 - 0 (1 bit)
access : read-only

P6_INT : Identify P6 interrupt source.
bits : 1 - 1 (1 bit)
access : read-only

P7_INT : Identify P7 interrupt source.
bits : 2 - 2 (1 bit)
access : read-only

P8_INT : Identify P8 interrupt source.
bits : 3 - 3 (1 bit)
access : read-only

P9_INT : Identify P9 interrupt source.
bits : 4 - 4 (1 bit)
access : read-only

PA_INT : Identify PA interrupt source.
bits : 5 - 5 (1 bit)
access : read-only


IRQ6_SRC

IRQ6 (BPWM) interrupt source identity
address_offset : 0x18 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ6_SRC IRQ6_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BPWM0_INT BPWM1_INT

BPWM0_INT : Identify BPWM0 interrupt source.
bits : 0 - 0 (1 bit)
access : read-only

BPWM1_INT : Identify BPWM1 interrupt source.
bits : 1 - 1 (1 bit)
access : read-only


IRQ7_SRC

IRQ7 (ADC0) interrupt source identity
address_offset : 0x1C Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ7_SRC IRQ7_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC0_INT

ADC0_INT : Identify ADC0 interrupt source.
bits : 0 - 0 (1 bit)
access : read-only


IRQ8_SRC

IRQ8 (TMR0) interrupt source identity
address_offset : 0x20 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ8_SRC IRQ8_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TMR0_INT

TMR0_INT : Identify TMR0 interrupt source.
bits : 0 - 0 (1 bit)
access : read-only


IRQ9_SRC

IRQ9 (TMR1) interrupt source identity
address_offset : 0x24 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ9_SRC IRQ9_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TMR1_INT

TMR1_INT : Identify TMR1 interrupt source.
bits : 0 - 0 (1 bit)
access : read-only


IRQ10_SRC

IRQ10 (TMR2) interrupt source identity
address_offset : 0x28 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ10_SRC IRQ10_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TMR2_INT

TMR2_INT : Identify TMR2 interrupt source.
bits : 0 - 0 (1 bit)
access : read-only


IRQ11_SRC

IRQ11 (TMR3) interrupt source identity
address_offset : 0x2C Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ11_SRC IRQ11_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TMR3_INT

TMR3_INT : Identify TMR3 interrupt source.
bits : 0 - 0 (1 bit)
access : read-only


IRQ12_SRC

IRQ12 (UART0) interrupt source identity
address_offset : 0x30 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ12_SRC IRQ12_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UART0_INT

UART0_INT : Identify UART0 interrupt source.
bits : 0 - 0 (1 bit)
access : read-only


IRQ13_SRC

IRQ13 (UART1) interrupt source identity
address_offset : 0x34 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ13_SRC IRQ13_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UART1_INT

UART1_INT : Identify UART1 interrupt source.
bits : 0 - 0 (1 bit)
access : read-only


IRQ14_SRC

IRQ14 (SPI0) interrupt source identity
address_offset : 0x38 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ14_SRC IRQ14_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SPI0_INT

SPI0_INT : Identify SPI0 interrupt source.
bits : 0 - 0 (1 bit)
access : read-only


IRQ15_SRC

IRQ15 (SPI1) interrupt source identity
address_offset : 0x3C Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ15_SRC IRQ15_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SPI1_INT

SPI1_INT : Identify SPI1 interrupt source.
bits : 0 - 0 (1 bit)
access : read-only


IRQ1_SRC

IRQ1 (WDT) interrupt source identity
address_offset : 0x4 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ1_SRC IRQ1_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WDT_INT

WDT_INT : Identify WDT interrupt source.
bits : 0 - 0 (1 bit)
access : read-only


IRQ16_SRC

IRQ16 (SPI2) interrupt source identity
address_offset : 0x40 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ16_SRC IRQ16_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SPI2_INT

SPI2_INT : Identify SPI2 interrupt source.
bits : 0 - 0 (1 bit)
access : read-only


IRQ17_SRC

IRQ17 (MDU) interrupt source identity
address_offset : 0x44 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ17_SRC IRQ17_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MDU_INT

MDU_INT : Identify MDU interrupt source.
bits : 0 - 0 (1 bit)
access : read-only


IRQ18_SRC

IRQ18 (I2C) interrupt source identity
address_offset : 0x48 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ18_SRC IRQ18_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 I2C_INT

I2C_INT : Identify I2C0 interrupt source.
bits : 0 - 0 (1 bit)
access : read-only


IRQ19_SRC

IRQ19 (Reserved) interrupt source identity
address_offset : 0x4C Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ19_SRC IRQ19_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

IRQ20_SRC

IRQ20 (CAN) interrupt source identity
address_offset : 0x50 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ20_SRC IRQ20_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CAN_INT

CAN_INT : Identify CAN interrupt source.
bits : 0 - 0 (1 bit)
access : read-only


IRQ21_SRC

IRQ21 (EPWM0) interrupt source identity
address_offset : 0x54 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ21_SRC IRQ21_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EPWM0_INT

EPWM0_INT : Identify EPWM0 interrupt source.
bits : 0 - 0 (1 bit)
access : read-only


IRQ22_SRC

IRQ22 (EPWM1) interrupt source identity
address_offset : 0x58 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ22_SRC IRQ22_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EPWM1_INT

EPWM1_INT : Identify EPWM1 interrupt source.
bits : 0 - 0 (1 bit)
access : read-only


IRQ23_SRC

IRQ23 (CAP0) interrupt source identity
address_offset : 0x5C Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ23_SRC IRQ23_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CAP0_INT

CAP0_INT : Identify CAP0 interrupt source.
bits : 0 - 0 (1 bit)
access : read-only


IRQ24_SRC

IRQ24 (CAP1) interrupt source identity
address_offset : 0x60 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ24_SRC IRQ24_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CAP1_INT

CAP1_INT : Identify CAP1 interrupt source.
bits : 0 - 0 (1 bit)
access : read-only


IRQ25_SRC

IRQ25 (ACMP) interrupt source identity
address_offset : 0x64 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ25_SRC IRQ25_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACMP_INT

ACMP_INT : Identify ACMP interrupt source.
bits : 0 - 0 (1 bit)
access : read-only


IRQ26_SRC

IRQ26 (QEI0) interrupt source identity
address_offset : 0x68 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ26_SRC IRQ26_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 QEI0_INT

QEI0_INT : Identify QEI0 interrupt source.
bits : 0 - 0 (1 bit)
access : read-only


IRQ27_SRC

IRQ27 (QEI1) interrupt source identity
address_offset : 0x6C Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ27_SRC IRQ27_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 QEI1_INT

QEI1_INT : Identify QEI1 interrupt source.
bits : 0 - 0 (1 bit)
access : read-only


IRQ28_SRC

IRQ28 (PWRWU) interrupt source identity
address_offset : 0x70 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ28_SRC IRQ28_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PWRWU_INT

PWRWU_INT : Identify PWRWU interrupt source.
bits : 0 - 0 (1 bit)
access : read-only


IRQ29_SRC

IRQ29 (ADC1) interrupt source identity
address_offset : 0x74 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ29_SRC IRQ29_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC1_INT

ADC1_INT : Identify ADC1 interrupt source.
bits : 0 - 0 (1 bit)
access : read-only


IRQ30_SRC

IRQ30 (ADC2) interrupt source identity
address_offset : 0x78 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ30_SRC IRQ30_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC2_INT

ADC2_INT : Identify ADC2 interrupt source.
bits : 0 - 0 (1 bit)
access : read-only


IRQ31_SRC

IRQ31 (ADC3) interrupt source identity
address_offset : 0x7C Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ31_SRC IRQ31_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADC3_INT

ADC3_INT : Identify ADC3 interrupt source.
bits : 0 - 0 (1 bit)
access : read-only


IRQ2_SRC

IRQ2 (EINT0) interrupt source identity
address_offset : 0x8 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ2_SRC IRQ2_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EINT0

EINT0 : Identify EINT0 interrupt source.\nEINT0 is external interrupt 0 from P3.2.
bits : 0 - 0 (1 bit)
access : read-only


NMI_CON

NMI interrupt control register
address_offset : 0x80 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NMI_CON NMI_CON read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NMI_SEL NMI_EN

NMI_SEL : NMI Interrupt Source Selection\nThe NMI interrupt to Cortex-M0 can be selected from one of IRQ0~IRQ31 by setting NMI_SEL with IRQ number. The default NMI interrupt is assigned as IRQ0 interrupt if NMI is enabled by setting NMI_SEL[8].
bits : 0 - 4 (5 bit)
access : read-write

NMI_EN : NMI Interrupt Enable
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

#0 : 0

IRQ0~31 assigned to NMI Disabled. (NMI still can be software triggered by setting its pending flag.)

#1 : 1

IRQ0~31 assigned to NMI Enabled

End of enumeration elements list.


MCU_IRQ

MCU interrupt request source register
address_offset : 0x84 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCU_IRQ MCU_IRQ read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MCU_IRQ

MCU_IRQ : MCU IRQ Source Register\nThe MCU_IRQ collects all the interrupts from the peripherals and generates the synchronous interrupt to Cortex-M0.\nThe MCU_IRQ collects all interrupts from each peripheral and synchronizes them and then interrupts the Cortex-M0.\nWhen the MCU_IRQ[n] is 0:
bits : 0 - 31 (32 bit)
access : read-write

Enumeration:

0 : 0

No effect

1 : 1

Generate an interrupt to Cortex_M0 NVIC[n].\nClear the interrupt and MCU_IRQ[n]

End of enumeration elements list.


IRQ3_SRC

IRQ3 (EINT1) interrupt source identity
address_offset : 0xC Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ3_SRC IRQ3_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EINT1

EINT1 : Identify EINT1 interrupt source.\nEINT1 is external interrupt from P3.3.
bits : 0 - 0 (1 bit)
access : read-only



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