\n
address_offset : 0x0 Bytes (0x0)
size : 0x30 byte (0x0)
mem_usage : registers
protection : not protected
RTC Initiation Register
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INIR : RTC Initiation\nRead return current RTC active status\nA write of 0xa5eb1357 will make RTC leaving reset state.\nWhen RTC block is powered on, RTC is at reset state. User has to write a number 0x a5eb1357 to INIR register to make RTC leaving reset state. Once the INIR is written as 0xa5eb1357, the RTC will be in normal active state permanently.
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : 0
RTC is at reset state
1 : 1
RTC is at normal active state
End of enumeration elements list.
RTC Calendar Loading Register
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
_1DAY : 1-Day Calendar Digit (0~9)
bits : 0 - 3 (4 bit)
access : read-write
_10DAY : 10-Day Calendar Digit (0~3)
bits : 4 - 5 (2 bit)
access : read-write
_1MON : 1-Month Calendar Digit (0~9)
bits : 8 - 11 (4 bit)
access : read-write
_10MON : 10-Month Calendar Digit (0~1)
bits : 12 - 12 (1 bit)
access : read-write
_1YEAR : 1-Year Calendar Digit (0~9)
bits : 16 - 19 (4 bit)
access : read-write
_10YEAR : 10-Year Calendar Digit (0~9)
bits : 20 - 23 (4 bit)
access : read-write
RTC Time Scale Selection Register
address_offset : 0x14 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
_24H_12H : 24-hour / 12-hour Time Scale Selection\nIt indicates that TLR and TAR counter are in 24-hour time scale or 12-hour time scale\n
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Selected as 12-hour time scale with AM and PM indication (high bit of 10HR field in TLR and TAR)
#1 : 1
Selected as 24-hour time scale
End of enumeration elements list.
RTC Day of the Week Register
address_offset : 0x18 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DWR : Day of the Week Register \nThe field indicates day of the week from 0 to 6 to represent Sunday to Saturday respectively.\n
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
#000 : 0
Sunday
#001 : 1
Monday
#010 : 2
Tuesday
#011 : 3
Wednesday
#100 : 4
Thursday
#101 : 5
Friday
#110 : 6
Saturday
#111 : 7
Reserved
End of enumeration elements list.
RTC Time Alarm Register
address_offset : 0x1C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
_1SEC : 1-Sec Time Digit of Alarm Setting (0~9)
bits : 0 - 3 (4 bit)
access : read-write
_10SEC : 10-Sec Time Digit of Alarm Setting (0~5)
bits : 4 - 6 (3 bit)
access : read-write
_1MIN : 1-Min Time Digit of Alarm Setting (0~9)
bits : 8 - 11 (4 bit)
access : read-write
_10MIN : 10-Min Time Digit of Alarm Setting (0~5)
bits : 12 - 14 (3 bit)
access : read-write
_1HR : 1-Hour Time Digit of Alarm Setting (0~9)
bits : 16 - 19 (4 bit)
access : read-write
_10HR : 10-Hour Time Digit of Alarm Setting (0~2)
bits : 20 - 21 (2 bit)
access : read-write
RTC Calendar Alarm Register
address_offset : 0x20 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
_1DAY : 1-Day Calendar Digit of Alarm Setting (0~9)
bits : 0 - 3 (4 bit)
access : read-write
_10DAY : 10-Day Calendar Digit of Alarm Setting (0~3)
bits : 4 - 5 (2 bit)
access : read-write
_1MON : 1-Month Calendar Digit of Alarm Setting (0~9)
bits : 8 - 11 (4 bit)
access : read-write
_10MON : 10-Month Calendar Digit of Alarm Setting (0~1)
bits : 12 - 12 (1 bit)
access : read-write
_1YEAR : 1-Year Calendar Digit of Alarm Setting (0~9)
bits : 16 - 19 (4 bit)
access : read-write
_10YEAR : 10-Year Calendar Digit of Alarm Setting (0~9)
bits : 20 - 23 (4 bit)
access : read-write
RTC Leap Year Indication Register
address_offset : 0x24 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0
LIR : Leap Year Indication Register (Read Only)\nThis bit indicates RTC current year is a leap year or not.\n
bits : 0 - 0 (1 bit)
access : read-only
Enumeration:
#0 : 0
This year is not a leap year
#1 : 1
This year is a leap year
End of enumeration elements list.
RTC Interrupt Enable Register
address_offset : 0x28 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AIER : Alarm Interrupt Enable Bit\nThis bit is used to enable/disable RTC Alarm Interrupt, and generate an interrupt signal if AIF (RIIR [0] RTC Alarm Interrupt Flag) is set to 1.\nNote: This bit will also trigger a wake-up event while system runs in Idle/Power-Down mode and RTC Alarm Interrupt signal generated.
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
RTC Alarm Interrupt Disabled
#1 : 1
RTC Alarm Interrupt Enabled
End of enumeration elements list.
TIER : Time Tick Interrupt Enable Bit\nThis bit is used to enable/disable RTC Time Tick Interrupt, and generate an interrupt signal if TIF (RIIR [1] RTC Time Tick Interrupt Flag) is set to 1.\nNote: This bit will also trigger a wake-up event while system runs in Idle/Power-Down mode and RTC Time Tick Interrupt signal generated.
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
RTC Time Tick Interrupt Disabled
#1 : 1
RTC Time Tick Interrupt Enabled
End of enumeration elements list.
RTC Interrupt Indication Register
address_offset : 0x2C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AIF : RTC Alarm Interrupt Flag\nWhen RTC real time counters TLR and CLR reach the alarm time setting registers TAR and CAR, this bit will be set to 1 and an interrupt signal will be generated if AIER bit is set to 1. \nNote: Software can clear this bit by writing 1 to it.
bits : 0 - 0 (1 bit)
access : read-write
TIF : RTC Time Tick Interrupt Flag\nWhen RTC Time Tick time-out happened, this bit will be set to 1 and an interrupt signal will be generated if TIER bit is set to 1. \nNote: Software can clear this bit by writing 1 to it.
bits : 1 - 1 (1 bit)
access : read-write
RTC Time Tick Register
address_offset : 0x30 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TTR : Time Tick Register\nThe RTC time tick period for Periodic Time Tick Interrupt request.\n
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
#000 : 0
Time tick is 1 second
#001 : 1
Time tick is 1/2 second
#010 : 2
Time tick is 1/4 second
#011 : 3
Time tick is 1/8 second
#100 : 4
Time tick is 1/16 second
#101 : 5
Time tick is 1/32 second
#110 : 6
Time tick is 1/64 second
#111 : 7
Time tick is 1/28 second
End of enumeration elements list.
RTC Access Enable Register
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AER : RTC Register Access Enable Password (Write Only)\nWriting 0xA965 to this register will enable RTC registers read/write access and keep 1024 RTC clocks.
bits : 0 - 15 (16 bit)
access : write-only
ENF : RTC Register Access Enable Flag (Read Only)\nThis bit indicates the RTC Access Enable status\nThis bit will be set after AER[15:0] register is loaded with a 0xA965, and will be cleared automatically after 1024 RTC clocks.
bits : 16 - 16 (1 bit)
access : read-only
Enumeration:
#0 : 0
RTC register read/write access Disabled
#1 : 1
RTC register read/write access Enabled
End of enumeration elements list.
RTC Frequency Compensation Register
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FRACTION : Fraction Part\nNote: Digit in FCR must be expressed as hexadecimal number. Refer to 6.12.4.4 for the examples.
bits : 0 - 5 (6 bit)
access : read-write
INTEGER : Integer Part\nDigit in FCR must be expressed as hexadecimal number. Refer to 6.12.4.4 for the examples.
bits : 8 - 11 (4 bit)
access : read-write
RTC Time Loading Register
address_offset : 0xC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
_1SEC : 1-Sec Time Digit (0~9)
bits : 0 - 3 (4 bit)
access : read-write
_10SEC : 10-Sec Time Digit (0~5)
bits : 4 - 6 (3 bit)
access : read-write
_1MIN : 1-Min Time Digit (0~9)
bits : 8 - 11 (4 bit)
access : read-write
_10MIN : 10-Min Time Digit (0~5)
bits : 12 - 14 (3 bit)
access : read-write
_1HR : 1-Hour Time Digit (0~9)
bits : 16 - 19 (4 bit)
access : read-write
_10HR : 10-Hour Time Digit (0~2)
bits : 20 - 21 (2 bit)
access : read-write
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