\n
address_offset : 0x0 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
Watchdog Timer Control Register
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WTR : Reset Watchdog Timer Counter (write-protection bit)
Set this bit will reset the Watchdog Timer.
Note: This bit will be automatically cleared by hardware
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
No effect
#1 : 1
Reset the internal 18-bit WDT counter
End of enumeration elements list.
WTRE : Watchdog Timer Reset Enable (write-protection bit)\nSetting this bit will enable the Watchdog Timer time-out reset function If the WDT counter value has not been cleared after the specific WDT reset delay period expires.
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Watchdog Timer time-out reset function Disabled
#1 : 1
Watchdog Timer time-out reset function Enabled
End of enumeration elements list.
WTRF : Watchdog Timer Reset Flag\nThis bit indicates the system has been reset by WDT time-out reset or not.\nNote: This bit is cleared by writing 1 to this bit.
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Watchdog Timer time-out reset did not occur
#1 : 1
Watchdog Timer time-out reset occurred
End of enumeration elements list.
WTIF : Watchdog Timer Interrupt Flag\nThis bit will set to 1 while WDT counter value reaches the selected WDT time-out interval.\nNote: This bit is cleared by writing 1 to this bit..
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Watchdog Timer time-out interrupt did not occur
#1 : 1
Watchdog Timer time-out interrupt occurred
End of enumeration elements list.
WTWKE : Watchdog Timer Wake-Up Function Enable bit (write-protection bit)\nIf this bit is set to 1, while WDT interrupt flag (WTCR[3] WTIF) is generated to 1 and WTIE (WTCR[6] WDT interrupt enable) is enabled, the WDT time-out interrupt signal will generate a wake-up trigger event to chip.\nNote: Chip can be woken-up by WDT time-out interrupt signal generated only if WDT clock source is selected to 10 kHz oscillator.
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
Wake-up trigger event Disabled if WDT time-out interrupt signal generated
#1 : 1
Wake-up trigger event Enabled if WDT time-out interrupt signal generated
End of enumeration elements list.
WTWKF : Watchdog Timer Wake-Up Flag\nThis bit indicates the interrupt wake-up flag status of WDT\nNote: This bit is cleared by writing 1 to this bit.
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
Watchdog Timer does not cause chip wake-up
#1 : 1
Chip wake-up from Idle or Power-down mode if WDT time-out interrupt signal generated
End of enumeration elements list.
WTIE : Watchdog Timer Interrupt Enable (write-protection bit)\nIf this bit is enabled, the WDT time-out interrupt signal is generated and inform to CPU.
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
Watchdog Timer interrupt Disabled
#1 : 1
Watchdog Timer interrupt Enabled
End of enumeration elements list.
WTE : Watchdog Timer Enable (write-protection bit)
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
Watchdog Timer Disabled (This action will reset the internal counter)
#1 : 1
Watchdog Timer Enabled
End of enumeration elements list.
WTIS : Watchdog Timer Interval Select (write-protection bits)
bits : 8 - 10 (3 bit)
access : read-write
DBGACK_WDT : ICE Debug Mode Acknowledge Disable (write-protection bit)\nWatchdog Timer counter will keep going no matter CPU is held by ICE or no.
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
#0 : 0
ICE debug mode acknowledgement effects Watchdog Timer counting
#1 : 1
ICE debug mode acknowledgement disabled
End of enumeration elements list.
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