Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : registers
protection : not protected
Window Watchdog Timer Reload Counter Register
address_offset : 0x0 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
WWDTRLD : WWDT Reload Counter Register\nWriting 0x00005AA5 to this register will reload the Window Watchdog Timer counter value to 0x3F. \nNote: Software can only write WWDTRLD to reload WWDT counter value when current WWDT counter value between 0 and WINCMP. If software writes WWDTRLD when current WWDT counter value is larger than WINCMP, WWDT reset signal will generate immediately.
bits : 0 - 31 (32 bit)
access : write-only
Window Watchdog Timer Control Register
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WWDTEN : WWDT Enable\nSet this bit to enable Window Watchdog Timer counter counting.\n
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Window Watchdog Timer counter is stopped
#1 : 1
Window Watchdog Timer counter is starting counting
End of enumeration elements list.
WWDTIE : WWDT Interrupt Enable\nSet this bit to enable the Window Watchdog Timer time-out interrupt function.\n
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
WWDT time-out interrupt function Disabled if WWDTIF (WWDTSR[0] WWDT compare match interrupt flag) is 1
#1 : 1
WWDT time-out interrupt function Enabled if WWDTIF (WWDTSR[0] WWDT compare match interrupt flag) is 1
End of enumeration elements list.
PERIODSEL : WWDT Prescale Period Select\n
bits : 8 - 11 (4 bit)
access : read-write
WINCMP : WWDT Window Compare Register\nSet this register to adjust the valid reload window. \nNote: Software can only write WWDTRLD to reload WWDT counter value when current WWDT counter value between 0 and WINCMP. If Software writes WWDTRLD when current WWDT counter value larger than WINCMP, WWDT reset signal will generate immediately.
bits : 16 - 21 (6 bit)
access : read-write
DBGACK_WWDT : ICE Debug Mode Acknowledge Disable\n
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
#0 : 0
WWDT counter stopped if system is in Debug mode
#1 : 1
WWDT still counted even system is in Debug mode
End of enumeration elements list.
Window Watchdog Timer Status Register
address_offset : 0x8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WWDTIF : WWDT Compare Match Interrupt Flag\nWhen current WWDT counter value matches WWCMP, this bit is set to 1. This bit will be cleared by writing 1 to itself.
bits : 0 - 0 (1 bit)
access : read-write
WWDTRF : WWDT Reset Flag\nWhen WWDT counter counts down to 0 or writes WWDTRLD during current WWDT counter value being larger than WINCMP, chip will be reset and this bit is set to 1. This bit will be cleared to 0 by writing 1 to itself.
bits : 1 - 1 (1 bit)
access : read-write
Window Watchdog Timer Counter Value Register
address_offset : 0xC Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
WWDTCVAL : WWDT Counter Value\nThis register reflects the current WWDT counter value and is read only.
bits : 0 - 5 (6 bit)
access : read-only
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