\n
address_offset : 0x0 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection : not protected
ADC Control Register
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SWTRG : A/D Conversion Start\nA trigger to start one A/D conversion process.\nNote: This bit will be cleared to '0' automatically.
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
A/D conversion enters idle state
#1 : 1
Start conversion
End of enumeration elements list.
PD : Power Down ADC \nNote1: ADC power must be enabled before a trigger to get the data.\nNote2: It needs 100ms to wait analog block stable when setting PD from 1 to 0.
bits : 13 - 13 (1 bit)
access : read-write
Enumeration:
#0 : 0
ADC is in normal state
#1 : 1
ADC is in power down state
End of enumeration elements list.
PDKEY : Power Down Keypad Detection\n
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
#0 : 0
Power down keypad detection Disabled
#1 : 1
Power down keypad detection Enabled
End of enumeration elements list.
CHSEL : Analog Input Selection Signals\nNote1: ADC_CH0 is used for battery voltage detection. It includes an inherent resistor divider and a switch.\nNote2: User needs to pay attention to electric leakage with ADC_CH0 because the default CHSEL is selected to ADC_CH0, and ADC_CH0 has an internal resistor divider. If ADC_CH0 is connected to battery, there is a leakage path. Therefore, user can change CHSEL to other channel to cut off this path, when finishing battery detection.
bits : 16 - 18 (3 bit)
access : read-write
Enumeration:
#000 : 0
ADC_CH0
#001 : 1
ADC_CH1
#010 : 2
ADC_CH2
#011 : 3
ADC_CH3
#100 : 4
ADC_CH4
#101 : 5
ADC_CH5
#110 : 6
ADC_CH6
#111 : 7
ADC_CH7
End of enumeration elements list.
EXTSMPT : ADC Extend Sampling Time \nWhen A/D converting at high conversion rate, the sampling time of analog input voltage may not enough if the input channel loading is heavy, software can extend A/D sampling time after trigger source is coming to get enough sampling time.\nNote: The unit is ADC clock.
bits : 24 - 31 (8 bit)
access : read-write
ADC Interrupt State
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ADCIF : ADC Conversion Done Interrupt Flag\nWhen finishing the sample process, the ADCIF bit will be set. If the ADCIEN is set, the interrupt will be transferred to NVIC.\n
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
ADC conversion done flag is not set
#1 : 1
ADC conversion done flag is set
End of enumeration elements list.
KEYIF : Keypad Interrupt Flag\nIn the process of checking keypad, the KEYIF shows the state. ADC_CH2 is used for keypad. When ADC_CH2 is not equal to AVDDADC, the interrupt flag will be raised.\n
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Keypad is not pressing state
#1 : 1
keypad is pressing state
End of enumeration elements list.
ADCIEN : ADC Interrupt Enable Control\n
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
ADC conversion done interrupt Disabled
#1 : 1
ADC conversion done interrupt Enabled
End of enumeration elements list.
KEYIEN : Keypad Interrupt Enable Control\n
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
#0 : 0
Keypad down interrupt Disabled
#1 : 1
Keypad down interrupt Enabled
End of enumeration elements list.
ADC Data Register
address_offset : 0x8 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RESULT : A/D Conversion Result\nThis field contains conversion result of ADC. When A/D conversion done, 12-bit ADC conversion result with unsigned format will be filled in RESULT[11:0].
bits : 0 - 11 (12 bit)
access : read-only
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