Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected
Channel Configuration register
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SOURCE : DMA Channel Source (Slot)
bits : 0 - 5 (6 bit)
access : read-write
TRIG : DMA Channel Trigger Enable
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)
#1 : 1
Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode.
End of enumeration elements list.
ENBL : DMA Channel Enable
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel.
#1 : 1
DMA channel is enabled
End of enumeration elements list.
Channel Configuration register
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SOURCE : DMA Channel Source (Slot)
bits : 0 - 5 (6 bit)
access : read-write
TRIG : DMA Channel Trigger Enable
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)
#1 : 1
Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode.
End of enumeration elements list.
ENBL : DMA Channel Enable
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel.
#1 : 1
DMA channel is enabled
End of enumeration elements list.
Channel Configuration register
address_offset : 0x15 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SOURCE : DMA Channel Source (Slot)
bits : 0 - 5 (6 bit)
access : read-write
TRIG : DMA Channel Trigger Enable
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)
#1 : 1
Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode.
End of enumeration elements list.
ENBL : DMA Channel Enable
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel.
#1 : 1
DMA channel is enabled
End of enumeration elements list.
Channel Configuration register
address_offset : 0x1C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SOURCE : DMA Channel Source (Slot)
bits : 0 - 5 (6 bit)
access : read-write
TRIG : DMA Channel Trigger Enable
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)
#1 : 1
Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode.
End of enumeration elements list.
ENBL : DMA Channel Enable
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel.
#1 : 1
DMA channel is enabled
End of enumeration elements list.
Channel Configuration register
address_offset : 0x3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SOURCE : DMA Channel Source (Slot)
bits : 0 - 5 (6 bit)
access : read-write
TRIG : DMA Channel Trigger Enable
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)
#1 : 1
Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode.
End of enumeration elements list.
ENBL : DMA Channel Enable
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel.
#1 : 1
DMA channel is enabled
End of enumeration elements list.
Channel Configuration register
address_offset : 0x6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SOURCE : DMA Channel Source (Slot)
bits : 0 - 5 (6 bit)
access : read-write
TRIG : DMA Channel Trigger Enable
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)
#1 : 1
Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode.
End of enumeration elements list.
ENBL : DMA Channel Enable
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel.
#1 : 1
DMA channel is enabled
End of enumeration elements list.
Channel Configuration register
address_offset : 0xA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SOURCE : DMA Channel Source (Slot)
bits : 0 - 5 (6 bit)
access : read-write
TRIG : DMA Channel Trigger Enable
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)
#1 : 1
Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode.
End of enumeration elements list.
ENBL : DMA Channel Enable
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel.
#1 : 1
DMA channel is enabled
End of enumeration elements list.
Channel Configuration register
address_offset : 0xF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SOURCE : DMA Channel Source (Slot)
bits : 0 - 5 (6 bit)
access : read-write
TRIG : DMA Channel Trigger Enable
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)
#1 : 1
Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode.
End of enumeration elements list.
ENBL : DMA Channel Enable
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel.
#1 : 1
DMA channel is enabled
End of enumeration elements list.
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