Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x24 byte (0x0)
mem_usage : registers
protection : not protected
Version ID Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FEATURE : Feature Specification Number
bits : 0 - 15 (16 bit)
access : read-only
Enumeration:
0x1 : FEATURE_1
Round robin feature
End of enumeration elements list.
MINOR : Minor Version Number. This read only field returns the minor version number for the module specification.
bits : 16 - 23 (8 bit)
access : read-only
MAJOR : Major Version Number. This read only field returns the major version number for the module specification.
bits : 24 - 31 (8 bit)
access : read-only
Comparator Control Register 2
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CMP_HPMD : CMP High Power Mode Select
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : CMP_HPMD_0
Low speed comparison mode is selected.(when CMP_NPMD is 0)
0x1 : CMP_HPMD_1
High speed comparison mode is selected.(when CMP_NPMD is 0)
End of enumeration elements list.
CMP_NPMD : CMP Nano Power Mode Select
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : CMP_NPMD_0
Nano Power Comparator is not enabled (mode is determined by CMP_HPMD)
0x1 : CMP_NPMD_1
Nano Power Comparator is enabled
End of enumeration elements list.
HYSTCTR : Comparator hard block hysteresis control. See chip data sheet to get the actual hystersis value with each level
bits : 4 - 5 (2 bit)
access : read-write
Enumeration:
0 : HYSTCTR_0
The hard block output has level 0 hysteresis internally.
0x1 : HYSTCTR_1
The hard block output has level 1 hysteresis internally.
0x2 : HYSTCTR_2
The hard block output has level 2 hysteresis internally.
0x3 : HYSTCTR_3
The hard block output has level 3 hysteresis internally.
End of enumeration elements list.
PSEL : Plus Input MUX Control
bits : 16 - 18 (3 bit)
access : read-write
Enumeration:
0 : PSEL_0
Input 0
0x1 : PSEL_1
Input 1
0x2 : PSEL_2
Input 2
0x3 : PSEL_3
Input 3
0x4 : PSEL_4
Input 4
0x5 : PSEL_5
Input 5
0x6 : PSEL_6
Input 6
0x7 : PSEL_7
Internal DAC output
End of enumeration elements list.
MSEL : Minus Input MUX Control
bits : 20 - 22 (3 bit)
access : read-write
Enumeration:
0 : MSEL_0
Input 0
0x1 : MSEL_1
Input 1
0x2 : MSEL_2
Input 2
0x3 : MSEL_3
Input 3
0x4 : MSEL_4
Input 4
0x5 : MSEL_5
Input 5
0x6 : MSEL_6
Input 6
0x7 : MSEL_7
Internal DAC output
End of enumeration elements list.
DAC Control Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAC_EN : DAC Enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : DAC_EN_0
DAC is disabled.
0x1 : DAC_EN_1
DAC is enabled.
End of enumeration elements list.
DAC_HPMD : DAC High Power Mode Select
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : DAC_HPMD_0
DAC high power mode is not enabled.
0x1 : DAC_HPMD_1
DAC high power mode is enabled.
End of enumeration elements list.
VRSEL : Supply Voltage Reference Source Select
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
0 : VRSEL_0
vrefh_int is selected as resistor ladder network supply reference Vin.
0x1 : VRSEL_1
vrefh_ext is selected as resistor ladder network supply reference Vin.
End of enumeration elements list.
DAC_DATA : DAC Output Voltage Select
bits : 16 - 21 (6 bit)
access : read-write
Interrupt Enable Register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CFR_IE : Comparator Flag Rising Interrupt Enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : CFR_IE_0
CFR interrupt is disabled.
0x1 : CFR_IE_1
CFR interrupt is enabled.
End of enumeration elements list.
CFF_IE : Comparator Flag Falling Interrupt Enable
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : CFF_IE_0
CFF interrupt is disabled.
0x1 : CFF_IE_1
CFF interrupt is enabled.
End of enumeration elements list.
Comparator Status Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CFR : Analog Comparator Flag Rising
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : CFR_0
A rising edge has not been detected on COUT.
0x1 : CFR_1
A rising edge on COUT has occurred.
End of enumeration elements list.
CFF : Analog Comparator Flag Falling
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : CFF_0
A falling edge has not been detected on COUT.
0x1 : CFF_1
A falling edge on COUT has occurred.
End of enumeration elements list.
COUT : Analog Comparator Output
bits : 8 - 8 (1 bit)
access : read-only
Parameter Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DAC_RES : DAC resolution
bits : 0 - 3 (4 bit)
access : read-only
Enumeration:
0 : DAC_RES_0
4 bit DAC
0x1 : DAC_RES_1
6 bit DAC
0x2 : DAC_RES_2
8 bit DAC
0x3 : DAC_RES_3
10 bit DAC
0x4 : DAC_RES_4
12 bit DAC
0x5 : DAC_RES_5
14 bit DAC
0x6 : DAC_RES_6
16 bit DAC
End of enumeration elements list.
Comparator Control Register 0
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CMP_EN : Comparator Module Enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : CMP_EN_0
Analog Comparator is disabled.
0x1 : CMP_EN_1
Analog Comparator is enabled.
End of enumeration elements list.
CMP_STOP_EN : Comparator Module STOP Mode Enable
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : CMP_STOP_EN_0
Comparator is disabled in STOP modes regardless of CMP_EN.
0x1 : CMP_STOP_EN_1
Comparator is enabled in STOP mode if CMP_EN is active
End of enumeration elements list.
Comparator Control Register 1
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WINDOW_EN : Windowing Enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : WINDOW_EN_0
Windowing mode is not selected.
0x1 : WINDOW_EN_1
Windowing mode is selected.
End of enumeration elements list.
SAMPLE_EN : Sample Enable
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : SAMPLE_EN_0
Sampling mode is not selected.
0x1 : SAMPLE_EN_1
Sampling mode is selected.
End of enumeration elements list.
DMA_EN : DMA Enable
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : DMA_EN_0
DMA is disabled.
0x1 : DMA_EN_1
DMA is enabled.
End of enumeration elements list.
COUT_INV : Comparator invert
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0 : COUT_INV_0
Does not invert the comparator output.
0x1 : COUT_INV_1
Inverts the comparator output.
End of enumeration elements list.
COUT_SEL : Comparator Output Select
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
0 : COUT_SEL_0
Set CMPO to equal COUT (filtered comparator output).
0x1 : COUT_SEL_1
Set CMPO to equal COUTA (unfiltered comparator output).
End of enumeration elements list.
COUT_PEN : Comparator Output Pin Enable
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : COUT_PEN_0
When COUT_PEN is 0, the comparator output (after window/filter settings dependent on software configuration) is not available to a packaged pin.
0x1 : COUT_PEN_1
When COUT_PEN is 1, and if the software has configured the comparator to own a packaged pin, the comparator output is available in a packaged pin.
End of enumeration elements list.
FILT_CNT : Filter Sample Count
bits : 16 - 18 (3 bit)
access : read-write
Enumeration:
0 : FILT_CNT_0
Filter is disabled. If SAMPLE_EN = 1, then COUT is a logic zero (this is not a legal state in , and is not recommended). If SAMPLE_EN = 0, COUT = COUTA.
0x1 : FILT_CNT_1
1 consecutive sample must agree (comparator output is simply sampled).
0x2 : FILT_CNT_2
2 consecutive samples must agree.
0x3 : FILT_CNT_3
3 consecutive samples must agree.
0x4 : FILT_CNT_4
4 consecutive samples must agree.
0x5 : FILT_CNT_5
5 consecutive samples must agree.
0x6 : FILT_CNT_6
6 consecutive samples must agree.
0x7 : FILT_CNT_7
7 consecutive samples must agree.
End of enumeration elements list.
FILT_PER : Filter Sample Period
bits : 24 - 31 (8 bit)
access : read-write
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