\n
address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected
Stimulus Port Register 0 (for reading)
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM0_READ_STIM0_WRITE
reset_Mask : 0x0
FIFOREADY : no description available
bits : 0 - 0 (1 bit)
access : read-write
Stimulus Port Register 0 (for writing)
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM0_READ_STIM0_WRITE
reset_Mask : 0x0
STIMULUS : Data write to the stimulus port FIFO, for forwarding as a software event packet.
bits : 0 - 31 (32 bit)
access : read-write
Stimulus Port Register 4 (for reading)
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM4_READ_STIM4_WRITE
reset_Mask : 0x0
FIFOREADY : no description available
bits : 0 - 0 (1 bit)
access : read-write
Stimulus Port Register 4 (for writing)
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM4_READ_STIM4_WRITE
reset_Mask : 0x0
STIMULUS : Data write to the stimulus port FIFO, for forwarding as a software event packet.
bits : 0 - 31 (32 bit)
access : read-write
Stimulus Port Register 5 (for reading)
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM5_READ_STIM5_WRITE
reset_Mask : 0x0
FIFOREADY : no description available
bits : 0 - 0 (1 bit)
access : read-write
Stimulus Port Register 5 (for writing)
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM5_READ_STIM5_WRITE
reset_Mask : 0x0
STIMULUS : Data write to the stimulus port FIFO, for forwarding as a software event packet.
bits : 0 - 31 (32 bit)
access : read-write
Stimulus Port Register 6 (for reading)
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM6_READ_STIM6_WRITE
reset_Mask : 0x0
FIFOREADY : no description available
bits : 0 - 0 (1 bit)
access : read-write
Stimulus Port Register 6 (for writing)
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM6_READ_STIM6_WRITE
reset_Mask : 0x0
STIMULUS : Data write to the stimulus port FIFO, for forwarding as a software event packet.
bits : 0 - 31 (32 bit)
access : read-write
Stimulus Port Register 7 (for reading)
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM7_READ_STIM7_WRITE
reset_Mask : 0x0
FIFOREADY : no description available
bits : 0 - 0 (1 bit)
access : read-write
Stimulus Port Register 7 (for writing)
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM7_READ_STIM7_WRITE
reset_Mask : 0x0
STIMULUS : Data write to the stimulus port FIFO, for forwarding as a software event packet.
bits : 0 - 31 (32 bit)
access : read-write
Stimulus Port Register 8 (for reading)
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM8_READ_STIM8_WRITE
reset_Mask : 0x0
FIFOREADY : no description available
bits : 0 - 0 (1 bit)
access : read-write
Stimulus Port Register 8 (for writing)
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM8_READ_STIM8_WRITE
reset_Mask : 0x0
STIMULUS : Data write to the stimulus port FIFO, for forwarding as a software event packet.
bits : 0 - 31 (32 bit)
access : read-write
Stimulus Port Register 9 (for reading)
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM9_READ_STIM9_WRITE
reset_Mask : 0x0
FIFOREADY : no description available
bits : 0 - 0 (1 bit)
access : read-write
Stimulus Port Register 9 (for writing)
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM9_READ_STIM9_WRITE
reset_Mask : 0x0
STIMULUS : Data write to the stimulus port FIFO, for forwarding as a software event packet.
bits : 0 - 31 (32 bit)
access : read-write
Stimulus Port Register 10 (for reading)
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM10_READ_STIM10_WRITE
reset_Mask : 0x0
FIFOREADY : no description available
bits : 0 - 0 (1 bit)
access : read-write
Stimulus Port Register 10 (for writing)
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM10_READ_STIM10_WRITE
reset_Mask : 0x0
STIMULUS : Data write to the stimulus port FIFO, for forwarding as a software event packet.
bits : 0 - 31 (32 bit)
access : read-write
Stimulus Port Register 11 (for reading)
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM11_READ_STIM11_WRITE
reset_Mask : 0x0
FIFOREADY : no description available
bits : 0 - 0 (1 bit)
access : read-write
Stimulus Port Register 11 (for writing)
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM11_READ_STIM11_WRITE
reset_Mask : 0x0
STIMULUS : Data write to the stimulus port FIFO, for forwarding as a software event packet.
bits : 0 - 31 (32 bit)
access : read-write
Stimulus Port Register 12 (for reading)
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM12_READ_STIM12_WRITE
reset_Mask : 0x0
FIFOREADY : no description available
bits : 0 - 0 (1 bit)
access : read-write
Stimulus Port Register 12 (for writing)
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM12_READ_STIM12_WRITE
reset_Mask : 0x0
STIMULUS : Data write to the stimulus port FIFO, for forwarding as a software event packet.
bits : 0 - 31 (32 bit)
access : read-write
Stimulus Port Register 13 (for reading)
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM13_READ_STIM13_WRITE
reset_Mask : 0x0
FIFOREADY : no description available
bits : 0 - 0 (1 bit)
access : read-write
Stimulus Port Register 13 (for writing)
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM13_READ_STIM13_WRITE
reset_Mask : 0x0
STIMULUS : Data write to the stimulus port FIFO, for forwarding as a software event packet.
bits : 0 - 31 (32 bit)
access : read-write
Stimulus Port Register 14 (for reading)
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM14_READ_STIM14_WRITE
reset_Mask : 0x0
FIFOREADY : no description available
bits : 0 - 0 (1 bit)
access : read-write
Stimulus Port Register 14 (for writing)
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM14_READ_STIM14_WRITE
reset_Mask : 0x0
STIMULUS : Data write to the stimulus port FIFO, for forwarding as a software event packet.
bits : 0 - 31 (32 bit)
access : read-write
Stimulus Port Register 15 (for reading)
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM15_READ_STIM15_WRITE
reset_Mask : 0x0
FIFOREADY : no description available
bits : 0 - 0 (1 bit)
access : read-write
Stimulus Port Register 15 (for writing)
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM15_READ_STIM15_WRITE
reset_Mask : 0x0
STIMULUS : Data write to the stimulus port FIFO, for forwarding as a software event packet.
bits : 0 - 31 (32 bit)
access : read-write
Stimulus Port Register 1 (for reading)
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM1_READ_STIM1_WRITE
reset_Mask : 0x0
FIFOREADY : no description available
bits : 0 - 0 (1 bit)
access : read-write
Stimulus Port Register 1 (for writing)
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM1_READ_STIM1_WRITE
reset_Mask : 0x0
STIMULUS : Data write to the stimulus port FIFO, for forwarding as a software event packet.
bits : 0 - 31 (32 bit)
access : read-write
Stimulus Port Register 16 (for reading)
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM16_READ_STIM16_WRITE
reset_Mask : 0x0
FIFOREADY : no description available
bits : 0 - 0 (1 bit)
access : read-write
Stimulus Port Register 16 (for writing)
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM16_READ_STIM16_WRITE
reset_Mask : 0x0
STIMULUS : Data write to the stimulus port FIFO, for forwarding as a software event packet.
bits : 0 - 31 (32 bit)
access : read-write
Stimulus Port Register 17 (for reading)
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM17_READ_STIM17_WRITE
reset_Mask : 0x0
FIFOREADY : no description available
bits : 0 - 0 (1 bit)
access : read-write
Stimulus Port Register 17 (for writing)
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM17_READ_STIM17_WRITE
reset_Mask : 0x0
STIMULUS : Data write to the stimulus port FIFO, for forwarding as a software event packet.
bits : 0 - 31 (32 bit)
access : read-write
Stimulus Port Register 18 (for reading)
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM18_READ_STIM18_WRITE
reset_Mask : 0x0
FIFOREADY : no description available
bits : 0 - 0 (1 bit)
access : read-write
Stimulus Port Register 18 (for writing)
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM18_READ_STIM18_WRITE
reset_Mask : 0x0
STIMULUS : Data write to the stimulus port FIFO, for forwarding as a software event packet.
bits : 0 - 31 (32 bit)
access : read-write
Stimulus Port Register 19 (for reading)
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM19_READ_STIM19_WRITE
reset_Mask : 0x0
FIFOREADY : no description available
bits : 0 - 0 (1 bit)
access : read-write
Stimulus Port Register 19 (for writing)
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM19_READ_STIM19_WRITE
reset_Mask : 0x0
STIMULUS : Data write to the stimulus port FIFO, for forwarding as a software event packet.
bits : 0 - 31 (32 bit)
access : read-write
Stimulus Port Register 20 (for reading)
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM20_READ_STIM20_WRITE
reset_Mask : 0x0
FIFOREADY : no description available
bits : 0 - 0 (1 bit)
access : read-write
Stimulus Port Register 20 (for writing)
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM20_READ_STIM20_WRITE
reset_Mask : 0x0
STIMULUS : Data write to the stimulus port FIFO, for forwarding as a software event packet.
bits : 0 - 31 (32 bit)
access : read-write
Stimulus Port Register 21 (for reading)
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM21_READ_STIM21_WRITE
reset_Mask : 0x0
FIFOREADY : no description available
bits : 0 - 0 (1 bit)
access : read-write
Stimulus Port Register 21 (for writing)
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM21_READ_STIM21_WRITE
reset_Mask : 0x0
STIMULUS : Data write to the stimulus port FIFO, for forwarding as a software event packet.
bits : 0 - 31 (32 bit)
access : read-write
Stimulus Port Register 22 (for reading)
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM22_READ_STIM22_WRITE
reset_Mask : 0x0
FIFOREADY : no description available
bits : 0 - 0 (1 bit)
access : read-write
Stimulus Port Register 22 (for writing)
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM22_READ_STIM22_WRITE
reset_Mask : 0x0
STIMULUS : Data write to the stimulus port FIFO, for forwarding as a software event packet.
bits : 0 - 31 (32 bit)
access : read-write
Stimulus Port Register 23 (for reading)
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM23_READ_STIM23_WRITE
reset_Mask : 0x0
FIFOREADY : no description available
bits : 0 - 0 (1 bit)
access : read-write
Stimulus Port Register 23 (for writing)
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM23_READ_STIM23_WRITE
reset_Mask : 0x0
STIMULUS : Data write to the stimulus port FIFO, for forwarding as a software event packet.
bits : 0 - 31 (32 bit)
access : read-write
Stimulus Port Register 24 (for reading)
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM24_READ_STIM24_WRITE
reset_Mask : 0x0
FIFOREADY : no description available
bits : 0 - 0 (1 bit)
access : read-write
Stimulus Port Register 24 (for writing)
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM24_READ_STIM24_WRITE
reset_Mask : 0x0
STIMULUS : Data write to the stimulus port FIFO, for forwarding as a software event packet.
bits : 0 - 31 (32 bit)
access : read-write
Stimulus Port Register 25 (for reading)
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM25_READ_STIM25_WRITE
reset_Mask : 0x0
FIFOREADY : no description available
bits : 0 - 0 (1 bit)
access : read-write
Stimulus Port Register 25 (for writing)
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM25_READ_STIM25_WRITE
reset_Mask : 0x0
STIMULUS : Data write to the stimulus port FIFO, for forwarding as a software event packet.
bits : 0 - 31 (32 bit)
access : read-write
Stimulus Port Register 26 (for reading)
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM26_READ_STIM26_WRITE
reset_Mask : 0x0
FIFOREADY : no description available
bits : 0 - 0 (1 bit)
access : read-write
Stimulus Port Register 26 (for writing)
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM26_READ_STIM26_WRITE
reset_Mask : 0x0
STIMULUS : Data write to the stimulus port FIFO, for forwarding as a software event packet.
bits : 0 - 31 (32 bit)
access : read-write
Stimulus Port Register 27 (for reading)
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM27_READ_STIM27_WRITE
reset_Mask : 0x0
FIFOREADY : no description available
bits : 0 - 0 (1 bit)
access : read-write
Stimulus Port Register 27 (for writing)
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM27_READ_STIM27_WRITE
reset_Mask : 0x0
STIMULUS : Data write to the stimulus port FIFO, for forwarding as a software event packet.
bits : 0 - 31 (32 bit)
access : read-write
Stimulus Port Register 28 (for reading)
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM28_READ_STIM28_WRITE
reset_Mask : 0x0
FIFOREADY : no description available
bits : 0 - 0 (1 bit)
access : read-write
Stimulus Port Register 28 (for writing)
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM28_READ_STIM28_WRITE
reset_Mask : 0x0
STIMULUS : Data write to the stimulus port FIFO, for forwarding as a software event packet.
bits : 0 - 31 (32 bit)
access : read-write
Stimulus Port Register 29 (for reading)
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM29_READ_STIM29_WRITE
reset_Mask : 0x0
FIFOREADY : no description available
bits : 0 - 0 (1 bit)
access : read-write
Stimulus Port Register 29 (for writing)
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM29_READ_STIM29_WRITE
reset_Mask : 0x0
STIMULUS : Data write to the stimulus port FIFO, for forwarding as a software event packet.
bits : 0 - 31 (32 bit)
access : read-write
Stimulus Port Register 30 (for reading)
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM30_READ_STIM30_WRITE
reset_Mask : 0x0
FIFOREADY : no description available
bits : 0 - 0 (1 bit)
access : read-write
Stimulus Port Register 30 (for writing)
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM30_READ_STIM30_WRITE
reset_Mask : 0x0
STIMULUS : Data write to the stimulus port FIFO, for forwarding as a software event packet.
bits : 0 - 31 (32 bit)
access : read-write
Stimulus Port Register 31 (for reading)
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM31_READ_STIM31_WRITE
reset_Mask : 0x0
FIFOREADY : no description available
bits : 0 - 0 (1 bit)
access : read-write
Stimulus Port Register 31 (for writing)
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM31_READ_STIM31_WRITE
reset_Mask : 0x0
STIMULUS : Data write to the stimulus port FIFO, for forwarding as a software event packet.
bits : 0 - 31 (32 bit)
access : read-write
Stimulus Port Register 2 (for reading)
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM2_READ_STIM2_WRITE
reset_Mask : 0x0
FIFOREADY : no description available
bits : 0 - 0 (1 bit)
access : read-write
Stimulus Port Register 2 (for writing)
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM2_READ_STIM2_WRITE
reset_Mask : 0x0
STIMULUS : Data write to the stimulus port FIFO, for forwarding as a software event packet.
bits : 0 - 31 (32 bit)
access : read-write
Stimulus Port Register 3 (for reading)
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM3_READ_STIM3_WRITE
reset_Mask : 0x0
FIFOREADY : no description available
bits : 0 - 0 (1 bit)
access : read-write
Stimulus Port Register 3 (for writing)
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : STIM3_READ_STIM3_WRITE
reset_Mask : 0x0
STIMULUS : Data write to the stimulus port FIFO, for forwarding as a software event packet.
bits : 0 - 31 (32 bit)
access : read-write
Trace Enable Register
address_offset : 0xE00 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
STIMENA : For bit STIMENA[n], in register ITM_TERx: 0 = Stimulus port (32x + n) disabled 1 = Stimulus port (32x + n) enabled
bits : 0 - 31 (32 bit)
access : read-write
Trace Privilege Register
address_offset : 0xE40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRIVMASK : Bit mask to enable tracing on ITM stimulus ports: Bit [0] = stimulus port [7:0] Bit [1] = stimulus port [15:8] Bit [2] = stimulus port [23:16] Bit [3] = stimulus port [31:24]
bits : 0 - 3 (4 bit)
access : read-write
Trace Control Register
address_offset : 0xE80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ITMENA : no description available
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : ITMENA_0
Disabled.
0x1 : ITMENA_1
Enabled.
End of enumeration elements list.
TSENA : no description available
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : TSENA_0
Disabled.
0x1 : TSENA_1
Enabled.
End of enumeration elements list.
SYNCENA : no description available
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SYNCENA_0
Disabled.
0x1 : SYNCENA_1
Enabled.
End of enumeration elements list.
TXENA : no description available
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0 : TXENA_0
Disabled.
0x1 : TXENA_1
Enabled.
End of enumeration elements list.
SWOENA : no description available
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
0 : SWOENA_0
Timestamp counter uses the processor system clock.
0x1 : SWOENA_1
Timestamp counter uses asynchronous clock from the TPIU interface.
End of enumeration elements list.
TSPrescale : Local timestamp prescaler, used with the trace packet reference clock.
bits : 8 - 9 (2 bit)
access : read-write
Enumeration:
0 : TSPrescale_0
No prescaling.
0x1 : TSPrescale_1
Divide by 4.
0x2 : TSPrescale_2
Divide by 16.
0x3 : TSPrescale_3
Divide by 64.
End of enumeration elements list.
GTSFREQ : Global timestamp frequency. Defines how often the ITM generates a global timestamp, based on the global timestamp clock frequency, or disables generation of global timestamps.
bits : 10 - 11 (2 bit)
access : read-write
Enumeration:
0 : GTSFREQ_0
Disable generation of global timestamps.
0x1 : GTSFREQ_1
Generate timestamp request whenever the ITM detects a change in global timestamp counter bits [47:7]. This is approximately every 128 cycles.
0x2 : GTSFREQ_2
Generate timestamp request whenever the ITM detects a change in global timestamp counter bits [47:13]. This is approximately every 8192 cycles.
0x3 : GTSFREQ_3
Generate a timestamp after every packet, if the output FIFO is empty.
End of enumeration elements list.
TraceBusID : Identifier for multi-source trace stream formatting. If multi-source trace is in use, the debugger must write a non-zero value to this field.
bits : 16 - 22 (7 bit)
access : read-write
BUSY : Indicates whether the ITM is currently processing events: 0: ITM is not processing any events. 1: ITM events present and being drained.
bits : 23 - 23 (1 bit)
access : read-only
Enumeration:
0 : BUSY_0
ITM is not processing any events.
0x1 : BUSY_1
ITM events present and beeing drained.
End of enumeration elements list.
Lock Access Register
address_offset : 0xFB0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WriteAccessCode : Write Access Code. A write of 0xC5ACCE55 enables further write access to this device. An invalid write will have the affect of removing write access.
bits : 0 - 31 (32 bit)
access : read-write
Lock Status Register
address_offset : 0xFB4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
IMP : Lock mechanism is implemented. This bit always reads 1.
bits : 0 - 0 (1 bit)
access : read-only
STATUS : Lock Status. This bit is HIGH when the device is locked, and LOW when unlocked.
bits : 1 - 1 (1 bit)
access : read-only
s8BIT : Access Lock Register size. This bit reads 0 to indicate a 32-bit register is present.
bits : 2 - 2 (1 bit)
access : read-only
Peripheral Identification Register 4.
address_offset : 0xFD0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
JEP106 : JEP106 continuation code.
bits : 0 - 3 (4 bit)
access : read-only
c4KB : 4KB Count
bits : 4 - 7 (4 bit)
access : read-only
Peripheral Identification Register 5.
address_offset : 0xFD4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
Peripheral Identification Register 6.
address_offset : 0xFD8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
Peripheral Identification Register 7.
address_offset : 0xFDC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
Peripheral Identification Register 0.
address_offset : 0xFE0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PartNumber : Part Number [7:0]
bits : 0 - 7 (8 bit)
access : read-only
Peripheral Identification Register 1.
address_offset : 0xFE4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PartNumber : Part Number [11:8]
bits : 0 - 3 (4 bit)
access : read-only
JEP106_identity_code : JEP106 identity code [3:0]
bits : 4 - 7 (4 bit)
access : read-only
Peripheral Identification Register 2.
address_offset : 0xFE8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
JEP106_identity_code : JEP106 identity code [6:4]
bits : 0 - 2 (3 bit)
access : read-only
Revision : Revision
bits : 4 - 7 (4 bit)
access : read-only
Peripheral Identification Register 3.
address_offset : 0xFEC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CustomerModified : Customer Modified.
bits : 0 - 3 (4 bit)
access : read-only
RevAnd : RevAnd
bits : 4 - 7 (4 bit)
access : read-only
Component Identification Register 0.
address_offset : 0xFF0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
Preamble : Preamble
bits : 0 - 7 (8 bit)
access : read-only
Component Identification Register 1.
address_offset : 0xFF4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
Preamble : Preamble
bits : 0 - 3 (4 bit)
access : read-only
ComponentClass : Component class
bits : 4 - 7 (4 bit)
access : read-only
Enumeration:
0x1 : ComponentClass_1
ROM table.
0x9 : ComponentClass_9
CoreSight component.
0xF : ComponentClass_15
PrimeCell of system component with no standardized register layout, for backward compatibility.
End of enumeration elements list.
Component Identification Register 2.
address_offset : 0xFF8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
Preamble : Preamble
bits : 0 - 7 (8 bit)
access : read-only
Component Identification Register 3.
address_offset : 0xFFC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
Preamble : Preamble
bits : 0 - 7 (8 bit)
access : read-only
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