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address_offset : 0x0 Bytes (0x0)
size : 0x40 byte (0x0)
mem_usage : registers
protection : not protected
USB Device Command/Status register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DEV_ADDR : USB device address.
bits : 0 - 6 (7 bit)
access : read-write
DEV_EN : USB device enable.
bits : 7 - 7 (1 bit)
access : read-write
SETUP : SETUP token received.
bits : 8 - 8 (1 bit)
access : read-write
FORCE_NEEDCLK : Forces the NEEDCLK output to always be on:.
bits : 9 - 9 (1 bit)
access : read-write
FORCE_VBUS : If this bit is set to 1, the VBUS voltage indicators from the PHY are overruled.
bits : 10 - 10 (1 bit)
access : read-write
LPM_SUP : LPM Supported:.
bits : 11 - 11 (1 bit)
access : read-write
INTONNAK_AO : Interrupt on NAK for interrupt and bulk OUT EP:.
bits : 12 - 12 (1 bit)
access : read-write
INTONNAK_AI : Interrupt on NAK for interrupt and bulk IN EP:.
bits : 13 - 13 (1 bit)
access : read-write
INTONNAK_CO : Interrupt on NAK for control OUT EP:.
bits : 14 - 14 (1 bit)
access : read-write
INTONNAK_CI : Interrupt on NAK for control IN EP:.
bits : 15 - 15 (1 bit)
access : read-write
DCON : Device status - connect.
bits : 16 - 16 (1 bit)
access : read-write
DSUS : Device status - suspend.
bits : 17 - 17 (1 bit)
access : read-write
LPM_SUS : Device status - LPM Suspend.
bits : 19 - 19 (1 bit)
access : read-write
LPM_REWP : LPM Remote Wake-up Enabled by USB host.
bits : 20 - 20 (1 bit)
access : read-only
Speed : This field indicates the speed at which the device operates: 00b: reserved 01b: full-speed 10b: high-speed 11b: super-speed (reserved for future use).
bits : 22 - 23 (2 bit)
access : read-only
DCON_C : Device status - connect change.
bits : 24 - 24 (1 bit)
access : read-write
DSUS_C : Device status - suspend change.
bits : 25 - 25 (1 bit)
access : read-write
DRES_C : Device status - reset change.
bits : 26 - 26 (1 bit)
access : read-write
VBUS_DEBOUNCED : This bit indicates if VBUS is detected or not.
bits : 28 - 28 (1 bit)
access : read-only
PHY_TEST_MODE : This field is written by firmware to put the PHY into a test mode as defined by the USB2.
bits : 29 - 31 (3 bit)
access : read-write
USB Link Power Management register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HIRD_HW : Host Initiated Resume Duration - HW.
bits : 0 - 3 (4 bit)
access : read-only
HIRD_SW : Host Initiated Resume Duration - SW.
bits : 4 - 7 (4 bit)
access : read-write
DATA_PENDING : As long as this bit is set to one and LPM supported bit is set to one, HW will return a NYET handshake on every LPM token it receives.
bits : 8 - 8 (1 bit)
access : read-write
USB Endpoint skip
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SKIP : Endpoint skip: Writing 1 to one of these bits, will indicate to HW that it must deactivate the buffer assigned to this endpoint and return control back to software.
bits : 0 - 11 (12 bit)
access : read-write
USB Endpoint Buffer in use
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BUF : Buffer in use: This register has one bit per physical endpoint.
bits : 2 - 11 (10 bit)
access : read-write
USB Endpoint Buffer Configuration register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BUF_SB : Buffer usage: This register has one bit per physical endpoint.
bits : 2 - 11 (10 bit)
access : read-write
USB interrupt status register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EP0OUT : Interrupt status register bit for the Control EP0 OUT direction.
bits : 0 - 0 (1 bit)
access : read-write
EP0IN : Interrupt status register bit for the Control EP0 IN direction.
bits : 1 - 1 (1 bit)
access : read-write
EP1OUT : Interrupt status register bit for the EP1 OUT direction.
bits : 2 - 2 (1 bit)
access : read-write
EP1IN : Interrupt status register bit for the EP1 IN direction.
bits : 3 - 3 (1 bit)
access : read-write
EP2OUT : Interrupt status register bit for the EP2 OUT direction.
bits : 4 - 4 (1 bit)
access : read-write
EP2IN : Interrupt status register bit for the EP2 IN direction.
bits : 5 - 5 (1 bit)
access : read-write
EP3OUT : Interrupt status register bit for the EP3 OUT direction.
bits : 6 - 6 (1 bit)
access : read-write
EP3IN : Interrupt status register bit for the EP3 IN direction.
bits : 7 - 7 (1 bit)
access : read-write
EP4OUT : Interrupt status register bit for the EP4 OUT direction.
bits : 8 - 8 (1 bit)
access : read-write
EP4IN : Interrupt status register bit for the EP4 IN direction.
bits : 9 - 9 (1 bit)
access : read-write
EP5OUT : Interrupt status register bit for the EP5 OUT direction.
bits : 10 - 10 (1 bit)
access : read-write
EP5IN : Interrupt status register bit for the EP5 IN direction.
bits : 11 - 11 (1 bit)
access : read-write
FRAME_INT : Frame interrupt.
bits : 30 - 30 (1 bit)
access : read-write
DEV_INT : Device status interrupt.
bits : 31 - 31 (1 bit)
access : read-write
USB interrupt enable register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EP_INT_EN : If this bit is set and the corresponding USB interrupt status bit is set, a HW interrupt is generated on the interrupt line.
bits : 0 - 11 (12 bit)
access : read-write
FRAME_INT_EN : If this bit is set and the corresponding USB interrupt status bit is set, a HW interrupt is generated on the interrupt line.
bits : 30 - 30 (1 bit)
access : read-write
DEV_INT_EN : If this bit is set and the corresponding USB interrupt status bit is set, a HW interrupt is generated on the interrupt line.
bits : 31 - 31 (1 bit)
access : read-write
USB set interrupt status register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EP_SET_INT : If software writes a one to one of these bits, the corresponding USB interrupt status bit is set.
bits : 0 - 11 (12 bit)
access : read-write
FRAME_SET_INT : If software writes a one to one of these bits, the corresponding USB interrupt status bit is set.
bits : 30 - 30 (1 bit)
access : read-write
DEV_SET_INT : If software writes a one to one of these bits, the corresponding USB interrupt status bit is set.
bits : 31 - 31 (1 bit)
access : read-write
USB Endpoint toggle register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TOGGLE : Endpoint data toggle: This field indicates the current value of the data toggle for the corresponding endpoint.
bits : 0 - 29 (30 bit)
access : read-write
UTMI/ULPI debug register
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PHY_ADDR : ULPI mode: Bits 7:0 are used as the address when doing a register access over the ULPI interface.
bits : 0 - 7 (8 bit)
access : read-write
PHY_WDATA : UTMI+ mode: Reserved.
bits : 8 - 15 (8 bit)
access : read-write
PHY_RDATA : UTMI+ mode: Bits 7:0 contains the value returned by the VStatus signal on Vendor Interface of UTMI+.
bits : 16 - 23 (8 bit)
access : read-write
PHY_RW : UTMI+ mode: Reserved.
bits : 24 - 24 (1 bit)
access : read-write
PHY_ACCESS : Software writes this bit to one to start a read or write operation.
bits : 25 - 25 (1 bit)
access : read-write
PHY_MODE : This bit indicates if the interface between the controller is UTMI+ or ULPI.
bits : 31 - 31 (1 bit)
access : read-write
USB Info register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FRAME_NR : Frame number.
bits : 0 - 10 (11 bit)
access : read-only
ERR_CODE : The error code which last occurred:.
bits : 11 - 14 (4 bit)
access : read-only
Minrev : Minor revision.
bits : 16 - 23 (8 bit)
access : read-only
Majrev : Major revision.
bits : 24 - 31 (8 bit)
access : read-only
USB EP Command/Status List start address
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EP_LIST_PRG : Programmable portion of the USB EP Command/Status List address.
bits : 8 - 19 (12 bit)
access : read-write
EP_LIST_FIXED : Fixed portion of USB EP Command/Status List address.
bits : 20 - 31 (12 bit)
access : read-only
USB Data buffer start address
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DA_BUF : Start address of the memory page where all endpoint data buffers are located.
bits : 0 - 31 (32 bit)
access : read-write
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