\n
address_offset : 0x0 Bytes (0x0)
size : 0x200 byte (0x0)
mem_usage : registers
protection : not protected
.
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DEFAULT_ISP_MODE : Default ISP mode:
bits : 4 - 6 (3 bit)
access : read-write
Enumeration:
0 : VALUE_0
Auto ISP
0x1 : VALUE_1
USB_HID_MSC
0x2 : VALUE_2
SPI Slave ISP
0x3 : VALUE_3
I2C Slave ISP
0x7 : VALUE_7
Disable ISP fall through
End of enumeration elements list.
BOOT_SPEED : Core clock:
bits : 7 - 8 (2 bit)
access : read-write
Enumeration:
0 : VALUE_0
Defined by NMPA.SYSTEM_SPEED_CODE
0x1 : VALUE_1
48MHz FRO
0x2 : VALUE_2
96MHz FRO
End of enumeration elements list.
BOOT_FAILURE_PIN : GPIO port and pin number to use for indicating failure reason. The toggle rate of the pin is used to decode the error type. [2:0] - Defines GPIO port [7:3] - Defines GPIO pin
bits : 24 - 31 (8 bit)
access : read-write
.
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NIDEN : Non Secure non-invasive debug enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : VALUE_0
Use DAP to enable
0x1 : VALUE_1
Fixed state
End of enumeration elements list.
DBGEN : Non Secure debug enable
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : VALUE_0
Use DAP to enable
0x1 : VALUE_1
Fixed state
End of enumeration elements list.
SPNIDEN : Secure non-invasive debug enable
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : VALUE_0
Use DAP to enable
0x1 : VALUE_1
Fixed state
End of enumeration elements list.
SPIDEN : Secure invasive debug enable
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0 : VALUE_0
Use DAP to enable
0x1 : VALUE_1
Fixed state
End of enumeration elements list.
TAPEN : JTAG TAP enable
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
0 : VALUE_0
Use DAP to enable
0x1 : VALUE_1
Fixed state
End of enumeration elements list.
CPU1_DBGEN : CPU1 (Micro cortex M33) invasive debug enable
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : VALUE_0
Use DAP to enable
0x1 : VALUE_1
Fixed state
End of enumeration elements list.
ISP_CMD_EN : ISP Boot Command enable
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : VALUE_0
Use DAP to enable
0x1 : VALUE_1
Fixed state
End of enumeration elements list.
FA_CMD_EN : FA Command enable
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
0 : VALUE_0
Use DAP to enable
0x1 : VALUE_1
Fixed state
End of enumeration elements list.
ME_CMD_EN : Flash Mass Erase Command enable
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
0 : VALUE_0
Use DAP to enable
0x1 : VALUE_1
Fixed state
End of enumeration elements list.
CPU1_NIDEN : CPU1 (Micro cortex M33) non-invasive debug enable
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
0 : VALUE_0
Use DAP to enable
0x1 : VALUE_1
Fixed state
End of enumeration elements list.
UUID_CHECK : Enforce UUID match during Debug authentication.
bits : 15 - 15 (1 bit)
access : read-write
INVERSE_VALUE : inverse value of bits [15:0]
bits : 16 - 31 (16 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x106C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
SHA256_DIGEST0 for DIGEST[31:0] SHA256_DIGEST1 for DIGEST[63:32] SHA256_DIGEST2 for DIGEST[95:64] SHA256_DIGEST3 for DIGEST[127:96] SHA256_DIGEST4 for DIGEST[159:128] SHA256_DIGEST5 for DIGEST[191:160] SHA256_DIGEST6 for DIGEST[223:192] SHA256_DIGEST7 for DIGEST[255:224]
address_offset : 0x1150 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x11A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x12E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
.
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NIDEN : Non Secure non-invasive debug fixed state
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : DISABLE
Disable
0x1 : ENABLE
Enable
End of enumeration elements list.
DBGEN : Non Secure debug fixed state
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : DISABLE
Disable
0x1 : ENABLE
Enable
End of enumeration elements list.
SPNIDEN : Secure non-invasive debug fixed state
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : DISABLE
Disable
0x1 : ENABLE
Enable
End of enumeration elements list.
SPIDEN : Secure invasive debug fixed state
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0 : DISABLE
Disable
0x1 : ENABLE
Enable
End of enumeration elements list.
TAPEN : JTAG TAP fixed state
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
0 : DISABLE
Disable
0x1 : ENABLE
Enable
End of enumeration elements list.
CPU1_DBGEN : CPU1 (Micro cortex M33) invasive debug fixed state
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : DISABLE
Disable
0x1 : ENABLE
Enable
End of enumeration elements list.
ISP_CMD_EN : ISP Boot Command fixed state
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DISABLE
Disable
0x1 : ENABLE
Enable
End of enumeration elements list.
FA_CMD_EN : FA Command fixed state
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
0 : DISABLE
Disable
0x1 : ENABLE
Enable
End of enumeration elements list.
ME_CMD_EN : Flash Mass Erase Command fixed state
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
0 : DISABLE
Disable
0x1 : ENABLE
Enable
End of enumeration elements list.
CPU1_NIDEN : CPU1 (Micro cortex M33) non-invasive debug fixed state
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
0 : DISABLE
Disable
0x1 : ENABLE
Enable
End of enumeration elements list.
INVERSE_VALUE : inverse value of bits [15:0]
bits : 16 - 31 (16 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x1420 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
ROTKH0 for Root of Trust Keys Table hash[255:224] ROTKH1 for Root of Trust Keys Table hash[223:192] ROTKH2 for Root of Trust Keys Table hash[191:160] ROTKH3 for Root of Trust Keys Table hash[159:128] ROTKH4 for Root of Trust Keys Table hash[127:96] ROTKH5 for Root of Trust Keys Table hash[95:64] ROTKH6 for Root of Trust Keys Table hash[63:32] ROTKH7 for Root of Trust Keys Table hash[31:0]
address_offset : 0x14C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x1564 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x16AC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x17F8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
.
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VENDOR_USAGE : Upper 16 bits of vendor usage field defined in DAP. Lower 16-bits come from customer field area.
bits : 16 - 31 (16 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x1948 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
ROTKH0 for Root of Trust Keys Table hash[255:224] ROTKH1 for Root of Trust Keys Table hash[223:192] ROTKH2 for Root of Trust Keys Table hash[191:160] ROTKH3 for Root of Trust Keys Table hash[159:128] ROTKH4 for Root of Trust Keys Table hash[127:96] ROTKH5 for Root of Trust Keys Table hash[95:64] ROTKH6 for Root of Trust Keys Table hash[63:32] ROTKH7 for Root of Trust Keys Table hash[31:0]
address_offset : 0x1A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x1A9C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x1BF4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
.
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RSA4K : Use RSA4096 keys only. 00- RSA2048 keys 01, 10, 11 - RSA4096 keys
bits : 0 - 1 (2 bit)
access : read-write
DICE_ENC_NXP_CFG : Include NXP area in DICE computation. 00 - not included 01, 10, 11 - included
bits : 2 - 3 (2 bit)
access : read-write
DICE_CUST_CFG : Include Customer factory area (including keys) in DICE computation. 00 - not included 01, 10, 11 - included
bits : 4 - 5 (2 bit)
access : read-write
SKIP_DICE : Skip DICE computation. 00 - Enable DICE 01,10,11 - Disable DICE
bits : 6 - 7 (2 bit)
access : read-write
TZM_IMAGE_TYPE : TrustZone-M mode. 00 - TZM mode in image header. 01 - Disable TZ-M. Boots to NonSecure. 10 - TZ-M enable boots to secure mode. 11 - Preset TZM checker from image header.
bits : 8 - 9 (2 bit)
access : read-write
BLOCK_SET_KEY : Block PUF key code generation. 00 - Enable Key code generation 01, 10, 11 - Disable key code generation
bits : 10 - 11 (2 bit)
access : read-write
BLOCK_ENROLL : Block PUF enrollement. 00 - Enable enrollment mode 01, 10, 11 - Disable further enrollmnet
bits : 12 - 13 (2 bit)
access : read-write
DICE_INC_SEC_EPOCH : Include security EPOCH in DICE
bits : 14 - 15 (2 bit)
access : read-write
SEC_BOOT_EN : Secure boot enable. 00 - Plain image (internal flash with or without CRC) 01, 10, 11 - Boot signed images. (internal flash, RSA signed)
bits : 30 - 31 (2 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x1D50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x1EB0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
.
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ADDR0_PRG : Programmable portion of the base address of region 0.
bits : 0 - 3 (4 bit)
access : read-write
ADDR1_PRG : Programmable portion of the base address of region 1.
bits : 4 - 7 (4 bit)
access : read-write
ADDR2_PRG : Programmable portion of the base address of region 2.
bits : 8 - 11 (4 bit)
access : read-write
LOCK_REG0 : Lock PRINCE region0 settings. 00 - Region is not locked. 01, 10, 11 - Region is locked.
bits : 16 - 17 (2 bit)
access : read-write
LOCK_REG1 : Lock PRINCE region1 settings. 00 - Region is not locked. 01, 10, 11 - Region is locked.
bits : 18 - 19 (2 bit)
access : read-write
LOCK_REG2 : Lock PRINCE region2 settings. 00 - Region is not locked. 01, 10, 11 - Region is locked.
bits : 20 - 21 (2 bit)
access : read-write
REG0_ERASE_CHECK_EN : For PRINCE region0 enable checking whether all encrypted pages are erased together. 00 - Check is disabled. 01, 10, 11 - Check is enabled.
bits : 24 - 25 (2 bit)
access : read-write
REG1_ERASE_CHECK_EN : For PRINCE region1 enable checking whether all encrypted pages are erased together. 00 - Check is disabled. 01, 10, 11 - Check is enabled.
bits : 26 - 27 (2 bit)
access : read-write
REG2_ERASE_CHECK_EN : For PRINCE region2 enable checking whether all encrypted pages are erased together. 00 - Check is disabled. 01, 10, 11 - Check is enabled.
bits : 28 - 29 (2 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x200 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x2014 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
ROTKH0 for Root of Trust Keys Table hash[255:224] ROTKH1 for Root of Trust Keys Table hash[223:192] ROTKH2 for Root of Trust Keys Table hash[191:160] ROTKH3 for Root of Trust Keys Table hash[159:128] ROTKH4 for Root of Trust Keys Table hash[127:96] ROTKH5 for Root of Trust Keys Table hash[95:64] ROTKH6 for Root of Trust Keys Table hash[63:32] ROTKH7 for Root of Trust Keys Table hash[31:0]
address_offset : 0x208 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x217C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x22E8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Region 0, sub-region enable
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x2458 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x25CC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
ROTKH0 for Root of Trust Keys Table hash[255:224] ROTKH1 for Root of Trust Keys Table hash[223:192] ROTKH2 for Root of Trust Keys Table hash[191:160] ROTKH3 for Root of Trust Keys Table hash[159:128] ROTKH4 for Root of Trust Keys Table hash[127:96] ROTKH5 for Root of Trust Keys Table hash[95:64] ROTKH6 for Root of Trust Keys Table hash[63:32] ROTKH7 for Root of Trust Keys Table hash[31:0]
address_offset : 0x26C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x2744 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Region 1, sub-region enable
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x28C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x2A40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x2BC4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Region 2, sub-region enable
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
ROTKH0 for Root of Trust Keys Table hash[255:224] ROTKH1 for Root of Trust Keys Table hash[223:192] ROTKH2 for Root of Trust Keys Table hash[191:160] ROTKH3 for Root of Trust Keys Table hash[159:128] ROTKH4 for Root of Trust Keys Table hash[127:96] ROTKH5 for Root of Trust Keys Table hash[95:64] ROTKH6 for Root of Trust Keys Table hash[63:32] ROTKH7 for Root of Trust Keys Table hash[31:0]
address_offset : 0x2D4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x2D4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x2ED8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Xtal 32kHz capabank triming.
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TRIM_VALID : 0 : Capa Bank trimmings not valid. Default trimmings value are used. 1 : Capa Bank trimmings valid.
bits : 0 - 0 (1 bit)
access : read-write
XTAL_LOAD_CAP_IEC_PF_X100 : Load capacitance, pF x 100. For example, 6pF becomes 600.
bits : 1 - 10 (10 bit)
access : read-write
PCB_XIN_PARA_CAP_PF_X100 : PCB XIN parasitic capacitance, pF x 100. For example, 6pF becomes 600.
bits : 11 - 20 (10 bit)
access : read-write
PCB_XOUT_PARA_CAP_PF_X100 : PCB XOUT parasitic capacitance, pF x 100. For example, 6pF becomes 600.
bits : 21 - 30 (10 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x304 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x3068 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x31FC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x3394 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Xtal 16MHz capabank triming.
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TRIM_VALID : 0 : Capa Bank trimmings not valid. Default trimmings value are used. 1 : Capa Bank trimmings valid.
bits : 0 - 0 (1 bit)
access : read-write
XTAL_LOAD_CAP_IEC_PF_X100 : Load capacitance, pF x 100. For example, 6pF becomes 600.
bits : 1 - 10 (10 bit)
access : read-write
PCB_XIN_PARA_CAP_PF_X100 : PCB XIN parasitic capacitance, pF x 100. For example, 6pF becomes 600.
bits : 11 - 20 (10 bit)
access : read-write
PCB_XOUT_PARA_CAP_PF_X100 : PCB XOUT parasitic capacitance, pF x 100. For example, 6pF becomes 600.
bits : 21 - 30 (10 bit)
access : read-write
ROTKH0 for Root of Trust Keys Table hash[255:224] ROTKH1 for Root of Trust Keys Table hash[223:192] ROTKH2 for Root of Trust Keys Table hash[191:160] ROTKH3 for Root of Trust Keys Table hash[159:128] ROTKH4 for Root of Trust Keys Table hash[127:96] ROTKH5 for Root of Trust Keys Table hash[95:64] ROTKH6 for Root of Trust Keys Table hash[63:32] ROTKH7 for Root of Trust Keys Table hash[31:0]
address_offset : 0x340 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x3530 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x36D0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x3874 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x3A1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x3BC8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
SHA256_DIGEST0 for DIGEST[31:0] SHA256_DIGEST1 for DIGEST[63:32] SHA256_DIGEST2 for DIGEST[95:64] SHA256_DIGEST3 for DIGEST[127:96] SHA256_DIGEST4 for DIGEST[159:128] SHA256_DIGEST5 for DIGEST[191:160] SHA256_DIGEST6 for DIGEST[223:192] SHA256_DIGEST7 for DIGEST[255:224]
address_offset : 0x3C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x3D78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x3F2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
.
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SPI_RECOVERY_BOOT_EN : SPI flash recovery boot is enabled, if non-zero value is written to this field.
bits : 0 - 4 (5 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x40C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x40E4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x42A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x4460 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x4624 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x47EC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x49B8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x4B88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x4D5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x4F34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x5110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x518 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
SHA256_DIGEST0 for DIGEST[31:0] SHA256_DIGEST1 for DIGEST[63:32] SHA256_DIGEST2 for DIGEST[95:64] SHA256_DIGEST3 for DIGEST[127:96] SHA256_DIGEST4 for DIGEST[159:128] SHA256_DIGEST5 for DIGEST[191:160] SHA256_DIGEST6 for DIGEST[223:192] SHA256_DIGEST7 for DIGEST[255:224]
address_offset : 0x5A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x628 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x73C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
SHA256_DIGEST0 for DIGEST[31:0] SHA256_DIGEST1 for DIGEST[63:32] SHA256_DIGEST2 for DIGEST[95:64] SHA256_DIGEST3 for DIGEST[127:96] SHA256_DIGEST4 for DIGEST[159:128] SHA256_DIGEST5 for DIGEST[191:160] SHA256_DIGEST6 for DIGEST[223:192] SHA256_DIGEST7 for DIGEST[255:224]
address_offset : 0x78C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
.
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
USB_VENDOR_ID : .
bits : 0 - 15 (16 bit)
access : read-write
USB_PRODUCT_ID : .
bits : 16 - 31 (16 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x854 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0x970 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
SHA256_DIGEST0 for DIGEST[31:0] SHA256_DIGEST1 for DIGEST[63:32] SHA256_DIGEST2 for DIGEST[95:64] SHA256_DIGEST3 for DIGEST[127:96] SHA256_DIGEST4 for DIGEST[159:128] SHA256_DIGEST5 for DIGEST[191:160] SHA256_DIGEST6 for DIGEST[223:192] SHA256_DIGEST7 for DIGEST[255:224]
address_offset : 0x978 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
ROTKH0 for Root of Trust Keys Table hash[255:224] ROTKH1 for Root of Trust Keys Table hash[223:192] ROTKH2 for Root of Trust Keys Table hash[191:160] ROTKH3 for Root of Trust Keys Table hash[159:128] ROTKH4 for Root of Trust Keys Table hash[127:96] ROTKH5 for Root of Trust Keys Table hash[95:64] ROTKH6 for Root of Trust Keys Table hash[63:32] ROTKH7 for Root of Trust Keys Table hash[31:0]
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0xA90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
SHA256_DIGEST0 for DIGEST[31:0] SHA256_DIGEST1 for DIGEST[63:32] SHA256_DIGEST2 for DIGEST[95:64] SHA256_DIGEST3 for DIGEST[127:96] SHA256_DIGEST4 for DIGEST[159:128] SHA256_DIGEST5 for DIGEST[191:160] SHA256_DIGEST6 for DIGEST[223:192] SHA256_DIGEST7 for DIGEST[255:224]
address_offset : 0xB68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0xBB4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
.
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0xCDC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
SHA256_DIGEST0 for DIGEST[31:0] SHA256_DIGEST1 for DIGEST[63:32] SHA256_DIGEST2 for DIGEST[95:64] SHA256_DIGEST3 for DIGEST[127:96] SHA256_DIGEST4 for DIGEST[159:128] SHA256_DIGEST5 for DIGEST[191:160] SHA256_DIGEST6 for DIGEST[223:192] SHA256_DIGEST7 for DIGEST[255:224]
address_offset : 0xD5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0xE08 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
Customer Defined (Programable through ROM API)
address_offset : 0xF38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
ROTKH0 for Root of Trust Keys Table hash[255:224] ROTKH1 for Root of Trust Keys Table hash[223:192] ROTKH2 for Root of Trust Keys Table hash[191:160] ROTKH3 for Root of Trust Keys Table hash[159:128] ROTKH4 for Root of Trust Keys Table hash[127:96] ROTKH5 for Root of Trust Keys Table hash[95:64] ROTKH6 for Root of Trust Keys Table hash[63:32] ROTKH7 for Root of Trust Keys Table hash[31:0]
address_offset : 0xF4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
SHA256_DIGEST0 for DIGEST[31:0] SHA256_DIGEST1 for DIGEST[63:32] SHA256_DIGEST2 for DIGEST[95:64] SHA256_DIGEST3 for DIGEST[127:96] SHA256_DIGEST4 for DIGEST[159:128] SHA256_DIGEST5 for DIGEST[191:160] SHA256_DIGEST6 for DIGEST[223:192] SHA256_DIGEST7 for DIGEST[255:224]
address_offset : 0xF54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIELD : .
bits : 0 - 31 (32 bit)
access : read-write
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