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WWDT

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1C byte (0x0)
mem_usage : registers
protection : not protected

Registers

MOD

WARNINT

WINDOW

TC

FEED

TV


MOD

Watchdog mode register. This register contains the basic mode and status of the Watchdog Timer.
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MOD MOD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WDEN WDRESET WDTOF WDINT WDPROTECT

WDEN : Watchdog enable bit. Once this bit is set to one and a watchdog feed is performed, the watchdog timer will run permanently.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : STOP

Stop. The watchdog timer is stopped.

0x1 : RUN

Run. The watchdog timer is running.

End of enumeration elements list.

WDRESET : Watchdog reset enable bit. Once this bit has been written with a 1 it cannot be re-written with a 0.
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : INTERRUPT

Interrupt. A watchdog time-out will not cause a chip reset.

0x1 : RESET

Reset. A watchdog time-out will cause a chip reset.

End of enumeration elements list.

WDTOF : Watchdog time-out flag. Set when the watchdog timer times out, by a feed error, or by events associated with WDPROTECT. Cleared by software writing a 0 to this bit position. Causes a chip reset if WDRESET = 1.
bits : 2 - 2 (1 bit)
access : read-write

WDINT : Warning interrupt flag. Set when the timer is at or below the value in WDWARNINT. Cleared by software writing a 1 to this bit position. Note that this bit cannot be cleared while the WARNINT value is equal to the value of the TV register. This can occur if the value of WARNINT is 0 and the WDRESET bit is 0 when TV decrements to 0.
bits : 3 - 3 (1 bit)
access : read-write

WDPROTECT : Watchdog update mode. This bit can be set once by software and is only cleared by a reset.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : FLEXIBLE

Flexible. The watchdog time-out value (TC) can be changed at any time.

0x1 : THRESHOLD

Threshold. The watchdog time-out value (TC) can be changed only after the counter is below the value of WDWARNINT and WDWINDOW.

End of enumeration elements list.


WARNINT

Watchdog Warning Interrupt compare value.
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WARNINT WARNINT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WARNINT

WARNINT : Watchdog warning interrupt compare value.
bits : 0 - 9 (10 bit)
access : read-write


WINDOW

Watchdog Window compare value.
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WINDOW WINDOW read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WINDOW

WINDOW : Watchdog window value.
bits : 0 - 23 (24 bit)
access : read-write


TC

Watchdog timer constant register. This 24-bit register determines the time-out value.
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TC TC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COUNT

COUNT : Watchdog time-out value.
bits : 0 - 23 (24 bit)
access : read-write


FEED

Watchdog feed sequence register. Writing 0xAA followed by 0x55 to this register reloads the Watchdog timer with the value contained in TC.
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

FEED FEED write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FEED

FEED : Feed value should be 0xAA followed by 0x55.
bits : 0 - 7 (8 bit)
access : write-only


TV

Watchdog timer value register. This 24-bit register reads out the current value of the Watchdog timer.
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

TV TV read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COUNT

COUNT : Counter timer value.
bits : 0 - 23 (24 bit)
access : read-only



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