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USBHSD

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x38 byte (0x0)
mem_usage : registers
protection : not protected

Registers

DEVCMDSTAT

LPM

EPSKIP

EPINUSE

EPBUFCFG

INTSTAT

INTEN

INTSETSTAT

EPTOGGLE

INFO

EPLISTSTART

DATABUFSTART


DEVCMDSTAT

USB Device Command/Status register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DEVCMDSTAT DEVCMDSTAT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DEV_ADDR DEV_EN SETUP FORCE_NEEDCLK LPM_SUP INTONNAK_AO INTONNAK_AI INTONNAK_CO INTONNAK_CI DCON DSUS LPM_SUS LPM_REWP Speed DCON_C DSUS_C DRES_C VBUS_DEBOUNCED PHY_TEST_MODE

DEV_ADDR : USB device address.
bits : 0 - 6 (7 bit)
access : read-write

DEV_EN : USB device enable.
bits : 7 - 7 (1 bit)
access : read-write

SETUP : SETUP token received.
bits : 8 - 8 (1 bit)
access : read-write

FORCE_NEEDCLK : Forces the NEEDCLK output to always be on:.
bits : 9 - 9 (1 bit)
access : read-write

LPM_SUP : LPM Supported:.
bits : 11 - 11 (1 bit)
access : read-write

INTONNAK_AO : Interrupt on NAK for interrupt and bulk OUT EP:.
bits : 12 - 12 (1 bit)
access : read-write

INTONNAK_AI : Interrupt on NAK for interrupt and bulk IN EP:.
bits : 13 - 13 (1 bit)
access : read-write

INTONNAK_CO : Interrupt on NAK for control OUT EP:.
bits : 14 - 14 (1 bit)
access : read-write

INTONNAK_CI : Interrupt on NAK for control IN EP:.
bits : 15 - 15 (1 bit)
access : read-write

DCON : Device status - connect.
bits : 16 - 16 (1 bit)
access : read-write

DSUS : Device status - suspend.
bits : 17 - 17 (1 bit)
access : read-write

LPM_SUS : Device status - LPM Suspend.
bits : 19 - 19 (1 bit)
access : read-write

LPM_REWP : LPM Remote Wake-up Enabled by USB host.
bits : 20 - 20 (1 bit)
access : read-only

Speed : This field indicates the speed at which the device operates: 00b: reserved 01b: full-speed 10b: high-speed 11b: super-speed (reserved for future use).
bits : 22 - 23 (2 bit)
access : read-only

DCON_C : Device status - connect change.
bits : 24 - 24 (1 bit)
access : read-write

DSUS_C : Device status - suspend change.
bits : 25 - 25 (1 bit)
access : read-write

DRES_C : Device status - reset change.
bits : 26 - 26 (1 bit)
access : read-write

VBUS_DEBOUNCED : This bit indicates if VBUS is detected or not.
bits : 28 - 28 (1 bit)
access : read-only

PHY_TEST_MODE : This field is written by firmware to put the PHY into a test mode as defined by the USB2.0 specification
bits : 29 - 31 (3 bit)
access : read-write


LPM

USB Link Power Management register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPM LPM read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 HIRD_HW HIRD_SW DATA_PENDING

HIRD_HW : Host Initiated Resume Duration - HW.
bits : 0 - 3 (4 bit)
access : read-only

HIRD_SW : Host Initiated Resume Duration - SW.
bits : 4 - 7 (4 bit)
access : read-write

DATA_PENDING : As long as this bit is set to one and LPM supported bit is set to one, HW will return a NYET handshake on every LPM token it receives.
bits : 8 - 8 (1 bit)
access : read-write


EPSKIP

USB Endpoint skip
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EPSKIP EPSKIP read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SKIP

SKIP : Endpoint skip: Writing 1 to one of these bits, will indicate to HW that it must deactivate the buffer assigned to this endpoint and return control back to software.
bits : 0 - 11 (12 bit)
access : read-write


EPINUSE

USB Endpoint Buffer in use
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EPINUSE EPINUSE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BUF

BUF : Buffer in use: This register has one bit per physical endpoint.
bits : 2 - 11 (10 bit)
access : read-write


EPBUFCFG

USB Endpoint Buffer Configuration register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EPBUFCFG EPBUFCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BUF_SB

BUF_SB : Buffer usage: This register has one bit per physical endpoint.
bits : 2 - 11 (10 bit)
access : read-write


INTSTAT

USB interrupt status register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTSTAT INTSTAT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EP0OUT EP0IN EP1OUT EP1IN EP2OUT EP2IN EP3OUT EP3IN EP4OUT EP4IN EP5OUT EP5IN FRAME_INT DEV_INT

EP0OUT : Interrupt status register bit for the Control EP0 OUT direction.
bits : 0 - 0 (1 bit)
access : read-write

EP0IN : Interrupt status register bit for the Control EP0 IN direction.
bits : 1 - 1 (1 bit)
access : read-write

EP1OUT : Interrupt status register bit for the EP1 OUT direction.
bits : 2 - 2 (1 bit)
access : read-write

EP1IN : Interrupt status register bit for the EP1 IN direction.
bits : 3 - 3 (1 bit)
access : read-write

EP2OUT : Interrupt status register bit for the EP2 OUT direction.
bits : 4 - 4 (1 bit)
access : read-write

EP2IN : Interrupt status register bit for the EP2 IN direction.
bits : 5 - 5 (1 bit)
access : read-write

EP3OUT : Interrupt status register bit for the EP3 OUT direction.
bits : 6 - 6 (1 bit)
access : read-write

EP3IN : Interrupt status register bit for the EP3 IN direction.
bits : 7 - 7 (1 bit)
access : read-write

EP4OUT : Interrupt status register bit for the EP4 OUT direction.
bits : 8 - 8 (1 bit)
access : read-write

EP4IN : Interrupt status register bit for the EP4 IN direction.
bits : 9 - 9 (1 bit)
access : read-write

EP5OUT : Interrupt status register bit for the EP5 OUT direction.
bits : 10 - 10 (1 bit)
access : read-write

EP5IN : Interrupt status register bit for the EP5 IN direction.
bits : 11 - 11 (1 bit)
access : read-write

FRAME_INT : Frame interrupt.
bits : 30 - 30 (1 bit)
access : read-write

DEV_INT : Device status interrupt.
bits : 31 - 31 (1 bit)
access : read-write


INTEN

USB interrupt enable register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTEN INTEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EP_INT_EN FRAME_INT_EN DEV_INT_EN

EP_INT_EN : If this bit is set and the corresponding USB interrupt status bit is set, a HW interrupt is generated on the interrupt line.
bits : 0 - 11 (12 bit)
access : read-write

FRAME_INT_EN : If this bit is set and the corresponding USB interrupt status bit is set, a HW interrupt is generated on the interrupt line.
bits : 30 - 30 (1 bit)
access : read-write

DEV_INT_EN : If this bit is set and the corresponding USB interrupt status bit is set, a HW interrupt is generated on the interrupt line.
bits : 31 - 31 (1 bit)
access : read-write


INTSETSTAT

USB set interrupt status register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INTSETSTAT INTSETSTAT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EP_SET_INT FRAME_SET_INT DEV_SET_INT

EP_SET_INT : If software writes a one to one of these bits, the corresponding USB interrupt status bit is set.
bits : 0 - 11 (12 bit)
access : read-write

FRAME_SET_INT : If software writes a one to one of these bits, the corresponding USB interrupt status bit is set.
bits : 30 - 30 (1 bit)
access : read-write

DEV_SET_INT : If software writes a one to one of these bits, the corresponding USB interrupt status bit is set.
bits : 31 - 31 (1 bit)
access : read-write


EPTOGGLE

USB Endpoint toggle register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

EPTOGGLE EPTOGGLE read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TOGGLE

TOGGLE : Endpoint data toggle: This field indicates the current value of the data toggle for the corresponding endpoint.
bits : 0 - 29 (30 bit)
access : read-only


INFO

USB Info register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

INFO INFO read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FRAME_NR ERR_CODE MINREV MAJREV

FRAME_NR : Frame number.
bits : 0 - 10 (11 bit)
access : read-only

ERR_CODE : The error code which last occurred:.
bits : 11 - 14 (4 bit)
access : read-only

MINREV : Minor revision.
bits : 16 - 23 (8 bit)
access : read-only

MAJREV : Major revision.
bits : 24 - 31 (8 bit)
access : read-only


EPLISTSTART

USB EP Command/Status List start address
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EPLISTSTART EPLISTSTART read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EP_LIST_PRG EP_LIST_FIXED

EP_LIST_PRG : Programmable portion of the USB EP Command/Status List address.
bits : 8 - 19 (12 bit)
access : read-write

EP_LIST_FIXED : Fixed portion of USB EP Command/Status List address.
bits : 20 - 31 (12 bit)
access : read-only


DATABUFSTART

USB Data buffer start address
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATABUFSTART DATABUFSTART read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DA_BUF

DA_BUF : Start address of the memory page where all endpoint data buffers are located.
bits : 0 - 31 (32 bit)
access : read-write



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