\n
address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection : not protected
DMA Multiplexer Channel 0 Control register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DMAREQ_ID : DMA Request ID
bits : 0 - 6 (7 bit)
SOIE : Synchronization Overrun Interrupt Enable
bits : 8 - 8 (1 bit)
EGE : Event Generation Enable
bits : 9 - 9 (1 bit)
SE : Synchronization enable
bits : 16 - 16 (1 bit)
SPOL : Sync polarity
bits : 17 - 18 (2 bit)
NBREQ : Nb request
bits : 19 - 23 (5 bit)
SYNC_ID : SYNC_ID
bits : 24 - 28 (5 bit)
DMA Multiplexer Channel 4 Control register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DMAREQ_ID : DMA Request ID
bits : 0 - 6 (7 bit)
SOIE : Synchronization Overrun Interrupt Enable
bits : 8 - 8 (1 bit)
EGE : Event Generation Enable
bits : 9 - 9 (1 bit)
SE : Synchronization enable
bits : 16 - 16 (1 bit)
SPOL : Sync polarity
bits : 17 - 18 (2 bit)
NBREQ : Nb request
bits : 19 - 23 (5 bit)
SYNC_ID : SYNC_ID
bits : 24 - 28 (5 bit)
DMA Request Generator 0 Control Register
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SIG_ID : Signal ID
bits : 0 - 4 (5 bit)
OIE : Overrun Interrupt Enable
bits : 8 - 8 (1 bit)
GE : Generation Enable
bits : 16 - 16 (1 bit)
GPOL : Generation Polarity
bits : 17 - 18 (2 bit)
GNBREQ : Number of Request
bits : 19 - 23 (5 bit)
DMA Request Generator 1 Control Register
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SIG_ID : Signal ID
bits : 0 - 4 (5 bit)
OIE : Overrun Interrupt Enable
bits : 8 - 8 (1 bit)
GE : Generation Enable
bits : 16 - 16 (1 bit)
GPOL : Generation Polarity
bits : 17 - 18 (2 bit)
GNBREQ : Number of Request
bits : 19 - 23 (5 bit)
DMA Request Generator 2 Control Register
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SIG_ID : Signal ID
bits : 0 - 4 (5 bit)
OIE : Overrun Interrupt Enable
bits : 8 - 8 (1 bit)
GE : Generation Enable
bits : 16 - 16 (1 bit)
GPOL : Generation Polarity
bits : 17 - 18 (2 bit)
GNBREQ : Number of Request
bits : 19 - 23 (5 bit)
DMA Request Generator 3 Control Register
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SIG_ID : Signal ID
bits : 0 - 4 (5 bit)
OIE : Overrun Interrupt Enable
bits : 8 - 8 (1 bit)
GE : Generation Enable
bits : 16 - 16 (1 bit)
GPOL : Generation Polarity
bits : 17 - 18 (2 bit)
GNBREQ : Number of Request
bits : 19 - 23 (5 bit)
DMA Multiplexer Channel 10 Control register
address_offset : 0x138 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DMAREQ_ID : DMA request identification
bits : 0 - 6 (7 bit)
SOIE : Synchronization overrun interrupt enable
bits : 8 - 8 (1 bit)
EGE : Event generation enable
bits : 9 - 9 (1 bit)
SE : Synchronization enable
bits : 16 - 16 (1 bit)
SPOL : Synchronization polarity
bits : 17 - 18 (2 bit)
NBREQ : Number of DMA requests minus 1 to forward
bits : 19 - 23 (5 bit)
SYNC_ID : Synchronization identification
bits : 24 - 28 (5 bit)
DMA Multiplexer Channel 10 Control register
address_offset : 0x13C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DMAREQ_ID : DMA request identification
bits : 0 - 6 (7 bit)
SOIE : Synchronization overrun interrupt enable
bits : 8 - 8 (1 bit)
EGE : Event generation enable
bits : 9 - 9 (1 bit)
SE : Synchronization enable
bits : 16 - 16 (1 bit)
SPOL : Synchronization polarity
bits : 17 - 18 (2 bit)
NBREQ : Number of DMA requests minus 1 to forward
bits : 19 - 23 (5 bit)
SYNC_ID : Synchronization identification
bits : 24 - 28 (5 bit)
DMA Multiplexer Channel 5 Control register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DMAREQ_ID : DMA Request ID
bits : 0 - 6 (7 bit)
OIE : Synchronization Overrun Interrupt Enable
bits : 8 - 8 (1 bit)
EGE : Event Generation Enable
bits : 9 - 9 (1 bit)
SE : Synchronization enable
bits : 16 - 16 (1 bit)
SPOL : Sync polarity
bits : 17 - 18 (2 bit)
NBREQ : Nb request
bits : 19 - 23 (5 bit)
SYNC_ID : SYNC_ID
bits : 24 - 28 (5 bit)
DMA Request Generator Status Register
address_offset : 0x140 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
OF0 : Generator Overrun Flag 0
bits : 0 - 0 (1 bit)
OF1 : Generator Overrun Flag 1
bits : 1 - 1 (1 bit)
OF2 : Generator Overrun Flag 2
bits : 2 - 2 (1 bit)
OF3 : Generator Overrun Flag 3
bits : 3 - 3 (1 bit)
DMA Request Generator Clear Flag Register
address_offset : 0x144 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSOF0 : Generator Clear Overrun Flag 0
bits : 0 - 0 (1 bit)
CSOF1 : Generator Clear Overrun Flag 1
bits : 1 - 1 (1 bit)
CSOF2 : Generator Clear Overrun Flag 2
bits : 2 - 2 (1 bit)
CSOF3 : Generator Clear Overrun Flag 3
bits : 3 - 3 (1 bit)
DMA Multiplexer Channel 6 Control register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DMAREQ_ID : DMA Request ID
bits : 0 - 6 (7 bit)
SOIE : Synchronization Overrun Interrupt Enable
bits : 8 - 8 (1 bit)
EGE : Event Generation Enable
bits : 9 - 9 (1 bit)
SE : Synchronization enable
bits : 16 - 16 (1 bit)
SPOL : Sync polarity
bits : 17 - 18 (2 bit)
NBREQ : Nb request
bits : 19 - 23 (5 bit)
SYNC_ID : SYNC_ID
bits : 24 - 28 (5 bit)
DMA Multiplexer Channel 7 Control register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DMAREQ_ID : DMA Request ID
bits : 0 - 6 (7 bit)
SOIE : Synchronization Overrun Interrupt Enable
bits : 8 - 8 (1 bit)
EGE : Event Generation Enable
bits : 9 - 9 (1 bit)
SE : Synchronization enable
bits : 16 - 16 (1 bit)
SPOL : Sync polarity
bits : 17 - 18 (2 bit)
NBREQ : Nb request
bits : 19 - 23 (5 bit)
SYNC_ID : SYNC_ID
bits : 24 - 28 (5 bit)
DMA Multiplexer Channel 8 Control register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DMAREQ_ID : DMA Request ID
bits : 0 - 6 (7 bit)
SOIE : Synchronization Overrun Interrupt Enable
bits : 8 - 8 (1 bit)
EGE : Event Generation Enable
bits : 9 - 9 (1 bit)
SE : Synchronization enable
bits : 16 - 16 (1 bit)
SPOL : Sync polarity
bits : 17 - 18 (2 bit)
NBREQ : Nb request
bits : 19 - 23 (5 bit)
SYNC_ID : SYNC_ID
bits : 24 - 28 (5 bit)
DMA Multiplexer Channel 9 Control register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DMAREQ_ID : DMA Request ID
bits : 0 - 6 (7 bit)
SOIE : Synchronization Overrun Interrupt Enable
bits : 8 - 8 (1 bit)
EGE : Event Generation Enable
bits : 9 - 9 (1 bit)
SE : Synchronization enable
bits : 16 - 16 (1 bit)
SPOL : Sync polarity
bits : 17 - 18 (2 bit)
NBREQ : Nb request
bits : 19 - 23 (5 bit)
SYNC_ID : SYNC_ID
bits : 24 - 28 (5 bit)
DMA Multiplexer Channel 10 Control register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DMAREQ_ID : DMA Request ID
bits : 0 - 6 (7 bit)
SOIE : Synchronization Overrun Interrupt Enable
bits : 8 - 8 (1 bit)
EGE : Event Generation Enable
bits : 9 - 9 (1 bit)
SE : Synchronization enable
bits : 16 - 16 (1 bit)
SPOL : Sync polarity
bits : 17 - 18 (2 bit)
NBREQ : Nb request
bits : 19 - 23 (5 bit)
SYNC_ID : SYNC_ID
bits : 24 - 28 (5 bit)
DMA Multiplexer Channel 11 Control register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DMAREQ_ID : DMA Request ID
bits : 0 - 6 (7 bit)
SOIE : Synchronization Overrun Interrupt Enable
bits : 8 - 8 (1 bit)
EGE : Event Generation Enable
bits : 9 - 9 (1 bit)
SE : Synchronization enable
bits : 16 - 16 (1 bit)
SPOL : Sync polarity
bits : 17 - 18 (2 bit)
NBREQ : Nb request
bits : 19 - 23 (5 bit)
SYNC_ID : SYNC_ID
bits : 24 - 28 (5 bit)
DMA Multiplexer Channel 12 Control register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DMAREQ_ID : DMA Request ID
bits : 0 - 6 (7 bit)
SOIE : Synchronization Overrun Interrupt Enable
bits : 8 - 8 (1 bit)
EGE : Event Generation Enable
bits : 9 - 9 (1 bit)
SE : Synchronization enable
bits : 16 - 16 (1 bit)
SPOL : Sync polarity
bits : 17 - 18 (2 bit)
NBREQ : Nb request
bits : 19 - 23 (5 bit)
SYNC_ID : SYNC_ID
bits : 24 - 28 (5 bit)
DMA Multiplexer Channel 13 Control register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DMAREQ_ID : DMA Request ID
bits : 0 - 6 (7 bit)
SOIE : Synchronization Overrun Interrupt Enable
bits : 8 - 8 (1 bit)
EGE : Event Generation Enable
bits : 9 - 9 (1 bit)
SE : Synchronization enable
bits : 16 - 16 (1 bit)
SPOL : Sync polarity
bits : 17 - 18 (2 bit)
NBREQ : Nb request
bits : 19 - 23 (5 bit)
SYNC_ID : SYNC_ID
bits : 24 - 28 (5 bit)
DMA Multiplexer Channel 1 Control register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DMAREQ_ID : DMA Request ID
bits : 0 - 6 (7 bit)
SOIE : Synchronization Overrun Interrupt Enable
bits : 8 - 8 (1 bit)
EGE : Event Generation Enable
bits : 9 - 9 (1 bit)
SE : Synchronization enable
bits : 16 - 16 (1 bit)
SPOL : Sync polarity
bits : 17 - 18 (2 bit)
NBREQ : Nb request
bits : 19 - 23 (5 bit)
SYNC_ID : SYNC_ID
bits : 24 - 28 (5 bit)
DMA Multiplexer Channel 2 Control register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DMAREQ_ID : DMA Request ID
bits : 0 - 6 (7 bit)
SOIE : Synchronization Overrun Interrupt Enable
bits : 8 - 8 (1 bit)
EGE : Event Generation Enable
bits : 9 - 9 (1 bit)
SE : Synchronization enable
bits : 16 - 16 (1 bit)
SPOL : Sync polarity
bits : 17 - 18 (2 bit)
NBREQ : Nb request
bits : 19 - 23 (5 bit)
SYNC_ID : SYNC_ID
bits : 24 - 28 (5 bit)
DMA Multiplexer Channel Status register
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SOF0 : Synchronization Overrun Flag 0
bits : 0 - 0 (1 bit)
SOF1 : Synchronization Overrun Flag 1
bits : 1 - 1 (1 bit)
SOF2 : Synchronization Overrun Flag 2
bits : 2 - 2 (1 bit)
SOF3 : Synchronization Overrun Flag 3
bits : 3 - 3 (1 bit)
SOF4 : Synchronization Overrun Flag 4
bits : 4 - 4 (1 bit)
SOF5 : Synchronization Overrun Flag 5
bits : 5 - 5 (1 bit)
SOF6 : Synchronization Overrun Flag 6
bits : 6 - 6 (1 bit)
SOF7 : Synchronization Overrun Flag 7
bits : 7 - 7 (1 bit)
SOF8 : Synchronization Overrun Flag 8
bits : 8 - 8 (1 bit)
SOF9 : Synchronization Overrun Flag 9
bits : 9 - 9 (1 bit)
SOF10 : Synchronization Overrun Flag 10
bits : 10 - 10 (1 bit)
SOF11 : Synchronization Overrun Flag 11
bits : 11 - 11 (1 bit)
SOF12 : Synchronization Overrun Flag 12
bits : 12 - 12 (1 bit)
SOF13 : Synchronization Overrun Flag 13
bits : 13 - 13 (1 bit)
SOF14 : Synchronization Overrun Flag 13
bits : 14 - 14 (1 bit)
SOF15 : Synchronization Overrun Flag 13
bits : 15 - 15 (1 bit)
DMA Channel Clear Flag Register
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSOF0 : Synchronization Clear Overrun Flag 0
bits : 0 - 0 (1 bit)
CSOF1 : Synchronization Clear Overrun Flag 1
bits : 1 - 1 (1 bit)
CSOF2 : Synchronization Clear Overrun Flag 2
bits : 2 - 2 (1 bit)
CSOF3 : Synchronization Clear Overrun Flag 3
bits : 3 - 3 (1 bit)
CSOF4 : Synchronization Clear Overrun Flag 4
bits : 4 - 4 (1 bit)
CSOF5 : Synchronization Clear Overrun Flag 5
bits : 5 - 5 (1 bit)
CSOF6 : Synchronization Clear Overrun Flag 6
bits : 6 - 6 (1 bit)
CSOF7 : Synchronization Clear Overrun Flag 7
bits : 7 - 7 (1 bit)
CSOF8 : Synchronization Clear Overrun Flag 8
bits : 8 - 8 (1 bit)
CSOF9 : Synchronization Clear Overrun Flag 9
bits : 9 - 9 (1 bit)
CSOF10 : Synchronization Clear Overrun Flag 10
bits : 10 - 10 (1 bit)
CSOF11 : Synchronization Clear Overrun Flag 11
bits : 11 - 11 (1 bit)
CSOF12 : Synchronization Clear Overrun Flag 12
bits : 12 - 12 (1 bit)
CSOF13 : Synchronization Clear Overrun Flag 13
bits : 13 - 13 (1 bit)
CSOF14 : Synchronization Clear Overrun Flag 13
bits : 14 - 14 (1 bit)
CSOF15 : Synchronization Clear Overrun Flag 13
bits : 15 - 15 (1 bit)
DMA Multiplexer Channel 3 Control register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DMAREQ_ID : DMA Request ID
bits : 0 - 6 (7 bit)
SOIE : Synchronization Overrun Interrupt Enable
bits : 8 - 8 (1 bit)
EGE : Event Generation Enable
bits : 9 - 9 (1 bit)
SE : Synchronization enable
bits : 16 - 16 (1 bit)
SPOL : Sync polarity
bits : 17 - 18 (2 bit)
NBREQ : Nb request
bits : 19 - 23 (5 bit)
SYNC_ID : SYNC_ID
bits : 24 - 28 (5 bit)
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