\n
address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection : not protected
ICACHE control register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN : EN
bits : 0 - 0 (1 bit)
CACHEINV : CACHEINV
bits : 1 - 1 (1 bit)
WAYSEL : WAYSEL
bits : 2 - 2 (1 bit)
HITMEN : HITMEN
bits : 16 - 16 (1 bit)
MISSMEN : MISSMEN
bits : 17 - 17 (1 bit)
HITMRST : HITMRST
bits : 18 - 18 (1 bit)
MISSMRST : MISSMRST
bits : 19 - 19 (1 bit)
ICACHE hit monitor register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
HITMON : HITMON
bits : 0 - 31 (32 bit)
ICACHE miss monitor register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
MISSMON : MISSMON
bits : 0 - 15 (16 bit)
ICACHE region configuration register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BASEADDR : BASEADDR
bits : 0 - 7 (8 bit)
RSIZE : RSIZE
bits : 9 - 11 (3 bit)
REN : REN
bits : 15 - 15 (1 bit)
REMAPADDR : REMAPADDR
bits : 16 - 26 (11 bit)
MSTSEL : MSTSEL
bits : 28 - 28 (1 bit)
HBURST : HBURST
bits : 31 - 31 (1 bit)
ICACHE region configuration register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BASEADDR : BASEADDR
bits : 0 - 7 (8 bit)
RSIZE : RSIZE
bits : 9 - 11 (3 bit)
REN : REN
bits : 15 - 15 (1 bit)
REMAPADDR : REMAPADDR
bits : 16 - 26 (11 bit)
MSTSEL : MSTSEL
bits : 28 - 28 (1 bit)
HBURST : HBURST
bits : 31 - 31 (1 bit)
ICACHE region configuration register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BASEADDR : BASEADDR
bits : 0 - 7 (8 bit)
RSIZE : RSIZE
bits : 9 - 11 (3 bit)
REN : REN
bits : 15 - 15 (1 bit)
REMAPADDR : REMAPADDR
bits : 16 - 26 (11 bit)
MSTSEL : MSTSEL
bits : 28 - 28 (1 bit)
HBURST : HBURST
bits : 31 - 31 (1 bit)
ICACHE region configuration register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BASEADDR : BASEADDR
bits : 0 - 7 (8 bit)
RSIZE : RSIZE
bits : 9 - 11 (3 bit)
REN : REN
bits : 15 - 15 (1 bit)
REMAPADDR : REMAPADDR
bits : 16 - 26 (11 bit)
MSTSEL : MSTSEL
bits : 28 - 28 (1 bit)
HBURST : HBURST
bits : 31 - 31 (1 bit)
ICACHE status register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
BUSYF : BUSYF
bits : 0 - 0 (1 bit)
BSYENDF : BSYENDF
bits : 1 - 1 (1 bit)
ERRF : ERRF
bits : 2 - 2 (1 bit)
ICACHE interrupt enable register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BSYENDIE : BSYENDIE
bits : 1 - 1 (1 bit)
ERRIE : ERRIE
bits : 2 - 2 (1 bit)
ICACHE flag clear register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
CBSYENDF : CBSYENDF
bits : 1 - 1 (1 bit)
CERRF : CERRF
bits : 2 - 2 (1 bit)
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