EVTIMERL

MATCHn_L

MATCHn_H

OSEVENT_CTRL

EVTIMERH

CAPTUREn_L

CAPTUREn_H

EVTIMER_COUNT_VALUE : A read reflects the current value of the lower 32 bits of the EVTIMER. Note there is physically only one EVTimer, readable from all domains.
bits : 0 - 31 (32 bit)
access : read-only

MATCHn_VALUE : The value written to the MATCH (L/H) register pair is compared against the central EVTIMER. When a match occurs, an interrupt request is generated if enabled. A separate pair of MATCH registers are implemented for each CPU. Each CPU reads its own local value at the same pair of addresses.
bits : 0 - 31 (32 bit)
access : read-write

MATCHn_VALUE : The value written to the MATCH (L/H) register pair is compared against the central EVTIMER. When a match occurs, an interrupt request is generated if enabled. A separate pair of MATCH registers are implemented for each CPU. Each CPU reads its own local value at the same pair of addresses.
bits : 0 - 9 (10 bit)
access : read-write

OSTIMER_INTRFLAG : This bit is set when a match occurs between the central 64-bit EVTIMER and the value programmed in the Match-register pair for the associated CPU This bit is cleared by writing a '1'. Writes to clear this bit are asynchronous. This should be done before a new match value is written into the MATCH_L/H registers
bits : 0 - 0 (1 bit)
access : read-write

OSTIMER_INTENA : When this bit is '1' an interrupt/wakeup request to the Domainn processor will be asserted when the OSTIMER_INTR flag is set. When this bit is '0', interrupt/wakeup requests due to the OSTIMER_INTR flag are blocked.A separate OSEVENT_CTRL register is implemented for each CPU. Each CPU reads its own local value at the same address.
bits : 1 - 1 (1 bit)
access : read-write

EVTIMER_COUNT_VALUE : A read reflects the current value of the upper 32 bits of the EVTIMER. Note there is physically only one EVTimer, readable from all domains.
bits : 0 - 9 (10 bit)
access : read-only

CAPTUREn_VALUE : A read reflects the value of the lower 32 bits of the central EVTIMER at the time the last capture signal was generated by the CPU. A separate pair of CAPTURE registers are implemented for each CPU. Each CPU reads its own capture value at the same pair of addresses.
bits : 0 - 31 (32 bit)
access : read-only

CAPTUREn_VALUE : A read reflects the value of the upper 32 bits of the central EVTIMER at the time the last capture signal was generated by the CPU. A separate pair of CAPTURE registers are implemented for each CPU. Each CPU reads its own capture value at the same pair of addresses.
bits : 0 - 9 (10 bit)
access : read-only