\n
address_offset : 0x0 Bytes (0x0)
    size : 0x10 byte (0x0)
    mem_usage : registers
    protection : not protected
    
    Self wake-up timer control register.
    address_offset : 0x0 Bytes (0x0)
    size : 32 bit
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
CLKSEL : Select the self wake-up timer clock source. Remark: This bit only has an effect if the SEL_EXTCLK bit is not set.
    bits : 0 - 0 (1 bit)
    access : read-write
 Enumeration: 
 0 : DIVIDED_IRC_CLOCK 
    
 Divided IRC clock. This clock runs at 750 kHz and provides time-out periods of up to approximately 95 minutes in 1.33 us increments. Remark: This clock is not available in not available in Deep-sleep, power-down, deep power-down modes. Do not select this option if the timer is to be used to wake up from one of these modes. 
 0x1 : LOW_POWER_CLOCK 
    
 This is the (nominally) 10 kHz clock and provides time-out periods of up to approximately 119 hours in 100 us increments. The accuracy of this clock is limited to +/- 40 % over temperature and processing. Remark: This clock is available in all power modes. Prior to use, the low-power oscillator must be enabled. The oscillator must also be set to remain active in Deep power-down if needed. 
End of enumeration elements list.
ALARMFLAG : Wake-up or alarm timer flag.
    bits : 1 - 1 (1 bit)
    access : read-write
 Enumeration: 
 0 : NO_TIME_OUT 
    
 No time-out. The self wake-up timer has not timed out. Writing a 0 to has no effect. 
 0x1 : TIME_OUT 
    
 Time-out. The self wake-up timer has timed out. This flag generates an interrupt request which can wake up the part from any reduced power mode including Deep power-down if the clock source is the low power oscillator. Writing a 1 clears this status bit. 
End of enumeration elements list.
CLEARCTR : Clears the self wake-up timer.
    bits : 2 - 2 (1 bit)
    access : read-write
 Enumeration: 
 0 : NO_EFFECT 
    
 No effect. Reading this bit always returns 0. 
 0x1 : CLEAR_THE_COUNTER 
    
 Clear the counter. Counting is halted until a new count value is loaded. 
End of enumeration elements list.
SEL_EXTCLK : Select external or internal clock source for the self wake-up timer. The internal clock source is selected by the CLKSEL bit in this register if SET_EXTCLK is set to internal.
    bits : 3 - 3 (1 bit)
    access : read-write
 Enumeration: 
 0 : INTERNAL 
    
 Internal. The clock source is the internal clock selected by the CLKSEL bit. 
 0x1 : EXTERNAL 
    
 External. The self wake-up timer uses the external WKTCLKIN pin. 
End of enumeration elements list.
    Counter register.
    address_offset : 0xC Bytes (0x0)
    size : 32 bit
    access : read-write
    reset_value : 0x0
    reset_Mask : 0x0
    
VALUE : A write to this register pre-loads start count value into the timer and starts the count-down sequence. A read reflects the current value of the timer.
    bits : 0 - 31 (32 bit)
    access : read-write
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