IOMUXC

SW_MUX_CTL_PAD_LCD_DATA14 SW MUX Control Register
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_LCD_DATA14

Select mux mode: ALT0 mux port: DATA14 of instance: LCD

0x3 : ALT3_CSI_DATA3

Select mux mode: ALT3 mux port: DATA3 of instance: CSI

0x4 : ALT4_EIM_DATA14

Select mux mode: ALT4 mux port: DATA14 of instance: EIM

0x5 : ALT5_GPIO3_IO19

Select mux mode: ALT5 mux port: IO19 of instance: GPIO3

0x6 : ALT6_SRC_BOOT_CFG14

Select mux mode: ALT6 mux port: BOOT_CFG14 of instance: SRC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad LCD_DATA14

End of enumeration elements list.

SW_MUX_CTL_PAD_LCD_DATA15

SW_MUX_CTL_PAD_LCD_DATA15 SW MUX Control Register
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_LCD_DATA15

Select mux mode: ALT0 mux port: DATA15 of instance: LCD

0x3 : ALT3_CSI_DATA2

Select mux mode: ALT3 mux port: DATA2 of instance: CSI

0x4 : ALT4_EIM_DATA15

Select mux mode: ALT4 mux port: DATA15 of instance: EIM

0x5 : ALT5_GPIO3_IO20

Select mux mode: ALT5 mux port: IO20 of instance: GPIO3

0x6 : ALT6_SRC_BOOT_CFG15

Select mux mode: ALT6 mux port: BOOT_CFG15 of instance: SRC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad LCD_DATA15

End of enumeration elements list.

SW_MUX_CTL_PAD_LCD_DATA16

SW_MUX_CTL_PAD_LCD_DATA16 SW MUX Control Register
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_LCD_DATA16

Select mux mode: ALT0 mux port: DATA16 of instance: LCD

0x1 : ALT1_FLEXTIMER1_CH4

Select mux mode: ALT1 mux port: CH4 of instance: FLEXTIMER1

0x3 : ALT3_CSI_DATA1

Select mux mode: ALT3 mux port: DATA1 of instance: CSI

0x4 : ALT4_EIM_CRE

Select mux mode: ALT4 mux port: CRE of instance: EIM

0x5 : ALT5_GPIO3_IO21

Select mux mode: ALT5 mux port: IO21 of instance: GPIO3

0x6 : ALT6_SRC_BOOT_CFG16

Select mux mode: ALT6 mux port: BOOT_CFG16 of instance: SRC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad LCD_DATA16

End of enumeration elements list.

SW_MUX_CTL_PAD_LCD_DATA17

SW_MUX_CTL_PAD_LCD_DATA17 SW MUX Control Register
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_LCD_DATA17

Select mux mode: ALT0 mux port: DATA17 of instance: LCD

0x1 : ALT1_FLEXTIMER1_CH5

Select mux mode: ALT1 mux port: CH5 of instance: FLEXTIMER1

0x3 : ALT3_CSI_DATA0

Select mux mode: ALT3 mux port: DATA0 of instance: CSI

0x4 : ALT4_EIM_ACLK_FREERUN

Select mux mode: ALT4 mux port: ACLK_FREERUN of instance: EIM

0x5 : ALT5_GPIO3_IO22

Select mux mode: ALT5 mux port: IO22 of instance: GPIO3

0x6 : ALT6_SRC_BOOT_CFG17

Select mux mode: ALT6 mux port: BOOT_CFG17 of instance: SRC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad LCD_DATA17

End of enumeration elements list.

SW_MUX_CTL_PAD_LCD_DATA18

SW_MUX_CTL_PAD_LCD_DATA18 SW MUX Control Register
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_LCD_DATA18

Select mux mode: ALT0 mux port: DATA18 of instance: LCD

0x1 : ALT1_FLEXTIMER1_CH6

Select mux mode: ALT1 mux port: CH6 of instance: FLEXTIMER1

0x2 : ALT2_ARM_PLATFORM_EVENTO

Select mux mode: ALT2 mux port: EVENTO of instance: ARM_PLATFORM

0x3 : ALT3_CSI_DATA15

Select mux mode: ALT3 mux port: DATA15 of instance: CSI

0x4 : ALT4_EIM_CS2_B

Select mux mode: ALT4 mux port: CS2_B of instance: EIM

0x5 : ALT5_GPIO3_IO23

Select mux mode: ALT5 mux port: IO23 of instance: GPIO3

0x6 : ALT6_SRC_BOOT_CFG18

Select mux mode: ALT6 mux port: BOOT_CFG18 of instance: SRC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad LCD_DATA18

End of enumeration elements list.

SW_MUX_CTL_PAD_LCD_DATA19

SW_MUX_CTL_PAD_LCD_DATA19 SW MUX Control Register
address_offset : 0x114 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_LCD_DATA19

Select mux mode: ALT0 mux port: DATA19 of instance: LCD

0x1 : ALT1_FLEXTIMER1_CH7

Select mux mode: ALT1 mux port: CH7 of instance: FLEXTIMER1

0x3 : ALT3_CSI_DATA14

Select mux mode: ALT3 mux port: DATA14 of instance: CSI

0x4 : ALT4_EIM_CS3_B

Select mux mode: ALT4 mux port: CS3_B of instance: EIM

0x5 : ALT5_GPIO3_IO24

Select mux mode: ALT5 mux port: IO24 of instance: GPIO3

0x6 : ALT6_SRC_BOOT_CFG19

Select mux mode: ALT6 mux port: BOOT_CFG19 of instance: SRC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad LCD_DATA19

End of enumeration elements list.

SW_MUX_CTL_PAD_LCD_DATA20

SW_MUX_CTL_PAD_LCD_DATA20 SW MUX Control Register
address_offset : 0x118 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_LCD_DATA20

Select mux mode: ALT0 mux port: DATA20 of instance: LCD

0x1 : ALT1_FLEXTIMER2_CH4

Select mux mode: ALT1 mux port: CH4 of instance: FLEXTIMER2

0x2 : ALT2_ENET1_1588_EVENT2_OUT

Select mux mode: ALT2 mux port: 1588_EVENT2_OUT of instance: ENET1

0x3 : ALT3_CSI_DATA13

Select mux mode: ALT3 mux port: DATA13 of instance: CSI

0x4 : ALT4_EIM_ADDR23

Select mux mode: ALT4 mux port: ADDR23 of instance: EIM

0x5 : ALT5_GPIO3_IO25

Select mux mode: ALT5 mux port: IO25 of instance: GPIO3

0x6 : ALT6_I2C3_SCL

Select mux mode: ALT6 mux port: SCL of instance: I2C3

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad LCD_DATA20

End of enumeration elements list.

SW_MUX_CTL_PAD_LCD_DATA21

SW_MUX_CTL_PAD_LCD_DATA21 SW MUX Control Register
address_offset : 0x11C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_LCD_DATA21

Select mux mode: ALT0 mux port: DATA21 of instance: LCD

0x1 : ALT1_FLEXTIMER2_CH5

Select mux mode: ALT1 mux port: CH5 of instance: FLEXTIMER2

0x2 : ALT2_ENET1_1588_EVENT3_OUT

Select mux mode: ALT2 mux port: 1588_EVENT3_OUT of instance: ENET1

0x3 : ALT3_CSI_DATA12

Select mux mode: ALT3 mux port: DATA12 of instance: CSI

0x4 : ALT4_EIM_ADDR24

Select mux mode: ALT4 mux port: ADDR24 of instance: EIM

0x5 : ALT5_GPIO3_IO26

Select mux mode: ALT5 mux port: IO26 of instance: GPIO3

0x6 : ALT6_I2C3_SDA

Select mux mode: ALT6 mux port: SDA of instance: I2C3

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad LCD_DATA21

End of enumeration elements list.

SW_MUX_CTL_PAD_LCD_DATA22

SW_MUX_CTL_PAD_LCD_DATA22 SW MUX Control Register
address_offset : 0x120 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_LCD_DATA22

Select mux mode: ALT0 mux port: DATA22 of instance: LCD

0x1 : ALT1_FLEXTIMER2_CH6

Select mux mode: ALT1 mux port: CH6 of instance: FLEXTIMER2

0x2 : ALT2_ENET2_1588_EVENT2_OUT

Select mux mode: ALT2 mux port: 1588_EVENT2_OUT of instance: ENET2

0x3 : ALT3_CSI_DATA11

Select mux mode: ALT3 mux port: DATA11 of instance: CSI

0x4 : ALT4_EIM_ADDR25

Select mux mode: ALT4 mux port: ADDR25 of instance: EIM

0x5 : ALT5_GPIO3_IO27

Select mux mode: ALT5 mux port: IO27 of instance: GPIO3

0x6 : ALT6_I2C4_SCL

Select mux mode: ALT6 mux port: SCL of instance: I2C4

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad LCD_DATA22

End of enumeration elements list.

SW_MUX_CTL_PAD_LCD_DATA23

SW_MUX_CTL_PAD_LCD_DATA23 SW MUX Control Register
address_offset : 0x124 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_LCD_DATA23

Select mux mode: ALT0 mux port: DATA23 of instance: LCD

0x1 : ALT1_FLEXTIMER2_CH7

Select mux mode: ALT1 mux port: CH7 of instance: FLEXTIMER2

0x2 : ALT2_ENET2_1588_EVENT3_OUT

Select mux mode: ALT2 mux port: 1588_EVENT3_OUT of instance: ENET2

0x3 : ALT3_CSI_DATA10

Select mux mode: ALT3 mux port: DATA10 of instance: CSI

0x4 : ALT4_EIM_ADDR26

Select mux mode: ALT4 mux port: ADDR26 of instance: EIM

0x5 : ALT5_GPIO3_IO28

Select mux mode: ALT5 mux port: IO28 of instance: GPIO3

0x6 : ALT6_I2C4_SDA

Select mux mode: ALT6 mux port: SDA of instance: I2C4

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad LCD_DATA23

End of enumeration elements list.

SW_MUX_CTL_PAD_UART1_RX_DATA

SW_MUX_CTL_PAD_UART1_RX_DATA SW MUX Control Register
address_offset : 0x128 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_UART1_RX_DATA

Select mux mode: ALT0 mux port: RX_DATA of instance: UART1

0x1 : ALT1_I2C1_SCL

Select mux mode: ALT1 mux port: SCL of instance: I2C1

0x2 : ALT2_CCM_PMIC_READY

Select mux mode: ALT2 mux port: CCM_PMIC_READY of instance: CCM

0x3 : ALT3_ECSPI1_SS1

Select mux mode: ALT3 mux port: SS1 of instance: ECSPI1

0x4 : ALT4_ENET2_1588_EVENT0_IN

Select mux mode: ALT4 mux port: 1588_EVENT0_IN of instance: ENET2

0x5 : ALT5_GPIO4_IO0

Select mux mode: ALT5 mux port: IO0 of instance: GPIO4

0x6 : ALT6_ENET1_MDIO

Select mux mode: ALT6 mux port: MDIO of instance: ENET1

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad UART1_RX_DATA

End of enumeration elements list.

SW_MUX_CTL_PAD_UART1_TX_DATA

SW_MUX_CTL_PAD_UART1_TX_DATA SW MUX Control Register
address_offset : 0x12C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_UART1_TX_DATA

Select mux mode: ALT0 mux port: TX_DATA of instance: UART1

0x1 : ALT1_I2C1_SDA

Select mux mode: ALT1 mux port: SDA of instance: I2C1

0x2 : ALT2_SAI3_MCLK

Select mux mode: ALT2 mux port: MCLK of instance: SAI3

0x3 : ALT3_ECSPI1_SS2

Select mux mode: ALT3 mux port: SS2 of instance: ECSPI1

0x4 : ALT4_ENET2_1588_EVENT0_OUT

Select mux mode: ALT4 mux port: 1588_EVENT0_OUT of instance: ENET2

0x5 : ALT5_GPIO4_IO1

Select mux mode: ALT5 mux port: IO1 of instance: GPIO4

0x6 : ALT6_ENET1_MDC

Select mux mode: ALT6 mux port: MDC of instance: ENET1

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad UART1_TX_DATA

End of enumeration elements list.

SW_MUX_CTL_PAD_UART2_RX_DATA

SW_MUX_CTL_PAD_UART2_RX_DATA SW MUX Control Register
address_offset : 0x130 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_UART2_RX_DATA

Select mux mode: ALT0 mux port: RX_DATA of instance: UART2

0x1 : ALT1_I2C2_SCL

Select mux mode: ALT1 mux port: SCL of instance: I2C2

0x2 : ALT2_SAI3_RX_BCLK

Select mux mode: ALT2 mux port: RX_BCLK of instance: SAI3

0x3 : ALT3_ECSPI1_SS3

Select mux mode: ALT3 mux port: SS3 of instance: ECSPI1

0x4 : ALT4_ENET2_1588_EVENT1_IN

Select mux mode: ALT4 mux port: 1588_EVENT1_IN of instance: ENET2

0x5 : ALT5_GPIO4_IO2

Select mux mode: ALT5 mux port: IO2 of instance: GPIO4

0x6 : ALT6_ENET2_MDIO

Select mux mode: ALT6 mux port: MDIO of instance: ENET2

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad UART2_RX_DATA

End of enumeration elements list.

SW_MUX_CTL_PAD_UART2_TX_DATA

SW_MUX_CTL_PAD_UART2_TX_DATA SW MUX Control Register
address_offset : 0x134 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_UART2_TX_DATA

Select mux mode: ALT0 mux port: TX_DATA of instance: UART2

0x1 : ALT1_I2C2_SDA

Select mux mode: ALT1 mux port: SDA of instance: I2C2

0x2 : ALT2_SAI3_RX_DATA0

Select mux mode: ALT2 mux port: RX_DATA0 of instance: SAI3

0x3 : ALT3_ECSPI1_RDY

Select mux mode: ALT3 mux port: RDY of instance: ECSPI1

0x4 : ALT4_ENET2_1588_EVENT1_OUT

Select mux mode: ALT4 mux port: 1588_EVENT1_OUT of instance: ENET2

0x5 : ALT5_GPIO4_IO3

Select mux mode: ALT5 mux port: IO3 of instance: GPIO4

0x6 : ALT6_ENET2_MDC

Select mux mode: ALT6 mux port: MDC of instance: ENET2

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad UART2_TX_DATA

End of enumeration elements list.

SW_MUX_CTL_PAD_UART3_RX_DATA

SW_MUX_CTL_PAD_UART3_RX_DATA SW MUX Control Register
address_offset : 0x138 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_UART3_RX_DATA

Select mux mode: ALT0 mux port: RX_DATA of instance: UART3

0x1 : ALT1_USB_OTG1_OC

Select mux mode: ALT1 mux port: OTG1_OC of instance: USB

0x2 : ALT2_SAI3_RX_SYNC

Select mux mode: ALT2 mux port: RX_SYNC of instance: SAI3

0x3 : ALT3_ECSPI1_MISO

Select mux mode: ALT3 mux port: MISO of instance: ECSPI1

0x4 : ALT4_ENET1_1588_EVENT0_IN

Select mux mode: ALT4 mux port: 1588_EVENT0_IN of instance: ENET1

0x5 : ALT5_GPIO4_IO4

Select mux mode: ALT5 mux port: IO4 of instance: GPIO4

0x6 : ALT6_SD1_LCTL

Select mux mode: ALT6 mux port: LCTL of instance: SD1

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad UART3_RX_DATA

End of enumeration elements list.

SW_MUX_CTL_PAD_UART3_TX_DATA

SW_MUX_CTL_PAD_UART3_TX_DATA SW MUX Control Register
address_offset : 0x13C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_UART3_TX_DATA

Select mux mode: ALT0 mux port: TX_DATA of instance: UART3

0x1 : ALT1_USB_OTG1_PWR

Select mux mode: ALT1 mux port: OTG1_PWR of instance: USB

0x2 : ALT2_SAI3_TX_BCLK

Select mux mode: ALT2 mux port: TX_BCLK of instance: SAI3

0x3 : ALT3_ECSPI1_MOSI

Select mux mode: ALT3 mux port: MOSI of instance: ECSPI1

0x4 : ALT4_ENET1_1588_EVENT0_OUT

Select mux mode: ALT4 mux port: 1588_EVENT0_OUT of instance: ENET1

0x5 : ALT5_GPIO4_IO5

Select mux mode: ALT5 mux port: IO5 of instance: GPIO4

0x6 : ALT6_SD2_LCTL

Select mux mode: ALT6 mux port: LCTL of instance: SD2

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad UART3_TX_DATA

End of enumeration elements list.

SW_MUX_CTL_PAD_GPIO1_IO08

SW_MUX_CTL_PAD_GPIO1_IO08 SW MUX Control Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_GPIO1_IO8

Select mux mode: ALT0 mux port: IO8 of instance: GPIO1

0x1 : ALT1_SD1_VSELECT

Select mux mode: ALT1 mux port: VSELECT of instance: SD1

0x2 : ALT2_WDOG1_WDOG_B

Select mux mode: ALT2 mux port: WDOG_B of instance: WDOG1

0x3 : ALT3_UART3_RX_DATA

Select mux mode: ALT3 mux port: RX_DATA of instance: UART3

0x4 : ALT4_I2C3_SCL

Select mux mode: ALT4 mux port: SCL of instance: I2C3

0x6 : ALT6_KPP_COL5

Select mux mode: ALT6 mux port: COL5 of instance: KPP

0x7 : ALT7_PWM1_OUT

Select mux mode: ALT7 mux port: OUT of instance: PWM1

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad GPIO1_IO08

End of enumeration elements list.

SW_MUX_CTL_PAD_UART3_RTS_B

SW_MUX_CTL_PAD_UART3_RTS_B SW MUX Control Register
address_offset : 0x140 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_UART3_RTS_B

Select mux mode: ALT0 mux port: RTS_B of instance: UART3

0x1 : ALT1_USB_OTG2_OC

Select mux mode: ALT1 mux port: OTG2_OC of instance: USB

0x2 : ALT2_SAI3_TX_DATA0

Select mux mode: ALT2 mux port: TX_DATA0 of instance: SAI3

0x3 : ALT3_ECSPI1_SCLK

Select mux mode: ALT3 mux port: SCLK of instance: ECSPI1

0x4 : ALT4_ENET1_1588_EVENT1_IN

Select mux mode: ALT4 mux port: 1588_EVENT1_IN of instance: ENET1

0x5 : ALT5_GPIO4_IO6

Select mux mode: ALT5 mux port: IO6 of instance: GPIO4

0x6 : ALT6_SD3_LCTL

Select mux mode: ALT6 mux port: LCTL of instance: SD3

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad UART3_RTS_B

End of enumeration elements list.

SW_MUX_CTL_PAD_UART3_CTS_B

SW_MUX_CTL_PAD_UART3_CTS_B SW MUX Control Register
address_offset : 0x144 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_UART3_CTS_B

Select mux mode: ALT0 mux port: CTS_B of instance: UART3

0x1 : ALT1_USB_OTG2_PWR

Select mux mode: ALT1 mux port: OTG2_PWR of instance: USB

0x2 : ALT2_SAI3_TX_SYNC

Select mux mode: ALT2 mux port: TX_SYNC of instance: SAI3

0x3 : ALT3_ECSPI1_SS0

Select mux mode: ALT3 mux port: SS0 of instance: ECSPI1

0x4 : ALT4_ENET1_1588_EVENT1_OUT

Select mux mode: ALT4 mux port: 1588_EVENT1_OUT of instance: ENET1

0x5 : ALT5_GPIO4_IO7

Select mux mode: ALT5 mux port: IO7 of instance: GPIO4

0x6 : ALT6_SD1_VSELECT

Select mux mode: ALT6 mux port: VSELECT of instance: SD1

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad UART3_CTS_B

End of enumeration elements list.

SW_MUX_CTL_PAD_I2C1_SCL

SW_MUX_CTL_PAD_I2C1_SCL SW MUX Control Register
address_offset : 0x148 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_I2C1_SCL

Select mux mode: ALT0 mux port: SCL of instance: I2C1

0x1 : ALT1_UART4_CTS_B

Select mux mode: ALT1 mux port: CTS_B of instance: UART4

0x2 : ALT2_FLEXCAN1_RX

Select mux mode: ALT2 mux port: RX of instance: FLEXCAN1

0x3 : ALT3_ECSPI3_MISO

Select mux mode: ALT3 mux port: MISO of instance: ECSPI3

0x5 : ALT5_GPIO4_IO8

Select mux mode: ALT5 mux port: IO8 of instance: GPIO4

0x6 : ALT6_SD2_VSELECT

Select mux mode: ALT6 mux port: VSELECT of instance: SD2

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad I2C1_SCL

End of enumeration elements list.

SW_MUX_CTL_PAD_I2C1_SDA

SW_MUX_CTL_PAD_I2C1_SDA SW MUX Control Register
address_offset : 0x14C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_I2C1_SDA

Select mux mode: ALT0 mux port: SDA of instance: I2C1

0x1 : ALT1_UART4_RTS_B

Select mux mode: ALT1 mux port: RTS_B of instance: UART4

0x2 : ALT2_FLEXCAN1_TX

Select mux mode: ALT2 mux port: TX of instance: FLEXCAN1

0x3 : ALT3_ECSPI3_MOSI

Select mux mode: ALT3 mux port: MOSI of instance: ECSPI3

0x4 : ALT4_CCM_ENET1_REF_CLK

Select mux mode: ALT4 mux port: ENET1_REF_CLK of instance: ENET1

0x5 : ALT5_GPIO4_IO9

Select mux mode: ALT5 mux port: IO9 of instance: GPIO4

0x6 : ALT6_SD3_VSELECT

Select mux mode: ALT6 mux port: VSELECT of instance: SD3

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad I2C1_SDA

End of enumeration elements list.

SW_MUX_CTL_PAD_I2C2_SCL

SW_MUX_CTL_PAD_I2C2_SCL SW MUX Control Register
address_offset : 0x150 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_I2C2_SCL

Select mux mode: ALT0 mux port: SCL of instance: I2C2

0x1 : ALT1_UART4_RX_DATA

Select mux mode: ALT1 mux port: RX_DATA of instance: UART4

0x2 : ALT2_WDOG3_WDOG_B

Select mux mode: ALT2 mux port: WDOG_B of instance: WDOG3

0x3 : ALT3_ECSPI3_SCLK

Select mux mode: ALT3 mux port: SCLK of instance: ECSPI3

0x4 : ALT4_CCM_ENET2_REF_CLK

Select mux mode: ALT4 mux port: ENET2_REF_CLK of instance: ENET2

0x5 : ALT5_GPIO4_IO10

Select mux mode: ALT5 mux port: IO10 of instance: GPIO4

0x6 : ALT6_SD3_CD_B

Select mux mode: ALT6 mux port: CD_B of instance: SD3

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad I2C2_SCL

End of enumeration elements list.

SW_MUX_CTL_PAD_I2C2_SDA

SW_MUX_CTL_PAD_I2C2_SDA SW MUX Control Register
address_offset : 0x154 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_I2C2_SDA

Select mux mode: ALT0 mux port: SDA of instance: I2C2

0x1 : ALT1_UART4_TX_DATA

Select mux mode: ALT1 mux port: TX_DATA of instance: UART4

0x2 : ALT2_WDOG3_WDOG_RST_B_DEB

Select mux mode: ALT2 mux port: WDOG_RST_B_DEB of instance: WDOG3

0x3 : ALT3_ECSPI3_SS0

Select mux mode: ALT3 mux port: SS0 of instance: ECSPI3

0x4 : ALT4_CCM_ENET_PHY_REF_CLK

Select mux mode: ALT4 mux port: ENET_PHY_REF_CLK of instance: CCM

0x5 : ALT5_GPIO4_IO11

Select mux mode: ALT5 mux port: IO11 of instance: GPIO4

0x6 : ALT6_SD3_WP

Select mux mode: ALT6 mux port: WP of instance: SD3

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad I2C2_SDA

End of enumeration elements list.

SW_MUX_CTL_PAD_I2C3_SCL

SW_MUX_CTL_PAD_I2C3_SCL SW MUX Control Register
address_offset : 0x158 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_I2C3_SCL

Select mux mode: ALT0 mux port: SCL of instance: I2C3

0x1 : ALT1_UART5_CTS_B

Select mux mode: ALT1 mux port: CTS_B of instance: UART5

0x2 : ALT2_FLEXCAN2_RX

Select mux mode: ALT2 mux port: RX of instance: FLEXCAN2

0x3 : ALT3_CSI_VSYNC

Select mux mode: ALT3 mux port: VSYNC of instance: CSI

0x4 : ALT4_SDMA_EXT_EVENT0

Select mux mode: ALT4 mux port: EXT_EVENT0 of instance: SDMA

0x5 : ALT5_GPIO4_IO12

Select mux mode: ALT5 mux port: IO12 of instance: GPIO4

0x6 : ALT6_EPDC_BDR0

Select mux mode: ALT6 mux port: BDR0 of instance: EPDC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad I2C3_SCL

End of enumeration elements list.

SW_MUX_CTL_PAD_I2C3_SDA

SW_MUX_CTL_PAD_I2C3_SDA SW MUX Control Register
address_offset : 0x15C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_I2C3_SDA

Select mux mode: ALT0 mux port: SDA of instance: I2C3

0x1 : ALT1_UART5_RTS_B

Select mux mode: ALT1 mux port: RTS_B of instance: UART5

0x2 : ALT2_FLEXCAN2_TX

Select mux mode: ALT2 mux port: TX of instance: FLEXCAN2

0x3 : ALT3_CSI_HSYNC

Select mux mode: ALT3 mux port: HSYNC of instance: CSI

0x4 : ALT4_SDMA_EXT_EVENT1

Select mux mode: ALT4 mux port: EXT_EVENT1 of instance: SDMA

0x5 : ALT5_GPIO4_IO13

Select mux mode: ALT5 mux port: IO13 of instance: GPIO4

0x6 : ALT6_EPDC_BDR1

Select mux mode: ALT6 mux port: BDR1 of instance: EPDC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad I2C3_SDA

End of enumeration elements list.

SW_MUX_CTL_PAD_I2C4_SCL

SW_MUX_CTL_PAD_I2C4_SCL SW MUX Control Register
address_offset : 0x160 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_I2C4_SCL

Select mux mode: ALT0 mux port: SCL of instance: I2C4

0x1 : ALT1_UART5_RX_DATA

Select mux mode: ALT1 mux port: RX_DATA of instance: UART5

0x2 : ALT2_WDOG4_WDOG_B

Select mux mode: ALT2 mux port: WDOG_B of instance: WDOG4

0x3 : ALT3_CSI_PIXCLK

Select mux mode: ALT3 mux port: PIXCLK of instance: CSI

0x4 : ALT4_USB_OTG1_ID

Select mux mode: ALT4 mux port: OTG1_ID of instance: USB

0x5 : ALT5_GPIO4_IO14

Select mux mode: ALT5 mux port: IO14 of instance: GPIO4

0x6 : ALT6_EPDC_VCOM0

Select mux mode: ALT6 mux port: VCOM0 of instance: EPDC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad I2C4_SCL

End of enumeration elements list.

SW_MUX_CTL_PAD_I2C4_SDA

SW_MUX_CTL_PAD_I2C4_SDA SW MUX Control Register
address_offset : 0x164 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_I2C4_SDA

Select mux mode: ALT0 mux port: SDA of instance: I2C4

0x1 : ALT1_UART5_TX_DATA

Select mux mode: ALT1 mux port: TX_DATA of instance: UART5

0x2 : ALT2_WDOG4_WDOG_RST_B_DEB

Select mux mode: ALT2 mux port: WDOG_RST_B_DEB of instance: WDOG4

0x3 : ALT3_CSI_MCLK

Select mux mode: ALT3 mux port: MCLK of instance: CSI

0x4 : ALT4_USB_OTG2_ID

Select mux mode: ALT4 mux port: OTG2_ID of instance: USB

0x5 : ALT5_GPIO4_IO15

Select mux mode: ALT5 mux port: IO15 of instance: GPIO4

0x6 : ALT6_EPDC_VCOM1

Select mux mode: ALT6 mux port: VCOM1 of instance: EPDC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad I2C4_SDA

End of enumeration elements list.

SW_MUX_CTL_PAD_ECSPI1_SCLK

SW_MUX_CTL_PAD_ECSPI1_SCLK SW MUX Control Register
address_offset : 0x168 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_ECSPI1_SCLK

Select mux mode: ALT0 mux port: SCLK of instance: ECSPI1

0x1 : ALT1_UART6_RX_DATA

Select mux mode: ALT1 mux port: RX_DATA of instance: UART6

0x2 : ALT2_SD2_DATA4

Select mux mode: ALT2 mux port: DATA4 of instance: SD2

0x3 : ALT3_CSI_DATA2

Select mux mode: ALT3 mux port: DATA2 of instance: CSI

0x5 : ALT5_GPIO4_IO16

Select mux mode: ALT5 mux port: IO16 of instance: GPIO4

0x6 : ALT6_EPDC_PWR_COM

Select mux mode: ALT6 mux port: PWR_COM of instance: EPDC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad ECSPI1_SCLK

End of enumeration elements list.

SW_MUX_CTL_PAD_ECSPI1_MOSI

SW_MUX_CTL_PAD_ECSPI1_MOSI SW MUX Control Register
address_offset : 0x16C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_ECSPI1_MOSI

Select mux mode: ALT0 mux port: MOSI of instance: ECSPI1

0x1 : ALT1_UART6_TX_DATA

Select mux mode: ALT1 mux port: TX_DATA of instance: UART6

0x2 : ALT2_SD2_DATA5

Select mux mode: ALT2 mux port: DATA5 of instance: SD2

0x3 : ALT3_CSI_DATA3

Select mux mode: ALT3 mux port: DATA3 of instance: CSI

0x5 : ALT5_GPIO4_IO17

Select mux mode: ALT5 mux port: IO17 of instance: GPIO4

0x6 : ALT6_EPDC_PWR_STAT

Select mux mode: ALT6 mux port: PWR_STAT of instance: EPDC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad ECSPI1_MOSI

End of enumeration elements list.

SW_MUX_CTL_PAD_ECSPI1_MISO

SW_MUX_CTL_PAD_ECSPI1_MISO SW MUX Control Register
address_offset : 0x170 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_ECSPI1_MISO

Select mux mode: ALT0 mux port: MISO of instance: ECSPI1

0x1 : ALT1_UART6_RTS_B

Select mux mode: ALT1 mux port: RTS_B of instance: UART6

0x2 : ALT2_SD2_DATA6

Select mux mode: ALT2 mux port: DATA6 of instance: SD2

0x3 : ALT3_CSI_DATA4

Select mux mode: ALT3 mux port: DATA4 of instance: CSI

0x5 : ALT5_GPIO4_IO18

Select mux mode: ALT5 mux port: IO18 of instance: GPIO4

0x6 : ALT6_EPDC_PWR_IRQ

Select mux mode: ALT6 mux port: PWR_IRQ of instance: EPDC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad ECSPI1_MISO

End of enumeration elements list.

SW_MUX_CTL_PAD_ECSPI1_SS0

SW_MUX_CTL_PAD_ECSPI1_SS0 SW MUX Control Register
address_offset : 0x174 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_ECSPI1_SS0

Select mux mode: ALT0 mux port: SS0 of instance: ECSPI1

0x1 : ALT1_UART6_CTS_B

Select mux mode: ALT1 mux port: CTS_B of instance: UART6

0x2 : ALT2_SD2_DATA7

Select mux mode: ALT2 mux port: DATA7 of instance: SD2

0x3 : ALT3_CSI_DATA5

Select mux mode: ALT3 mux port: DATA5 of instance: CSI

0x5 : ALT5_GPIO4_IO19

Select mux mode: ALT5 mux port: IO19 of instance: GPIO4

0x6 : ALT6_EPDC_PWR_CTRL3

Select mux mode: ALT6 mux port: PWR_CTRL3 of instance: EPDC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad ECSPI1_SS0

End of enumeration elements list.

SW_MUX_CTL_PAD_ECSPI2_SCLK

SW_MUX_CTL_PAD_ECSPI2_SCLK SW MUX Control Register
address_offset : 0x178 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_ECSPI2_SCLK

Select mux mode: ALT0 mux port: SCLK of instance: ECSPI2

0x1 : ALT1_UART7_RX_DATA

Select mux mode: ALT1 mux port: RX_DATA of instance: UART7

0x2 : ALT2_SD1_DATA4

Select mux mode: ALT2 mux port: DATA4 of instance: SD1

0x3 : ALT3_CSI_DATA6

Select mux mode: ALT3 mux port: DATA6 of instance: CSI

0x4 : ALT4_LCD_DATA13

Select mux mode: ALT4 mux port: DATA13 of instance: LCD

0x5 : ALT5_GPIO4_IO20

Select mux mode: ALT5 mux port: IO20 of instance: GPIO4

0x6 : ALT6_EPDC_PWR_CTRL0

Select mux mode: ALT6 mux port: PWR_CTRL0 of instance: EPDC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad ECSPI2_SCLK

End of enumeration elements list.

SW_MUX_CTL_PAD_ECSPI2_MOSI

SW_MUX_CTL_PAD_ECSPI2_MOSI SW MUX Control Register
address_offset : 0x17C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_ECSPI2_MOSI

Select mux mode: ALT0 mux port: MOSI of instance: ECSPI2

0x1 : ALT1_UART7_TX_DATA

Select mux mode: ALT1 mux port: TX_DATA of instance: UART7

0x2 : ALT2_SD1_DATA5

Select mux mode: ALT2 mux port: DATA5 of instance: SD1

0x3 : ALT3_CSI_DATA7

Select mux mode: ALT3 mux port: DATA7 of instance: CSI

0x4 : ALT4_LCD_DATA14

Select mux mode: ALT4 mux port: DATA14 of instance: LCD

0x5 : ALT5_GPIO4_IO21

Select mux mode: ALT5 mux port: IO21 of instance: GPIO4

0x6 : ALT6_EPDC_PWR_CTRL1

Select mux mode: ALT6 mux port: PWR_CTRL1 of instance: EPDC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad ECSPI2_MOSI

End of enumeration elements list.

SW_MUX_CTL_PAD_GPIO1_IO09

SW_MUX_CTL_PAD_GPIO1_IO09 SW MUX Control Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_GPIO1_IO9

Select mux mode: ALT0 mux port: IO9 of instance: GPIO1

0x1 : ALT1_SD1_LCTL

Select mux mode: ALT1 mux port: LCTL of instance: SD1

0x2 : ALT2_CCM_ENET_PHY_REF_CLK

Select mux mode: ALT2 mux port: ENET_PHY_REF_CLK of instance: CCM

0x3 : ALT3_UART3_TX_DATA

Select mux mode: ALT3 mux port: TX_DATA of instance: UART3

0x4 : ALT4_I2C3_SDA

Select mux mode: ALT4 mux port: SDA of instance: I2C3

0x5 : ALT5_CCM_PMIC_READY

Select mux mode: ALT5 mux port: CCM_PMIC_READY of instance: CCM

0x6 : ALT6_KPP_ROW5

Select mux mode: ALT6 mux port: ROW5 of instance: KPP

0x7 : ALT7_PWM2_OUT

Select mux mode: ALT7 mux port: OUT of instance: PWM2

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad GPIO1_IO09

End of enumeration elements list.

SW_MUX_CTL_PAD_ECSPI2_MISO

SW_MUX_CTL_PAD_ECSPI2_MISO SW MUX Control Register
address_offset : 0x180 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_ECSPI2_MISO

Select mux mode: ALT0 mux port: MISO of instance: ECSPI2

0x1 : ALT1_UART7_RTS_B

Select mux mode: ALT1 mux port: RTS_B of instance: UART7

0x2 : ALT2_SD1_DATA6

Select mux mode: ALT2 mux port: DATA6 of instance: SD1

0x3 : ALT3_CSI_DATA8

Select mux mode: ALT3 mux port: DATA8 of instance: CSI

0x4 : ALT4_LCD_DATA15

Select mux mode: ALT4 mux port: DATA15 of instance: LCD

0x5 : ALT5_GPIO4_IO22

Select mux mode: ALT5 mux port: IO22 of instance: GPIO4

0x6 : ALT6_EPDC_PWR_CTRL2

Select mux mode: ALT6 mux port: PWR_CTRL2 of instance: EPDC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad ECSPI2_MISO

End of enumeration elements list.

SW_MUX_CTL_PAD_ECSPI2_SS0

SW_MUX_CTL_PAD_ECSPI2_SS0 SW MUX Control Register
address_offset : 0x184 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_ECSPI2_SS0

Select mux mode: ALT0 mux port: SS0 of instance: ECSPI2

0x1 : ALT1_UART7_CTS_B

Select mux mode: ALT1 mux port: CTS_B of instance: UART7

0x2 : ALT2_SD1_DATA7

Select mux mode: ALT2 mux port: DATA7 of instance: SD1

0x3 : ALT3_CSI_DATA9

Select mux mode: ALT3 mux port: DATA9 of instance: CSI

0x4 : ALT4_LCD_RESET

Select mux mode: ALT4 mux port: RESET of instance: LCD

0x5 : ALT5_GPIO4_IO23

Select mux mode: ALT5 mux port: IO23 of instance: GPIO4

0x6 : ALT6_EPDC_PWR_WAKE

Select mux mode: ALT6 mux port: PWR_WAKE of instance: EPDC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad ECSPI2_SS0

End of enumeration elements list.

SW_MUX_CTL_PAD_SD1_CD_B

SW_MUX_CTL_PAD_SD1_CD_B SW MUX Control Register
address_offset : 0x188 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SD1_CD_B

Select mux mode: ALT0 mux port: CD_B of instance: SD1

0x2 : ALT2_UART6_RX_DATA

Select mux mode: ALT2 mux port: RX_DATA of instance: UART6

0x3 : ALT3_ECSPI4_MISO

Select mux mode: ALT3 mux port: MISO of instance: ECSPI4

0x4 : ALT4_FLEXTIMER1_CH0

Select mux mode: ALT4 mux port: CH0 of instance: FLEXTIMER1

0x5 : ALT5_GPIO5_IO0

Select mux mode: ALT5 mux port: IO0 of instance: GPIO5

0x6 : ALT6_CCM_CLKO1

Select mux mode: ALT6 mux port: CLKO1 of instance: CCM

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SD1_CD_B

End of enumeration elements list.

SW_MUX_CTL_PAD_SD1_WP

SW_MUX_CTL_PAD_SD1_WP SW MUX Control Register
address_offset : 0x18C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SD1_WP

Select mux mode: ALT0 mux port: WP of instance: SD1

0x2 : ALT2_UART6_TX_DATA

Select mux mode: ALT2 mux port: TX_DATA of instance: UART6

0x3 : ALT3_ECSPI4_MOSI

Select mux mode: ALT3 mux port: MOSI of instance: ECSPI4

0x4 : ALT4_FLEXTIMER1_CH1

Select mux mode: ALT4 mux port: CH1 of instance: FLEXTIMER1

0x5 : ALT5_GPIO5_IO1

Select mux mode: ALT5 mux port: IO1 of instance: GPIO5

0x6 : ALT6_CCM_CLKO2

Select mux mode: ALT6 mux port: CLKO2 of instance: CCM

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SD1_WP

End of enumeration elements list.

SW_MUX_CTL_PAD_SD1_RESET_B

SW_MUX_CTL_PAD_SD1_RESET_B SW MUX Control Register
address_offset : 0x190 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SD1_RESET_B

Select mux mode: ALT0 mux port: RESET_B of instance: SD1

0x1 : ALT1_SAI3_MCLK

Select mux mode: ALT1 mux port: MCLK of instance: SAI3

0x2 : ALT2_UART6_RTS_B

Select mux mode: ALT2 mux port: RTS_B of instance: UART6

0x3 : ALT3_ECSPI4_SCLK

Select mux mode: ALT3 mux port: SCLK of instance: ECSPI4

0x4 : ALT4_FLEXTIMER1_CH2

Select mux mode: ALT4 mux port: CH2 of instance: FLEXTIMER1

0x5 : ALT5_GPIO5_IO2

Select mux mode: ALT5 mux port: IO2 of instance: GPIO5

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SD1_RESET_B

End of enumeration elements list.

SW_MUX_CTL_PAD_SD1_CLK

SW_MUX_CTL_PAD_SD1_CLK SW MUX Control Register
address_offset : 0x194 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SD1_CLK

Select mux mode: ALT0 mux port: CLK of instance: SD1

0x1 : ALT1_SAI3_RX_SYNC

Select mux mode: ALT1 mux port: RX_SYNC of instance: SAI3

0x2 : ALT2_UART6_CTS_B

Select mux mode: ALT2 mux port: CTS_B of instance: UART6

0x3 : ALT3_ECSPI4_SS0

Select mux mode: ALT3 mux port: SS0 of instance: ECSPI4

0x4 : ALT4_FLEXTIMER1_CH3

Select mux mode: ALT4 mux port: CH3 of instance: FLEXTIMER1

0x5 : ALT5_GPIO5_IO3

Select mux mode: ALT5 mux port: IO3 of instance: GPIO5

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SD1_CLK

End of enumeration elements list.

SW_MUX_CTL_PAD_SD1_CMD

SW_MUX_CTL_PAD_SD1_CMD SW MUX Control Register
address_offset : 0x198 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SD1_CMD

Select mux mode: ALT0 mux port: CMD of instance: SD1

0x1 : ALT1_SAI3_RX_BCLK

Select mux mode: ALT1 mux port: RX_BCLK of instance: SAI3

0x3 : ALT3_ECSPI4_SS1

Select mux mode: ALT3 mux port: SS1 of instance: ECSPI4

0x4 : ALT4_FLEXTIMER2_CH0

Select mux mode: ALT4 mux port: CH0 of instance: FLEXTIMER2

0x5 : ALT5_GPIO5_IO4

Select mux mode: ALT5 mux port: IO4 of instance: GPIO5

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SD1_CMD

End of enumeration elements list.

SW_MUX_CTL_PAD_SD1_DATA0

SW_MUX_CTL_PAD_SD1_DATA0 SW MUX Control Register
address_offset : 0x19C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SD1_DATA0

Select mux mode: ALT0 mux port: DATA0 of instance: SD1

0x1 : ALT1_SAI3_RX_DATA0

Select mux mode: ALT1 mux port: RX_DATA0 of instance: SAI3

0x2 : ALT2_UART7_RX_DATA

Select mux mode: ALT2 mux port: RX_DATA of instance: UART7

0x3 : ALT3_ECSPI4_SS2

Select mux mode: ALT3 mux port: SS2 of instance: ECSPI4

0x4 : ALT4_FLEXTIMER2_CH1

Select mux mode: ALT4 mux port: CH1 of instance: FLEXTIMER2

0x5 : ALT5_GPIO5_IO5

Select mux mode: ALT5 mux port: IO5 of instance: GPIO5

0x6 : ALT6_CCM_EXT_CLK1

Select mux mode: ALT6 mux port: EXT_CLK1 of instance: CCM

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SD1_DATA0

End of enumeration elements list.

SW_MUX_CTL_PAD_SD1_DATA1

SW_MUX_CTL_PAD_SD1_DATA1 SW MUX Control Register
address_offset : 0x1A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SD1_DATA1

Select mux mode: ALT0 mux port: DATA1 of instance: SD1

0x1 : ALT1_SAI3_TX_BCLK

Select mux mode: ALT1 mux port: TX_BCLK of instance: SAI3

0x2 : ALT2_UART7_TX_DATA

Select mux mode: ALT2 mux port: TX_DATA of instance: UART7

0x3 : ALT3_ECSPI4_SS3

Select mux mode: ALT3 mux port: SS3 of instance: ECSPI4

0x4 : ALT4_FLEXTIMER2_CH2

Select mux mode: ALT4 mux port: CH2 of instance: FLEXTIMER2

0x5 : ALT5_GPIO5_IO6

Select mux mode: ALT5 mux port: IO6 of instance: GPIO5

0x6 : ALT6_CCM_EXT_CLK2

Select mux mode: ALT6 mux port: EXT_CLK2 of instance: CCM

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SD1_DATA1

End of enumeration elements list.

SW_MUX_CTL_PAD_SD1_DATA2

SW_MUX_CTL_PAD_SD1_DATA2 SW MUX Control Register
address_offset : 0x1A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SD1_DATA2

Select mux mode: ALT0 mux port: DATA2 of instance: SD1

0x1 : ALT1_SAI3_TX_SYNC

Select mux mode: ALT1 mux port: TX_SYNC of instance: SAI3

0x2 : ALT2_UART7_CTS_B

Select mux mode: ALT2 mux port: CTS_B of instance: UART7

0x3 : ALT3_ECSPI4_RDY

Select mux mode: ALT3 mux port: RDY of instance: ECSPI4

0x4 : ALT4_FLEXTIMER2_CH3

Select mux mode: ALT4 mux port: CH3 of instance: FLEXTIMER2

0x5 : ALT5_GPIO5_IO7

Select mux mode: ALT5 mux port: IO7 of instance: GPIO5

0x6 : ALT6_CCM_EXT_CLK3

Select mux mode: ALT6 mux port: EXT_CLK3 of instance: CCM

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SD1_DATA2

End of enumeration elements list.

SW_MUX_CTL_PAD_SD1_DATA3

SW_MUX_CTL_PAD_SD1_DATA3 SW MUX Control Register
address_offset : 0x1A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SD1_DATA3

Select mux mode: ALT0 mux port: DATA3 of instance: SD1

0x1 : ALT1_SAI3_TX_DATA0

Select mux mode: ALT1 mux port: TX_DATA0 of instance: SAI3

0x2 : ALT2_UART7_RTS_B

Select mux mode: ALT2 mux port: RTS_B of instance: UART7

0x3 : ALT3_ECSPI3_SS1

Select mux mode: ALT3 mux port: SS1 of instance: ECSPI3

0x4 : ALT4_FLEXTIMER1_PHA

Select mux mode: ALT4 mux port: PHA of instance: FLEXTIMER1

0x5 : ALT5_GPIO5_IO8

Select mux mode: ALT5 mux port: IO8 of instance: GPIO5

0x6 : ALT6_CCM_EXT_CLK4

Select mux mode: ALT6 mux port: EXT_CLK4 of instance: CCM

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SD1_DATA3

End of enumeration elements list.

SW_MUX_CTL_PAD_SD2_CD_B

SW_MUX_CTL_PAD_SD2_CD_B SW MUX Control Register
address_offset : 0x1AC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SD2_CD_B

Select mux mode: ALT0 mux port: CD_B of instance: SD2

0x1 : ALT1_ENET1_MDIO

Select mux mode: ALT1 mux port: MDIO of instance: ENET1

0x2 : ALT2_ENET2_MDIO

Select mux mode: ALT2 mux port: MDIO of instance: ENET2

0x3 : ALT3_ECSPI3_SS2

Select mux mode: ALT3 mux port: SS2 of instance: ECSPI3

0x4 : ALT4_FLEXTIMER1_PHB

Select mux mode: ALT4 mux port: PHB of instance: FLEXTIMER1

0x5 : ALT5_GPIO5_IO9

Select mux mode: ALT5 mux port: IO9 of instance: GPIO5

0x6 : ALT6_SDMA_EXT_EVENT0

Select mux mode: ALT6 mux port: EXT_EVENT0 of instance: SDMA

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SD2_CD_B

End of enumeration elements list.

SW_MUX_CTL_PAD_SD2_WP

SW_MUX_CTL_PAD_SD2_WP SW MUX Control Register
address_offset : 0x1B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SD2_WP

Select mux mode: ALT0 mux port: WP of instance: SD2

0x1 : ALT1_ENET1_MDC

Select mux mode: ALT1 mux port: MDC of instance: ENET1

0x2 : ALT2_ENET2_MDC

Select mux mode: ALT2 mux port: MDC of instance: ENET2

0x3 : ALT3_ECSPI3_SS3

Select mux mode: ALT3 mux port: SS3 of instance: ECSPI3

0x4 : ALT4_USB_OTG1_ID

Select mux mode: ALT4 mux port: OTG1_ID of instance: USB

0x5 : ALT5_GPIO5_IO10

Select mux mode: ALT5 mux port: IO10 of instance: GPIO5

0x6 : ALT6_SDMA_EXT_EVENT1

Select mux mode: ALT6 mux port: EXT_EVENT1 of instance: SDMA

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SD2_WP

End of enumeration elements list.

SW_MUX_CTL_PAD_SD2_RESET_B

SW_MUX_CTL_PAD_SD2_RESET_B SW MUX Control Register
address_offset : 0x1B4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SD2_RESET_B

Select mux mode: ALT0 mux port: RESET_B of instance: SD2

0x1 : ALT1_SAI2_MCLK

Select mux mode: ALT1 mux port: MCLK of instance: SAI2

0x2 : ALT2_SD2_RESET

Select mux mode: ALT2 mux port: RESET of instance: SD2

0x3 : ALT3_ECSPI3_RDY

Select mux mode: ALT3 mux port: RDY of instance: ECSPI3

0x4 : ALT4_USB_OTG2_ID

Select mux mode: ALT4 mux port: OTG2_ID of instance: USB

0x5 : ALT5_GPIO5_IO11

Select mux mode: ALT5 mux port: IO11 of instance: GPIO5

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SD2_RESET_B

End of enumeration elements list.

SW_MUX_CTL_PAD_SD2_CLK

SW_MUX_CTL_PAD_SD2_CLK SW MUX Control Register
address_offset : 0x1B8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SD2_CLK

Select mux mode: ALT0 mux port: CLK of instance: SD2

0x1 : ALT1_SAI2_RX_SYNC

Select mux mode: ALT1 mux port: RX_SYNC of instance: SAI2

0x2 : ALT2_MQS_RIGHT

Select mux mode: ALT2 mux port: RIGHT of instance: MQS

0x3 : ALT3_GPT4_CLK

Select mux mode: ALT3 mux port: CLK of instance: GPT4

0x5 : ALT5_GPIO5_IO12

Select mux mode: ALT5 mux port: IO12 of instance: GPIO5

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SD2_CLK

End of enumeration elements list.

SW_MUX_CTL_PAD_SD2_CMD

SW_MUX_CTL_PAD_SD2_CMD SW MUX Control Register
address_offset : 0x1BC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SD2_CMD

Select mux mode: ALT0 mux port: CMD of instance: SD2

0x1 : ALT1_SAI2_RX_BCLK

Select mux mode: ALT1 mux port: RX_BCLK of instance: SAI2

0x2 : ALT2_MQS_LEFT

Select mux mode: ALT2 mux port: LEFT of instance: MQS

0x3 : ALT3_GPT4_CAPTURE1

Select mux mode: ALT3 mux port: CAPTURE1 of instance: GPT4

0x4 : ALT4_SIM2_PORT1_TRXD

Select mux mode: ALT4 mux port: PORT1_TRXD of instance: SIM2

0x5 : ALT5_GPIO5_IO13

Select mux mode: ALT5 mux port: IO13 of instance: GPIO5

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SD2_CMD

End of enumeration elements list.

SW_MUX_CTL_PAD_GPIO1_IO10

SW_MUX_CTL_PAD_GPIO1_IO10 SW MUX Control Register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_GPIO1_IO10

Select mux mode: ALT0 mux port: IO10 of instance: GPIO1

0x1 : ALT1_SD2_LCTL

Select mux mode: ALT1 mux port: LCTL of instance: SD2

0x2 : ALT2_ENET1_MDIO

Select mux mode: ALT2 mux port: MDIO of instance: ENET1

0x3 : ALT3_UART3_RTS_B

Select mux mode: ALT3 mux port: RTS_B of instance: UART3

0x4 : ALT4_I2C4_SCL

Select mux mode: ALT4 mux port: SCL of instance: I2C4

0x5 : ALT5_FLEXTIMER1_PHA

Select mux mode: ALT5 mux port: PHA of instance: FLEXTIMER1

0x6 : ALT6_KPP_COL6

Select mux mode: ALT6 mux port: COL6 of instance: KPP

0x7 : ALT7_PWM3_OUT

Select mux mode: ALT7 mux port: OUT of instance: PWM3

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad GPIO1_IO10

End of enumeration elements list.

SW_MUX_CTL_PAD_SD2_DATA0

SW_MUX_CTL_PAD_SD2_DATA0 SW MUX Control Register
address_offset : 0x1C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SD2_DATA0

Select mux mode: ALT0 mux port: DATA0 of instance: SD2

0x1 : ALT1_SAI2_RX_DATA0

Select mux mode: ALT1 mux port: RX_DATA0 of instance: SAI2

0x2 : ALT2_UART4_RX_DATA

Select mux mode: ALT2 mux port: RX_DATA of instance: UART4

0x3 : ALT3_GPT4_CAPTURE2

Select mux mode: ALT3 mux port: CAPTURE2 of instance: GPT4

0x4 : ALT4_SIM2_PORT1_CLK

Select mux mode: ALT4 mux port: PORT1_CLK of instance: SIM2

0x5 : ALT5_GPIO5_IO14

Select mux mode: ALT5 mux port: IO14 of instance: GPIO5

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SD2_DATA0

End of enumeration elements list.

SW_MUX_CTL_PAD_SD2_DATA1

SW_MUX_CTL_PAD_SD2_DATA1 SW MUX Control Register
address_offset : 0x1C4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SD2_DATA1

Select mux mode: ALT0 mux port: DATA1 of instance: SD2

0x1 : ALT1_SAI2_TX_BCLK

Select mux mode: ALT1 mux port: TX_BCLK of instance: SAI2

0x2 : ALT2_UART4_TX_DATA

Select mux mode: ALT2 mux port: TX_DATA of instance: UART4

0x3 : ALT3_GPT4_COMPARE1

Select mux mode: ALT3 mux port: COMPARE1 of instance: GPT4

0x4 : ALT4_SIM2_PORT1_RST_B

Select mux mode: ALT4 mux port: PORT1_RST_B of instance: SIM2

0x5 : ALT5_GPIO5_IO15

Select mux mode: ALT5 mux port: IO15 of instance: GPIO5

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SD2_DATA1

End of enumeration elements list.

SW_MUX_CTL_PAD_SD2_DATA2

SW_MUX_CTL_PAD_SD2_DATA2 SW MUX Control Register
address_offset : 0x1C8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SD2_DATA2

Select mux mode: ALT0 mux port: DATA2 of instance: SD2

0x1 : ALT1_SAI2_TX_SYNC

Select mux mode: ALT1 mux port: TX_SYNC of instance: SAI2

0x2 : ALT2_UART4_CTS_B

Select mux mode: ALT2 mux port: CTS_B of instance: UART4

0x3 : ALT3_GPT4_COMPARE2

Select mux mode: ALT3 mux port: COMPARE2 of instance: GPT4

0x4 : ALT4_SIM2_PORT1_SVEN

Select mux mode: ALT4 mux port: PORT1_SVEN of instance: SIM2

0x5 : ALT5_GPIO5_IO16

Select mux mode: ALT5 mux port: IO16 of instance: GPIO5

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SD2_DATA2

End of enumeration elements list.

SW_MUX_CTL_PAD_SD2_DATA3

SW_MUX_CTL_PAD_SD2_DATA3 SW MUX Control Register
address_offset : 0x1CC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SD2_DATA3

Select mux mode: ALT0 mux port: DATA3 of instance: SD2

0x1 : ALT1_SAI2_TX_DATA0

Select mux mode: ALT1 mux port: TX_DATA0 of instance: SAI2

0x2 : ALT2_UART4_RTS_B

Select mux mode: ALT2 mux port: RTS_B of instance: UART4

0x3 : ALT3_GPT4_COMPARE3

Select mux mode: ALT3 mux port: COMPARE3 of instance: GPT4

0x4 : ALT4_SIM2_PORT1_PD

Select mux mode: ALT4 mux port: PORT1_PD of instance: SIM2

0x5 : ALT5_GPIO5_IO17

Select mux mode: ALT5 mux port: IO17 of instance: GPIO5

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SD2_DATA3

End of enumeration elements list.

SW_MUX_CTL_PAD_SD3_CLK

SW_MUX_CTL_PAD_SD3_CLK SW MUX Control Register
address_offset : 0x1D0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SD3_CLK

Select mux mode: ALT0 mux port: CLK of instance: SD3

0x1 : ALT1_NAND_CLE

Select mux mode: ALT1 mux port: CLE of instance: NAND

0x2 : ALT2_ECSPI4_MISO

Select mux mode: ALT2 mux port: MISO of instance: ECSPI4

0x3 : ALT3_SAI3_RX_SYNC

Select mux mode: ALT3 mux port: RX_SYNC of instance: SAI3

0x4 : ALT4_GPT3_CLK

Select mux mode: ALT4 mux port: CLK of instance: GPT3

0x5 : ALT5_GPIO6_IO0

Select mux mode: ALT5 mux port: IO0 of instance: GPIO6

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SD3_CLK

End of enumeration elements list.

SW_MUX_CTL_PAD_SD3_CMD

SW_MUX_CTL_PAD_SD3_CMD SW MUX Control Register
address_offset : 0x1D4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SD3_CMD

Select mux mode: ALT0 mux port: CMD of instance: SD3

0x1 : ALT1_NAND_ALE

Select mux mode: ALT1 mux port: ALE of instance: NAND

0x2 : ALT2_ECSPI4_MOSI

Select mux mode: ALT2 mux port: MOSI of instance: ECSPI4

0x3 : ALT3_SAI3_RX_BCLK

Select mux mode: ALT3 mux port: RX_BCLK of instance: SAI3

0x4 : ALT4_GPT3_CAPTURE1

Select mux mode: ALT4 mux port: CAPTURE1 of instance: GPT3

0x5 : ALT5_GPIO6_IO1

Select mux mode: ALT5 mux port: IO1 of instance: GPIO6

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SD3_CMD

End of enumeration elements list.

SW_MUX_CTL_PAD_SD3_DATA0

SW_MUX_CTL_PAD_SD3_DATA0 SW MUX Control Register
address_offset : 0x1D8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SD3_DATA0

Select mux mode: ALT0 mux port: DATA0 of instance: SD3

0x1 : ALT1_NAND_DATA00

Select mux mode: ALT1 mux port: DATA00 of instance: NAND

0x2 : ALT2_ECSPI4_SS0

Select mux mode: ALT2 mux port: SS0 of instance: ECSPI4

0x3 : ALT3_SAI3_RX_DATA0

Select mux mode: ALT3 mux port: RX_DATA0 of instance: SAI3

0x4 : ALT4_GPT3_CAPTURE2

Select mux mode: ALT4 mux port: CAPTURE2 of instance: GPT3

0x5 : ALT5_GPIO6_IO2

Select mux mode: ALT5 mux port: IO2 of instance: GPIO6

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SD3_DATA0

End of enumeration elements list.

SW_MUX_CTL_PAD_SD3_DATA1

SW_MUX_CTL_PAD_SD3_DATA1 SW MUX Control Register
address_offset : 0x1DC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SD3_DATA1

Select mux mode: ALT0 mux port: DATA1 of instance: SD3

0x1 : ALT1_NAND_DATA01

Select mux mode: ALT1 mux port: DATA01 of instance: NAND

0x2 : ALT2_ECSPI4_SCLK

Select mux mode: ALT2 mux port: SCLK of instance: ECSPI4

0x3 : ALT3_SAI3_TX_BCLK

Select mux mode: ALT3 mux port: TX_BCLK of instance: SAI3

0x4 : ALT4_GPT3_COMPARE1

Select mux mode: ALT4 mux port: COMPARE1 of instance: GPT3

0x5 : ALT5_GPIO6_IO3

Select mux mode: ALT5 mux port: IO3 of instance: GPIO6

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SD3_DATA1

End of enumeration elements list.

SW_MUX_CTL_PAD_SD3_DATA2

SW_MUX_CTL_PAD_SD3_DATA2 SW MUX Control Register
address_offset : 0x1E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SD3_DATA2

Select mux mode: ALT0 mux port: DATA2 of instance: SD3

0x1 : ALT1_NAND_DATA02

Select mux mode: ALT1 mux port: DATA02 of instance: NAND

0x2 : ALT2_I2C3_SDA

Select mux mode: ALT2 mux port: SDA of instance: I2C3

0x3 : ALT3_SAI3_TX_SYNC

Select mux mode: ALT3 mux port: TX_SYNC of instance: SAI3

0x4 : ALT4_GPT3_COMPARE2

Select mux mode: ALT4 mux port: COMPARE2 of instance: GPT3

0x5 : ALT5_GPIO6_IO4

Select mux mode: ALT5 mux port: IO4 of instance: GPIO6

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SD3_DATA2

End of enumeration elements list.

SW_MUX_CTL_PAD_SD3_DATA3

SW_MUX_CTL_PAD_SD3_DATA3 SW MUX Control Register
address_offset : 0x1E4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SD3_DATA3

Select mux mode: ALT0 mux port: DATA3 of instance: SD3

0x1 : ALT1_NAND_DATA03

Select mux mode: ALT1 mux port: DATA03 of instance: NAND

0x2 : ALT2_I2C3_SCL

Select mux mode: ALT2 mux port: SCL of instance: I2C3

0x3 : ALT3_SAI3_TX_DATA0

Select mux mode: ALT3 mux port: TX_DATA0 of instance: SAI3

0x4 : ALT4_GPT3_COMPARE3

Select mux mode: ALT4 mux port: COMPARE3 of instance: GPT3

0x5 : ALT5_GPIO6_IO5

Select mux mode: ALT5 mux port: IO5 of instance: GPIO6

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SD3_DATA3

End of enumeration elements list.

SW_MUX_CTL_PAD_SD3_DATA4

SW_MUX_CTL_PAD_SD3_DATA4 SW MUX Control Register
address_offset : 0x1E8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SD3_DATA4

Select mux mode: ALT0 mux port: DATA4 of instance: SD3

0x1 : ALT1_NAND_DATA04

Select mux mode: ALT1 mux port: DATA04 of instance: NAND

0x3 : ALT3_UART3_RX_DATA

Select mux mode: ALT3 mux port: RX_DATA of instance: UART3

0x4 : ALT4_FLEXCAN2_RX

Select mux mode: ALT4 mux port: RX of instance: FLEXCAN2

0x5 : ALT5_GPIO6_IO6

Select mux mode: ALT5 mux port: IO6 of instance: GPIO6

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SD3_DATA4

End of enumeration elements list.

SW_MUX_CTL_PAD_SD3_DATA5

SW_MUX_CTL_PAD_SD3_DATA5 SW MUX Control Register
address_offset : 0x1EC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SD3_DATA5

Select mux mode: ALT0 mux port: DATA5 of instance: SD3

0x1 : ALT1_NAND_DATA05

Select mux mode: ALT1 mux port: DATA05 of instance: NAND

0x3 : ALT3_UART3_TX_DATA

Select mux mode: ALT3 mux port: TX_DATA of instance: UART3

0x4 : ALT4_FLEXCAN1_TX

Select mux mode: ALT4 mux port: TX of instance: FLEXCAN1

0x5 : ALT5_GPIO6_IO7

Select mux mode: ALT5 mux port: IO7 of instance: GPIO6

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SD3_DATA5

End of enumeration elements list.

SW_MUX_CTL_PAD_SD3_DATA6

SW_MUX_CTL_PAD_SD3_DATA6 SW MUX Control Register
address_offset : 0x1F0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SD3_DATA6

Select mux mode: ALT0 mux port: DATA6 of instance: SD3

0x1 : ALT1_NAND_DATA06

Select mux mode: ALT1 mux port: DATA06 of instance: NAND

0x2 : ALT2_SD3_WP

Select mux mode: ALT2 mux port: WP of instance: SD3

0x3 : ALT3_UART3_RTS_B

Select mux mode: ALT3 mux port: RTS_B of instance: UART3

0x4 : ALT4_FLEXCAN2_TX

Select mux mode: ALT4 mux port: TX of instance: FLEXCAN2

0x5 : ALT5_GPIO6_IO8

Select mux mode: ALT5 mux port: IO8 of instance: GPIO6

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SD3_DATA6

End of enumeration elements list.

SW_MUX_CTL_PAD_SD3_DATA7

SW_MUX_CTL_PAD_SD3_DATA7 SW MUX Control Register
address_offset : 0x1F4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SD3_DATA7

Select mux mode: ALT0 mux port: DATA7 of instance: SD3

0x1 : ALT1_NAND_DATA07

Select mux mode: ALT1 mux port: DATA07 of instance: NAND

0x2 : ALT2_SD3_CD_B

Select mux mode: ALT2 mux port: CD_B of instance: SD3

0x3 : ALT3_UART3_CTS_B

Select mux mode: ALT3 mux port: CTS_B of instance: UART3

0x4 : ALT4_FLEXCAN1_RX

Select mux mode: ALT4 mux port: RX of instance: FLEXCAN1

0x5 : ALT5_GPIO6_IO9

Select mux mode: ALT5 mux port: IO9 of instance: GPIO6

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SD3_DATA7

End of enumeration elements list.

SW_MUX_CTL_PAD_SD3_STROBE

SW_MUX_CTL_PAD_SD3_STROBE SW MUX Control Register
address_offset : 0x1F8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SD3_STROBE

Select mux mode: ALT0 mux port: STROBE of instance: SD3

0x1 : ALT1_NAND_RE_B

Select mux mode: ALT1 mux port: RE_B of instance: NAND

0x5 : ALT5_GPIO6_IO10

Select mux mode: ALT5 mux port: IO10 of instance: GPIO6

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SD3_STROBE

End of enumeration elements list.

SW_MUX_CTL_PAD_SD3_RESET_B

SW_MUX_CTL_PAD_SD3_RESET_B SW MUX Control Register
address_offset : 0x1FC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SD3_RESET_B

Select mux mode: ALT0 mux port: RESET_B of instance: SD3

0x1 : ALT1_NAND_WE_B

Select mux mode: ALT1 mux port: WE_B of instance: NAND

0x2 : ALT2_SD3_RESET

Select mux mode: ALT2 mux port: RESET of instance: SD3

0x3 : ALT3_SAI3_MCLK

Select mux mode: ALT3 mux port: MCLK of instance: SAI3

0x5 : ALT5_GPIO6_IO11

Select mux mode: ALT5 mux port: IO11 of instance: GPIO6

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SD3_RESET_B

End of enumeration elements list.

SW_MUX_CTL_PAD_GPIO1_IO11

SW_MUX_CTL_PAD_GPIO1_IO11 SW MUX Control Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_GPIO1_IO11

Select mux mode: ALT0 mux port: IO11 of instance: GPIO1

0x1 : ALT1_SD3_LCTL

Select mux mode: ALT1 mux port: LCTL of instance: SD3

0x2 : ALT2_ENET1_MDC

Select mux mode: ALT2 mux port: MDC of instance: ENET1

0x3 : ALT3_UART3_CTS_B

Select mux mode: ALT3 mux port: CTS_B of instance: UART3

0x4 : ALT4_I2C4_SDA

Select mux mode: ALT4 mux port: SDA of instance: I2C4

0x5 : ALT5_FLEXTIMER1_PHB

Select mux mode: ALT5 mux port: PHB of instance: FLEXTIMER1

0x6 : ALT6_KPP_ROW6

Select mux mode: ALT6 mux port: ROW6 of instance: KPP

0x7 : ALT7_PWM4_OUT

Select mux mode: ALT7 mux port: OUT of instance: PWM4

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad GPIO1_IO11

End of enumeration elements list.

SW_MUX_CTL_PAD_SAI1_RX_DATA

SW_MUX_CTL_PAD_SAI1_RX_DATA SW MUX Control Register
address_offset : 0x200 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SAI1_RX_DATA0

Select mux mode: ALT0 mux port: RX_DATA0 of instance: SAI1

0x1 : ALT1_NAND_CE1_B

Select mux mode: ALT1 mux port: CE1_B of instance: NAND

0x2 : ALT2_UART5_RX_DATA

Select mux mode: ALT2 mux port: RX_DATA of instance: UART5

0x3 : ALT3_FLEXCAN1_RX

Select mux mode: ALT3 mux port: RX of instance: FLEXCAN1

0x4 : ALT4_SIM1_PORT1_TRXD

Select mux mode: ALT4 mux port: PORT1_TRXD of instance: SIM1

0x5 : ALT5_GPIO6_IO12

Select mux mode: ALT5 mux port: IO12 of instance: GPIO6

0x7 : ALT7_SRC_ANY_PU_RESET

Select mux mode: ALT7 mux port: ANY_PU_RESET of instance: SRC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SAI1_RX_DATA

End of enumeration elements list.

SW_MUX_CTL_PAD_SAI1_TX_BCLK

SW_MUX_CTL_PAD_SAI1_TX_BCLK SW MUX Control Register
address_offset : 0x204 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SAI1_TX_BCLK

Select mux mode: ALT0 mux port: TX_BCLK of instance: SAI1

0x1 : ALT1_NAND_CE0_B

Select mux mode: ALT1 mux port: CE0_B of instance: NAND

0x2 : ALT2_UART5_TX_DATA

Select mux mode: ALT2 mux port: TX_DATA of instance: UART5

0x3 : ALT3_FLEXCAN1_TX

Select mux mode: ALT3 mux port: TX of instance: FLEXCAN1

0x4 : ALT4_SIM1_PORT1_CLK

Select mux mode: ALT4 mux port: PORT1_CLK of instance: SIM1

0x5 : ALT5_GPIO6_IO13

Select mux mode: ALT5 mux port: IO13 of instance: GPIO6

0x7 : ALT7_SRC_EARLY_RESET

Select mux mode: ALT7 mux port: EARLY_RESET of instance: SRC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SAI1_TX_BCLK

End of enumeration elements list.

SW_MUX_CTL_PAD_SAI1_TX_SYNC

SW_MUX_CTL_PAD_SAI1_TX_SYNC SW MUX Control Register
address_offset : 0x208 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SAI1_TX_SYNC

Select mux mode: ALT0 mux port: TX_SYNC of instance: SAI1

0x1 : ALT1_NAND_DQS

Select mux mode: ALT1 mux port: DQS of instance: NAND

0x2 : ALT2_UART5_CTS_B

Select mux mode: ALT2 mux port: CTS_B of instance: UART5

0x3 : ALT3_FLEXCAN2_RX

Select mux mode: ALT3 mux port: RX of instance: FLEXCAN2

0x4 : ALT4_SIM1_PORT1_RST_B

Select mux mode: ALT4 mux port: PORT1_RST_B of instance: SIM1

0x5 : ALT5_GPIO6_IO14

Select mux mode: ALT5 mux port: IO14 of instance: GPIO6

0x7 : ALT7_SRC_INT_BOOT

Select mux mode: ALT7 mux port: INT_BOOT of instance: SRC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SAI1_TX_SYNC

End of enumeration elements list.

SW_MUX_CTL_PAD_SAI1_TX_DATA

SW_MUX_CTL_PAD_SAI1_TX_DATA SW MUX Control Register
address_offset : 0x20C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SAI1_TX_DATA0

Select mux mode: ALT0 mux port: TX_DATA0 of instance: SAI1

0x1 : ALT1_NAND_READY_B

Select mux mode: ALT1 mux port: READY_B of instance: NAND

0x2 : ALT2_UART5_RTS_B

Select mux mode: ALT2 mux port: RTS_B of instance: UART5

0x3 : ALT3_FLEXCAN2_TX

Select mux mode: ALT3 mux port: TX of instance: FLEXCAN2

0x4 : ALT4_SIM1_PORT1_SVEN

Select mux mode: ALT4 mux port: PORT1_SVEN of instance: SIM1

0x5 : ALT5_GPIO6_IO15

Select mux mode: ALT5 mux port: IO15 of instance: GPIO6

0x7 : ALT7_SRC_SYSTEM_RESET

Select mux mode: ALT7 mux port: SYSTEM_RESET of instance: SRC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SAI1_TX_DATA

End of enumeration elements list.

SW_MUX_CTL_PAD_SAI1_RX_SYNC

SW_MUX_CTL_PAD_SAI1_RX_SYNC SW MUX Control Register
address_offset : 0x210 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SAI1_RX_SYNC

Select mux mode: ALT0 mux port: RX_SYNC of instance: SAI1

0x1 : ALT1_NAND_CE2_B

Select mux mode: ALT1 mux port: CE2_B of instance: NAND

0x2 : ALT2_SAI2_RX_SYNC

Select mux mode: ALT2 mux port: RX_SYNC of instance: SAI2

0x3 : ALT3_I2C4_SCL

Select mux mode: ALT3 mux port: SCL of instance: I2C4

0x4 : ALT4_SIM1_PORT1_PD

Select mux mode: ALT4 mux port: PORT1_PD of instance: SIM1

0x5 : ALT5_GPIO6_IO16

Select mux mode: ALT5 mux port: IO16 of instance: GPIO6

0x6 : ALT6_MQS_RIGHT

Select mux mode: ALT6 mux port: RIGHT of instance: MQS

0x7 : ALT7_SRC_CA7_RESET_B0

Select mux mode: ALT7 mux port: CA7_RESET_B0 of instance: SRC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SAI1_RX_SYNC

End of enumeration elements list.

SW_MUX_CTL_PAD_SAI1_RX_BCLK

SW_MUX_CTL_PAD_SAI1_RX_BCLK SW MUX Control Register
address_offset : 0x214 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SAI1_RX_BCLK

Select mux mode: ALT0 mux port: RX_BCLK of instance: SAI1

0x1 : ALT1_NAND_CE3_B

Select mux mode: ALT1 mux port: CE3_B of instance: NAND

0x2 : ALT2_SAI2_RX_BCLK

Select mux mode: ALT2 mux port: RX_BCLK of instance: SAI2

0x3 : ALT3_I2C4_SDA

Select mux mode: ALT3 mux port: SDA of instance: I2C4

0x4 : ALT4_FLEXTIMER2_PHA

Select mux mode: ALT4 mux port: PHA of instance: FLEXTIMER2

0x5 : ALT5_GPIO6_IO17

Select mux mode: ALT5 mux port: IO17 of instance: GPIO6

0x6 : ALT6_MQS_LEFT

Select mux mode: ALT6 mux port: LEFT of instance: MQS

0x7 : ALT7_SRC_CA7_RESET_B1

Select mux mode: ALT7 mux port: CA7_RESET_B1 of instance: SRC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SAI1_RX_BCLK

End of enumeration elements list.

SW_MUX_CTL_PAD_SAI1_MCLK

SW_MUX_CTL_PAD_SAI1_MCLK SW MUX Control Register
address_offset : 0x218 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SAI1_MCLK

Select mux mode: ALT0 mux port: MCLK of instance: SAI1

0x1 : ALT1_NAND_WP_B

Select mux mode: ALT1 mux port: WP_B of instance: NAND

0x2 : ALT2_SAI2_MCLK

Select mux mode: ALT2 mux port: MCLK of instance: SAI2

0x3 : ALT3_CCM_PMIC_READY

Select mux mode: ALT3 mux port: CCM_PMIC_READY of instance: CCM

0x4 : ALT4_FLEXTIMER2_PHB

Select mux mode: ALT4 mux port: PHB of instance: FLEXTIMER2

0x5 : ALT5_GPIO6_IO18

Select mux mode: ALT5 mux port: IO18 of instance: GPIO6

0x7 : ALT7_SRC_TESTER_ACK

Select mux mode: ALT7 mux port: TESTER_ACK of instance: SRC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SAI1_MCLK

End of enumeration elements list.

SW_MUX_CTL_PAD_SAI2_TX_SYNC

SW_MUX_CTL_PAD_SAI2_TX_SYNC SW MUX Control Register
address_offset : 0x21C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SAI2_TX_SYNC

Select mux mode: ALT0 mux port: TX_SYNC of instance: SAI2

0x1 : ALT1_ECSPI3_MISO

Select mux mode: ALT1 mux port: MISO of instance: ECSPI3

0x2 : ALT2_UART4_RX_DATA

Select mux mode: ALT2 mux port: RX_DATA of instance: UART4

0x3 : ALT3_UART1_CTS_B

Select mux mode: ALT3 mux port: CTS_B of instance: UART1

0x4 : ALT4_FLEXTIMER2_CH4

Select mux mode: ALT4 mux port: CH4 of instance: FLEXTIMER2

0x5 : ALT5_GPIO6_IO19

Select mux mode: ALT5 mux port: IO19 of instance: GPIO6

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SAI2_TX_SYNC

End of enumeration elements list.

SW_MUX_CTL_PAD_SAI2_TX_BCLK

SW_MUX_CTL_PAD_SAI2_TX_BCLK SW MUX Control Register
address_offset : 0x220 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SAI2_TX_BCLK

Select mux mode: ALT0 mux port: TX_BCLK of instance: SAI2

0x1 : ALT1_ECSPI3_MOSI

Select mux mode: ALT1 mux port: MOSI of instance: ECSPI3

0x2 : ALT2_UART4_TX_DATA

Select mux mode: ALT2 mux port: TX_DATA of instance: UART4

0x3 : ALT3_UART1_RTS_B

Select mux mode: ALT3 mux port: RTS_B of instance: UART1

0x4 : ALT4_FLEXTIMER2_CH5

Select mux mode: ALT4 mux port: CH5 of instance: FLEXTIMER2

0x5 : ALT5_GPIO6_IO20

Select mux mode: ALT5 mux port: IO20 of instance: GPIO6

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SAI2_TX_BCLK

End of enumeration elements list.

SW_MUX_CTL_PAD_SAI2_RX_DATA

SW_MUX_CTL_PAD_SAI2_RX_DATA SW MUX Control Register
address_offset : 0x224 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SAI2_RX_DATA0

Select mux mode: ALT0 mux port: RX_DATA0 of instance: SAI2

0x1 : ALT1_ECSPI3_SCLK

Select mux mode: ALT1 mux port: SCLK of instance: ECSPI3

0x2 : ALT2_UART4_CTS_B

Select mux mode: ALT2 mux port: CTS_B of instance: UART4

0x3 : ALT3_UART2_CTS_B

Select mux mode: ALT3 mux port: CTS_B of instance: UART2

0x4 : ALT4_FLEXTIMER2_CH6

Select mux mode: ALT4 mux port: CH6 of instance: FLEXTIMER2

0x5 : ALT5_GPIO6_IO21

Select mux mode: ALT5 mux port: IO21 of instance: GPIO6

0x6 : ALT6_KPP_COL7

Select mux mode: ALT6 mux port: COL7 of instance: KPP

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SAI2_RX_DATA

End of enumeration elements list.

SW_MUX_CTL_PAD_SAI2_TX_DATA

SW_MUX_CTL_PAD_SAI2_TX_DATA SW MUX Control Register
address_offset : 0x228 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_SAI2_TX_DATA0

Select mux mode: ALT0 mux port: TX_DATA0 of instance: SAI2

0x1 : ALT1_ECSPI3_SS0

Select mux mode: ALT1 mux port: SS0 of instance: ECSPI3

0x2 : ALT2_UART4_RTS_B

Select mux mode: ALT2 mux port: RTS_B of instance: UART4

0x3 : ALT3_UART2_RTS_B

Select mux mode: ALT3 mux port: RTS_B of instance: UART2

0x4 : ALT4_FLEXTIMER2_CH7

Select mux mode: ALT4 mux port: CH7 of instance: FLEXTIMER2

0x5 : ALT5_GPIO6_IO22

Select mux mode: ALT5 mux port: IO22 of instance: GPIO6

0x6 : ALT6_KPP_ROW7

Select mux mode: ALT6 mux port: ROW7 of instance: KPP

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad SAI2_TX_DATA

End of enumeration elements list.

SW_MUX_CTL_PAD_ENET1_RGMII_RD0

SW_MUX_CTL_PAD_ENET1_RGMII_RD0 SW MUX Control Register
address_offset : 0x22C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_ENET1_RGMII_RD0

Select mux mode: ALT0 mux port: RGMII_RD0 of instance: ENET1

0x1 : ALT1_PWM1_OUT

Select mux mode: ALT1 mux port: OUT of instance: PWM1

0x2 : ALT2_I2C3_SCL

Select mux mode: ALT2 mux port: SCL of instance: I2C3

0x3 : ALT3_UART1_CTS_B

Select mux mode: ALT3 mux port: CTS_B of instance: UART1

0x4 : ALT4_EPDC_VCOM0

Select mux mode: ALT4 mux port: VCOM0 of instance: EPDC

0x5 : ALT5_GPIO7_IO0

Select mux mode: ALT5 mux port: IO0 of instance: GPIO7

0x6 : ALT6_KPP_ROW3

Select mux mode: ALT6 mux port: ROW3 of instance: KPP

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad ENET1_RGMII_RD0

End of enumeration elements list.

SW_MUX_CTL_PAD_ENET1_RGMII_RD1

SW_MUX_CTL_PAD_ENET1_RGMII_RD1 SW MUX Control Register
address_offset : 0x230 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_ENET1_RGMII_RD1

Select mux mode: ALT0 mux port: RGMII_RD1 of instance: ENET1

0x1 : ALT1_PWM2_OUT

Select mux mode: ALT1 mux port: OUT of instance: PWM2

0x2 : ALT2_I2C3_SDA

Select mux mode: ALT2 mux port: SDA of instance: I2C3

0x3 : ALT3_UART1_RTS_B

Select mux mode: ALT3 mux port: RTS_B of instance: UART1

0x4 : ALT4_EPDC_VCOM1

Select mux mode: ALT4 mux port: VCOM1 of instance: EPDC

0x5 : ALT5_GPIO7_IO1

Select mux mode: ALT5 mux port: IO1 of instance: GPIO7

0x6 : ALT6_KPP_COL3

Select mux mode: ALT6 mux port: COL3 of instance: KPP

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad ENET1_RGMII_RD1

End of enumeration elements list.

SW_MUX_CTL_PAD_ENET1_RGMII_RD2

SW_MUX_CTL_PAD_ENET1_RGMII_RD2 SW MUX Control Register
address_offset : 0x234 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_ENET1_RGMII_RD2

Select mux mode: ALT0 mux port: RGMII_RD2 of instance: ENET1

0x1 : ALT1_FLEXCAN1_RX

Select mux mode: ALT1 mux port: RX of instance: FLEXCAN1

0x2 : ALT2_ECSPI2_SCLK

Select mux mode: ALT2 mux port: SCLK of instance: ECSPI2

0x3 : ALT3_UART1_RX_DATA

Select mux mode: ALT3 mux port: RX_DATA of instance: UART1

0x4 : ALT4_EPDC_SDCE4

Select mux mode: ALT4 mux port: SDCE4 of instance: EPDC

0x5 : ALT5_GPIO7_IO2

Select mux mode: ALT5 mux port: IO2 of instance: GPIO7

0x6 : ALT6_KPP_ROW2

Select mux mode: ALT6 mux port: ROW2 of instance: KPP

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad ENET1_RGMII_RD2

End of enumeration elements list.

SW_MUX_CTL_PAD_ENET1_RGMII_RD3

SW_MUX_CTL_PAD_ENET1_RGMII_RD3 SW MUX Control Register
address_offset : 0x238 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_ENET1_RGMII_RD3

Select mux mode: ALT0 mux port: RGMII_RD3 of instance: ENET1

0x1 : ALT1_FLEXCAN1_TX

Select mux mode: ALT1 mux port: TX of instance: FLEXCAN1

0x2 : ALT2_ECSPI2_MOSI

Select mux mode: ALT2 mux port: MOSI of instance: ECSPI2

0x3 : ALT3_UART1_TX_DATA

Select mux mode: ALT3 mux port: TX_DATA of instance: UART1

0x4 : ALT4_EPDC_SDCE5

Select mux mode: ALT4 mux port: SDCE5 of instance: EPDC

0x5 : ALT5_GPIO7_IO3

Select mux mode: ALT5 mux port: IO3 of instance: GPIO7

0x6 : ALT6_KPP_COL2

Select mux mode: ALT6 mux port: COL2 of instance: KPP

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad ENET1_RGMII_RD3

End of enumeration elements list.

SW_MUX_CTL_PAD_ENET1_RGMII_RX_CTL

SW_MUX_CTL_PAD_ENET1_RGMII_RX_CTL SW MUX Control Register
address_offset : 0x23C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_ENET1_RGMII_RX_CTL

Select mux mode: ALT0 mux port: RGMII_RX_CTL of instance: ENET1

0x2 : ALT2_ECSPI2_SS1

Select mux mode: ALT2 mux port: SS1 of instance: ECSPI2

0x4 : ALT4_EPDC_SDCE6

Select mux mode: ALT4 mux port: SDCE6 of instance: EPDC

0x5 : ALT5_GPIO7_IO4

Select mux mode: ALT5 mux port: IO4 of instance: GPIO7

0x6 : ALT6_KPP_ROW1

Select mux mode: ALT6 mux port: ROW1 of instance: KPP

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad ENET1_RGMII_RX_CTL

End of enumeration elements list.

SW_MUX_CTL_PAD_GPIO1_IO12

SW_MUX_CTL_PAD_GPIO1_IO12 SW MUX Control Register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_GPIO1_IO12

Select mux mode: ALT0 mux port: IO12 of instance: GPIO1

0x1 : ALT1_SD2_VSELECT

Select mux mode: ALT1 mux port: VSELECT of instance: SD2

0x2 : ALT2_CCM_ENET1_REF_CLK

Select mux mode: ALT2 mux port: ENET1_REF_CLK of instance: ENET1

0x3 : ALT3_FLEXCAN1_RX

Select mux mode: ALT3 mux port: RX of instance: FLEXCAN1

0x4 : ALT4_CM4_NMI

Select mux mode: ALT4 mux port: NMI of instance: CM4

0x5 : ALT5_CCM_EXT_CLK1

Select mux mode: ALT5 mux port: EXT_CLK1 of instance: CCM

0x6 : ALT6_SNVS_VIO_5

Select mux mode: ALT6 mux port: VIO_5 of instance: SNVS

0x7 : ALT7_USB_OTG1_ID

Select mux mode: ALT7 mux port: OTG1_ID of instance: USB

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad GPIO1_IO12

End of enumeration elements list.

SW_MUX_CTL_PAD_ENET1_RGMII_RXC

SW_MUX_CTL_PAD_ENET1_RGMII_RXC SW MUX Control Register
address_offset : 0x240 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_ENET1_RGMII_RXC

Select mux mode: ALT0 mux port: RGMII_RXC of instance: ENET1

0x1 : ALT1_ENET1_RX_ER

Select mux mode: ALT1 mux port: RX_ER of instance: ENET1

0x2 : ALT2_ECSPI2_SS2

Select mux mode: ALT2 mux port: SS2 of instance: ECSPI2

0x4 : ALT4_EPDC_SDCE7

Select mux mode: ALT4 mux port: SDCE7 of instance: EPDC

0x5 : ALT5_GPIO7_IO5

Select mux mode: ALT5 mux port: IO5 of instance: GPIO7

0x6 : ALT6_KPP_COL1

Select mux mode: ALT6 mux port: COL1 of instance: KPP

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad ENET1_RGMII_RXC

End of enumeration elements list.

SW_MUX_CTL_PAD_ENET1_RGMII_TD0

SW_MUX_CTL_PAD_ENET1_RGMII_TD0 SW MUX Control Register
address_offset : 0x244 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_ENET1_RGMII_TD0

Select mux mode: ALT0 mux port: RGMII_TD0 of instance: ENET1

0x1 : ALT1_PWM3_OUT

Select mux mode: ALT1 mux port: OUT of instance: PWM3

0x2 : ALT2_ECSPI2_SS3

Select mux mode: ALT2 mux port: SS3 of instance: ECSPI2

0x4 : ALT4_EPDC_SDCE8

Select mux mode: ALT4 mux port: SDCE8 of instance: EPDC

0x5 : ALT5_GPIO7_IO6

Select mux mode: ALT5 mux port: IO6 of instance: GPIO7

0x6 : ALT6_KPP_ROW0

Select mux mode: ALT6 mux port: ROW0 of instance: KPP

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad ENET1_RGMII_TD0

End of enumeration elements list.

SW_MUX_CTL_PAD_ENET1_RGMII_TD1

SW_MUX_CTL_PAD_ENET1_RGMII_TD1 SW MUX Control Register
address_offset : 0x248 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_ENET1_RGMII_TD1

Select mux mode: ALT0 mux port: RGMII_TD1 of instance: ENET1

0x1 : ALT1_PWM4_OUT

Select mux mode: ALT1 mux port: OUT of instance: PWM4

0x2 : ALT2_ECSPI2_RDY

Select mux mode: ALT2 mux port: RDY of instance: ECSPI2

0x4 : ALT4_EPDC_SDCE9

Select mux mode: ALT4 mux port: SDCE9 of instance: EPDC

0x5 : ALT5_GPIO7_IO7

Select mux mode: ALT5 mux port: IO7 of instance: GPIO7

0x6 : ALT6_KPP_COL0

Select mux mode: ALT6 mux port: COL0 of instance: KPP

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad ENET1_RGMII_TD1

End of enumeration elements list.

SW_MUX_CTL_PAD_ENET1_RGMII_TD2

SW_MUX_CTL_PAD_ENET1_RGMII_TD2 SW MUX Control Register
address_offset : 0x24C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_ENET1_RGMII_TD2

Select mux mode: ALT0 mux port: RGMII_TD2 of instance: ENET1

0x1 : ALT1_FLEXCAN2_RX

Select mux mode: ALT1 mux port: RX of instance: FLEXCAN2

0x2 : ALT2_ECSPI2_MISO

Select mux mode: ALT2 mux port: MISO of instance: ECSPI2

0x3 : ALT3_I2C4_SCL

Select mux mode: ALT3 mux port: SCL of instance: I2C4

0x4 : ALT4_EPDC_SDOED

Select mux mode: ALT4 mux port: SDOED of instance: EPDC

0x5 : ALT5_GPIO7_IO8

Select mux mode: ALT5 mux port: IO8 of instance: GPIO7

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad ENET1_RGMII_TD2

End of enumeration elements list.

SW_MUX_CTL_PAD_ENET1_RGMII_TD3

SW_MUX_CTL_PAD_ENET1_RGMII_TD3 SW MUX Control Register
address_offset : 0x250 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_ENET1_RGMII_TD3

Select mux mode: ALT0 mux port: RGMII_TD3 of instance: ENET1

0x1 : ALT1_FLEXCAN2_TX

Select mux mode: ALT1 mux port: TX of instance: FLEXCAN2

0x2 : ALT2_ECSPI2_SS0

Select mux mode: ALT2 mux port: SS0 of instance: ECSPI2

0x3 : ALT3_I2C4_SDA

Select mux mode: ALT3 mux port: SDA of instance: I2C4

0x4 : ALT4_EPDC_SDOEZ

Select mux mode: ALT4 mux port: SDOEZ of instance: EPDC

0x5 : ALT5_GPIO7_IO9

Select mux mode: ALT5 mux port: IO9 of instance: GPIO7

0x7 : ALT7_CAAM_RNG_OSC_OBS

Select mux mode: ALT7 mux port: RNG_OSC_OBS of instance: CAAM

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad ENET1_RGMII_TD3

End of enumeration elements list.

SW_MUX_CTL_PAD_ENET1_RGMII_TX_CTL

SW_MUX_CTL_PAD_ENET1_RGMII_TX_CTL SW MUX Control Register
address_offset : 0x254 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_ENET1_RGMII_TX_CTL

Select mux mode: ALT0 mux port: RGMII_TX_CTL of instance: ENET1

0x2 : ALT2_SAI1_RX_SYNC

Select mux mode: ALT2 mux port: RX_SYNC of instance: SAI1

0x3 : ALT3_GPT2_COMPARE1

Select mux mode: ALT3 mux port: COMPARE1 of instance: GPT2

0x4 : ALT4_EPDC_PWR_CTRL2

Select mux mode: ALT4 mux port: PWR_CTRL2 of instance: EPDC

0x5 : ALT5_GPIO7_IO10

Select mux mode: ALT5 mux port: IO10 of instance: GPIO7

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad ENET1_RGMII_TX_CTL

End of enumeration elements list.

SW_MUX_CTL_PAD_ENET1_RGMII_TXC

SW_MUX_CTL_PAD_ENET1_RGMII_TXC SW MUX Control Register
address_offset : 0x258 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_ENET1_RGMII_TXC

Select mux mode: ALT0 mux port: RGMII_TXC of instance: ENET1

0x1 : ALT1_ENET1_TX_ER

Select mux mode: ALT1 mux port: TX_ER of instance: ENET1

0x2 : ALT2_SAI1_RX_BCLK

Select mux mode: ALT2 mux port: RX_BCLK of instance: SAI1

0x3 : ALT3_GPT2_COMPARE2

Select mux mode: ALT3 mux port: COMPARE2 of instance: GPT2

0x4 : ALT4_EPDC_PWR_CTRL3

Select mux mode: ALT4 mux port: PWR_CTRL3 of instance: EPDC

0x5 : ALT5_GPIO7_IO11

Select mux mode: ALT5 mux port: IO11 of instance: GPIO7

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad ENET1_RGMII_TXC

End of enumeration elements list.

SW_MUX_CTL_PAD_ENET1_TX_CLK

SW_MUX_CTL_PAD_ENET1_TX_CLK SW MUX Control Register
address_offset : 0x25C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_ENET1_TX_CLK

Select mux mode: ALT0 mux port: TX_CLK of instance: ENET1

0x1 : ALT1_CCM_ENET1_REF_CLK

Select mux mode: ALT1 mux port: ENET1_REF_CLK of instance: ENET1

0x2 : ALT2_SAI1_RX_DATA0

Select mux mode: ALT2 mux port: RX_DATA0 of instance: SAI1

0x3 : ALT3_GPT2_COMPARE3

Select mux mode: ALT3 mux port: COMPARE3 of instance: GPT2

0x4 : ALT4_EPDC_PWR_IRQ

Select mux mode: ALT4 mux port: PWR_IRQ of instance: EPDC

0x5 : ALT5_GPIO7_IO12

Select mux mode: ALT5 mux port: IO12 of instance: GPIO7

0x6 : ALT6_CCM_EXT_CLK1

Select mux mode: ALT6 mux port: EXT_CLK1 of instance: CCM

0x7 : ALT7_CSU_ALARM_AUT0

Select mux mode: ALT7 mux port: CSU_ALARM_AUT0 of instance: CSU

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad ENET1_TX_CLK

End of enumeration elements list.

SW_MUX_CTL_PAD_ENET1_RX_CLK

SW_MUX_CTL_PAD_ENET1_RX_CLK SW MUX Control Register
address_offset : 0x260 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_ENET1_RX_CLK

Select mux mode: ALT0 mux port: RX_CLK of instance: ENET1

0x1 : ALT1_WDOG2_WDOG_B

Select mux mode: ALT1 mux port: WDOG_B of instance: WDOG2

0x2 : ALT2_SAI1_TX_BCLK

Select mux mode: ALT2 mux port: TX_BCLK of instance: SAI1

0x3 : ALT3_GPT2_CLK

Select mux mode: ALT3 mux port: CLK of instance: GPT2

0x4 : ALT4_EPDC_PWR_WAKE

Select mux mode: ALT4 mux port: PWR_WAKE of instance: EPDC

0x5 : ALT5_GPIO7_IO13

Select mux mode: ALT5 mux port: IO13 of instance: GPIO7

0x6 : ALT6_CCM_EXT_CLK2

Select mux mode: ALT6 mux port: EXT_CLK2 of instance: CCM

0x7 : ALT7_CSU_ALARM_AUT1

Select mux mode: ALT7 mux port: CSU_ALARM_AUT1 of instance: CSU

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad ENET1_RX_CLK

End of enumeration elements list.

SW_MUX_CTL_PAD_ENET1_CRS

SW_MUX_CTL_PAD_ENET1_CRS SW MUX Control Register
address_offset : 0x264 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_ENET1_CRS

Select mux mode: ALT0 mux port: CRS of instance: ENET1

0x1 : ALT1_WDOG2_WDOG_RST_B_DEB

Select mux mode: ALT1 mux port: WDOG_RST_B_DEB of instance: WDOG2

0x2 : ALT2_SAI1_TX_SYNC

Select mux mode: ALT2 mux port: TX_SYNC of instance: SAI1

0x3 : ALT3_GPT2_CAPTURE1

Select mux mode: ALT3 mux port: CAPTURE1 of instance: GPT2

0x4 : ALT4_EPDC_PWR_CTRL0

Select mux mode: ALT4 mux port: PWR_CTRL0 of instance: EPDC

0x5 : ALT5_GPIO7_IO14

Select mux mode: ALT5 mux port: IO14 of instance: GPIO7

0x6 : ALT6_CCM_EXT_CLK3

Select mux mode: ALT6 mux port: EXT_CLK3 of instance: CCM

0x7 : ALT7_CSU_ALARM_AUT2

Select mux mode: ALT7 mux port: CSU_ALARM_AUT2 of instance: CSU

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad ENET1_CRS

End of enumeration elements list.

SW_MUX_CTL_PAD_ENET1_COL

SW_MUX_CTL_PAD_ENET1_COL SW MUX Control Register
address_offset : 0x268 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_ENET1_COL

Select mux mode: ALT0 mux port: COL of instance: ENET1

0x1 : ALT1_WDOG1_WDOG_ANY

Select mux mode: ALT1 mux port: WDOG_ANY of instance: WDOG1

0x2 : ALT2_SAI1_TX_DATA0

Select mux mode: ALT2 mux port: TX_DATA0 of instance: SAI1

0x3 : ALT3_GPT2_CAPTURE2

Select mux mode: ALT3 mux port: CAPTURE2 of instance: GPT2

0x4 : ALT4_EPDC_PWR_CTRL1

Select mux mode: ALT4 mux port: PWR_CTRL1 of instance: EPDC

0x5 : ALT5_GPIO7_IO15

Select mux mode: ALT5 mux port: IO15 of instance: GPIO7

0x6 : ALT6_CCM_EXT_CLK4

Select mux mode: ALT6 mux port: EXT_CLK4 of instance: CCM

0x7 : ALT7_CSU_INT_DEB

Select mux mode: ALT7 mux port: CSU_INT_DEB of instance: CSU

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad ENET1_COL

End of enumeration elements list.

SW_PAD_CTL_PAD_GPIO1_IO08

SW_PAD_CTL_PAD_GPIO1_IO08 SW PAD Control Register
address_offset : 0x26C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_GPIO1_IO09

SW_PAD_CTL_PAD_GPIO1_IO09 SW PAD Control Register
address_offset : 0x270 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_GPIO1_IO10

SW_PAD_CTL_PAD_GPIO1_IO10 SW PAD Control Register
address_offset : 0x274 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_GPIO1_IO11

SW_PAD_CTL_PAD_GPIO1_IO11 SW PAD Control Register
address_offset : 0x278 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_GPIO1_IO12

SW_PAD_CTL_PAD_GPIO1_IO12 SW PAD Control Register
address_offset : 0x27C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_MUX_CTL_PAD_GPIO1_IO13

SW_MUX_CTL_PAD_GPIO1_IO13 SW MUX Control Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_GPIO1_IO13

Select mux mode: ALT0 mux port: IO13 of instance: GPIO1

0x1 : ALT1_SD3_VSELECT

Select mux mode: ALT1 mux port: VSELECT of instance: SD3

0x2 : ALT2_CCM_ENET2_REF_CLK

Select mux mode: ALT2 mux port: ENET2_REF_CLK of instance: ENET2

0x3 : ALT3_FLEXCAN1_TX

Select mux mode: ALT3 mux port: TX of instance: FLEXCAN1

0x4 : ALT4_CCM_PMIC_READY

Select mux mode: ALT4 mux port: CCM_PMIC_READY of instance: CCM

0x5 : ALT5_CCM_EXT_CLK2

Select mux mode: ALT5 mux port: EXT_CLK2 of instance: CCM

0x6 : ALT6_SNVS_VIO_5_CTL

Select mux mode: ALT6 mux port: VIO_5_CTL of instance: SNVS

0x7 : ALT7_USB_OTG2_ID

Select mux mode: ALT7 mux port: OTG2_ID of instance: USB

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad GPIO1_IO13

End of enumeration elements list.

SW_PAD_CTL_PAD_GPIO1_IO13

SW_PAD_CTL_PAD_GPIO1_IO13 SW PAD Control Register
address_offset : 0x280 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_GPIO1_IO14

SW_PAD_CTL_PAD_GPIO1_IO14 SW PAD Control Register
address_offset : 0x284 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_GPIO1_IO15

SW_PAD_CTL_PAD_GPIO1_IO15 SW PAD Control Register
address_offset : 0x288 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_JTAG_MOD

SW_PAD_CTL_PAD_JTAG_MOD SW PAD Control Register
address_offset : 0x28C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-only

Enumeration:

0 : DSE

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-only

Enumeration:

0x1 : SRE

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_JTAG_TCK

SW_PAD_CTL_PAD_JTAG_TCK SW PAD Control Register
address_offset : 0x290 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-only

Enumeration:

0 : DSE

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-only

Enumeration:

0x1 : SRE

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_JTAG_TDI

SW_PAD_CTL_PAD_JTAG_TDI SW PAD Control Register
address_offset : 0x294 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-only

Enumeration:

0 : DSE

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-only

Enumeration:

0x1 : SRE

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_JTAG_TDO

SW_PAD_CTL_PAD_JTAG_TDO SW PAD Control Register
address_offset : 0x298 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-only

Enumeration:

0 : DSE

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-only

Enumeration:

0 : SRE

Fast Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_JTAG_TMS

SW_PAD_CTL_PAD_JTAG_TMS SW PAD Control Register
address_offset : 0x29C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-only

Enumeration:

0 : DSE

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-only

Enumeration:

0x1 : SRE

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_JTAG_TRST_B

SW_PAD_CTL_PAD_JTAG_TRST_B SW PAD Control Register
address_offset : 0x2A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-only

Enumeration:

0 : DSE

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-only

Enumeration:

0x1 : SRE

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_EPDC_DATA00

SW_PAD_CTL_PAD_EPDC_DATA00 SW PAD Control Register
address_offset : 0x2A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_EPDC_DATA01

SW_PAD_CTL_PAD_EPDC_DATA01 SW PAD Control Register
address_offset : 0x2A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_EPDC_DATA02

SW_PAD_CTL_PAD_EPDC_DATA02 SW PAD Control Register
address_offset : 0x2AC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_EPDC_DATA03

SW_PAD_CTL_PAD_EPDC_DATA03 SW PAD Control Register
address_offset : 0x2B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_EPDC_DATA04

SW_PAD_CTL_PAD_EPDC_DATA04 SW PAD Control Register
address_offset : 0x2B4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_EPDC_DATA05

SW_PAD_CTL_PAD_EPDC_DATA05 SW PAD Control Register
address_offset : 0x2B8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_EPDC_DATA06

SW_PAD_CTL_PAD_EPDC_DATA06 SW PAD Control Register
address_offset : 0x2BC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_MUX_CTL_PAD_GPIO1_IO14

SW_MUX_CTL_PAD_GPIO1_IO14 SW MUX Control Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_GPIO1_IO14

Select mux mode: ALT0 mux port: IO14 of instance: GPIO1

0x1 : ALT1_SD3_CD_B

Select mux mode: ALT1 mux port: CD_B of instance: SD3

0x2 : ALT2_ENET2_MDIO

Select mux mode: ALT2 mux port: MDIO of instance: ENET2

0x3 : ALT3_FLEXCAN2_RX

Select mux mode: ALT3 mux port: RX of instance: FLEXCAN2

0x4 : ALT4_WDOG3_WDOG_B

Select mux mode: ALT4 mux port: WDOG_B of instance: WDOG3

0x5 : ALT5_CCM_EXT_CLK3

Select mux mode: ALT5 mux port: EXT_CLK3 of instance: CCM

0x6 : ALT6_SDMA_EXT_EVENT0

Select mux mode: ALT6 mux port: EXT_EVENT0 of instance: SDMA

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad GPIO1_IO14

End of enumeration elements list.

SW_PAD_CTL_PAD_EPDC_DATA07

SW_PAD_CTL_PAD_EPDC_DATA07 SW PAD Control Register
address_offset : 0x2C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_EPDC_DATA08

SW_PAD_CTL_PAD_EPDC_DATA08 SW PAD Control Register
address_offset : 0x2C4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_EPDC_DATA09

SW_PAD_CTL_PAD_EPDC_DATA09 SW PAD Control Register
address_offset : 0x2C8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_EPDC_DATA10

SW_PAD_CTL_PAD_EPDC_DATA10 SW PAD Control Register
address_offset : 0x2CC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_EPDC_DATA11

SW_PAD_CTL_PAD_EPDC_DATA11 SW PAD Control Register
address_offset : 0x2D0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_EPDC_DATA12

SW_PAD_CTL_PAD_EPDC_DATA12 SW PAD Control Register
address_offset : 0x2D4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_EPDC_DATA13

SW_PAD_CTL_PAD_EPDC_DATA13 SW PAD Control Register
address_offset : 0x2D8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_EPDC_DATA14

SW_PAD_CTL_PAD_EPDC_DATA14 SW PAD Control Register
address_offset : 0x2DC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_EPDC_DATA15

SW_PAD_CTL_PAD_EPDC_DATA15 SW PAD Control Register
address_offset : 0x2E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_EPDC_SDCLK

SW_PAD_CTL_PAD_EPDC_SDCLK SW PAD Control Register
address_offset : 0x2E4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_EPDC_SDLE

SW_PAD_CTL_PAD_EPDC_SDLE SW PAD Control Register
address_offset : 0x2E8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_EPDC_SDOE

SW_PAD_CTL_PAD_EPDC_SDOE SW PAD Control Register
address_offset : 0x2EC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_EPDC_SDSHR

SW_PAD_CTL_PAD_EPDC_SDSHR SW PAD Control Register
address_offset : 0x2F0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_EPDC_SDCE0

SW_PAD_CTL_PAD_EPDC_SDCE0 SW PAD Control Register
address_offset : 0x2F4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_EPDC_SDCE1

SW_PAD_CTL_PAD_EPDC_SDCE1 SW PAD Control Register
address_offset : 0x2F8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_EPDC_SDCE2

SW_PAD_CTL_PAD_EPDC_SDCE2 SW PAD Control Register
address_offset : 0x2FC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_MUX_CTL_PAD_GPIO1_IO15

SW_MUX_CTL_PAD_GPIO1_IO15 SW MUX Control Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_GPIO1_IO15

Select mux mode: ALT0 mux port: IO15 of instance: GPIO1

0x1 : ALT1_SD3_WP

Select mux mode: ALT1 mux port: WP of instance: SD3

0x2 : ALT2_ENET2_MDC

Select mux mode: ALT2 mux port: MDC of instance: ENET2

0x3 : ALT3_FLEXCAN2_TX

Select mux mode: ALT3 mux port: TX of instance: FLEXCAN2

0x4 : ALT4_WDOG4_WDOG_B

Select mux mode: ALT4 mux port: WDOG_B of instance: WDOG4

0x5 : ALT5_CCM_EXT_CLK4

Select mux mode: ALT5 mux port: EXT_CLK4 of instance: CCM

0x6 : ALT6_SDMA_EXT_EVENT1

Select mux mode: ALT6 mux port: EXT_EVENT1 of instance: SDMA

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad GPIO1_IO15

End of enumeration elements list.

SW_PAD_CTL_PAD_EPDC_SDCE3

SW_PAD_CTL_PAD_EPDC_SDCE3 SW PAD Control Register
address_offset : 0x300 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_EPDC_GDCLK

SW_PAD_CTL_PAD_EPDC_GDCLK SW PAD Control Register
address_offset : 0x304 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_EPDC_GDOE

SW_PAD_CTL_PAD_EPDC_GDOE SW PAD Control Register
address_offset : 0x308 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_EPDC_GDRL

SW_PAD_CTL_PAD_EPDC_GDRL SW PAD Control Register
address_offset : 0x30C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_EPDC_GDSP

SW_PAD_CTL_PAD_EPDC_GDSP SW PAD Control Register
address_offset : 0x310 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_EPDC_BDR0

SW_PAD_CTL_PAD_EPDC_BDR0 SW PAD Control Register
address_offset : 0x314 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_EPDC_BDR1

SW_PAD_CTL_PAD_EPDC_BDR1 SW PAD Control Register
address_offset : 0x318 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_EPDC_PWR_COM

SW_PAD_CTL_PAD_EPDC_PWR_COM SW PAD Control Register
address_offset : 0x31C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_EPDC_PWR_STAT

SW_PAD_CTL_PAD_EPDC_PWR_STAT SW PAD Control Register
address_offset : 0x320 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_LCD_CLK

SW_PAD_CTL_PAD_LCD_CLK SW PAD Control Register
address_offset : 0x324 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_LCD_ENABLE

SW_PAD_CTL_PAD_LCD_ENABLE SW PAD Control Register
address_offset : 0x328 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_LCD_HSYNC

SW_PAD_CTL_PAD_LCD_HSYNC SW PAD Control Register
address_offset : 0x32C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_LCD_VSYNC

SW_PAD_CTL_PAD_LCD_VSYNC SW PAD Control Register
address_offset : 0x330 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_LCD_RESET

SW_PAD_CTL_PAD_LCD_RESET SW PAD Control Register
address_offset : 0x334 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_LCD_DATA00

SW_PAD_CTL_PAD_LCD_DATA00 SW PAD Control Register
address_offset : 0x338 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_LCD_DATA01

SW_PAD_CTL_PAD_LCD_DATA01 SW PAD Control Register
address_offset : 0x33C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_MUX_CTL_PAD_EPDC_DATA00

SW_MUX_CTL_PAD_EPDC_DATA00 SW MUX Control Register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_EPDC_DATA0

Select mux mode: ALT0 mux port: DATA0 of instance: EPDC

0x1 : ALT1_SIM1_PORT2_TRXD

Select mux mode: ALT1 mux port: PORT2_TRXD of instance: SIM1

0x2 : ALT2_QSPI_A_DATA0

Select mux mode: ALT2 mux port: A_DATA0 of instance: QSPI

0x3 : ALT3_KPP_ROW3

Select mux mode: ALT3 mux port: ROW3 of instance: KPP

0x4 : ALT4_EIM_AD0

Select mux mode: ALT4 mux port: AD0 of instance: EIM

0x5 : ALT5_GPIO2_IO0

Select mux mode: ALT5 mux port: IO0 of instance: GPIO2

0x6 : ALT6_LCD_DATA0

Select mux mode: ALT6 mux port: DATA0 of instance: LCD

0x7 : ALT7_LCD_CLK

Select mux mode: ALT7 mux port: CLK of instance: LCD

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad EPDC_DATA00

End of enumeration elements list.

SW_PAD_CTL_PAD_LCD_DATA02

SW_PAD_CTL_PAD_LCD_DATA02 SW PAD Control Register
address_offset : 0x340 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_LCD_DATA03

SW_PAD_CTL_PAD_LCD_DATA03 SW PAD Control Register
address_offset : 0x344 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_LCD_DATA04

SW_PAD_CTL_PAD_LCD_DATA04 SW PAD Control Register
address_offset : 0x348 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_LCD_DATA05

SW_PAD_CTL_PAD_LCD_DATA05 SW PAD Control Register
address_offset : 0x34C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_LCD_DATA06

SW_PAD_CTL_PAD_LCD_DATA06 SW PAD Control Register
address_offset : 0x350 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_LCD_DATA07

SW_PAD_CTL_PAD_LCD_DATA07 SW PAD Control Register
address_offset : 0x354 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_LCD_DATA08

SW_PAD_CTL_PAD_LCD_DATA08 SW PAD Control Register
address_offset : 0x358 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_LCD_DATA09

SW_PAD_CTL_PAD_LCD_DATA09 SW PAD Control Register
address_offset : 0x35C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_LCD_DATA10

SW_PAD_CTL_PAD_LCD_DATA10 SW PAD Control Register
address_offset : 0x360 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_LCD_DATA11

SW_PAD_CTL_PAD_LCD_DATA11 SW PAD Control Register
address_offset : 0x364 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_LCD_DATA12

SW_PAD_CTL_PAD_LCD_DATA12 SW PAD Control Register
address_offset : 0x368 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_LCD_DATA13

SW_PAD_CTL_PAD_LCD_DATA13 SW PAD Control Register
address_offset : 0x36C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_LCD_DATA14

SW_PAD_CTL_PAD_LCD_DATA14 SW PAD Control Register
address_offset : 0x370 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_LCD_DATA15

SW_PAD_CTL_PAD_LCD_DATA15 SW PAD Control Register
address_offset : 0x374 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_LCD_DATA16

SW_PAD_CTL_PAD_LCD_DATA16 SW PAD Control Register
address_offset : 0x378 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_LCD_DATA17

SW_PAD_CTL_PAD_LCD_DATA17 SW PAD Control Register
address_offset : 0x37C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_MUX_CTL_PAD_EPDC_DATA01

SW_MUX_CTL_PAD_EPDC_DATA01 SW MUX Control Register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_EPDC_DATA1

Select mux mode: ALT0 mux port: DATA1 of instance: EPDC

0x1 : ALT1_SIM1_PORT2_CLK

Select mux mode: ALT1 mux port: PORT2_CLK of instance: SIM1

0x2 : ALT2_QSPI_A_DATA1

Select mux mode: ALT2 mux port: A_DATA1 of instance: QSPI

0x3 : ALT3_KPP_COL3

Select mux mode: ALT3 mux port: COL3 of instance: KPP

0x4 : ALT4_EIM_AD1

Select mux mode: ALT4 mux port: AD1 of instance: EIM

0x5 : ALT5_GPIO2_IO1

Select mux mode: ALT5 mux port: IO1 of instance: GPIO2

0x6 : ALT6_LCD_DATA1

Select mux mode: ALT6 mux port: DATA1 of instance: LCD

0x7 : ALT7_LCD_ENABLE

Select mux mode: ALT7 mux port: ENABLE of instance: LCD

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad EPDC_DATA01

End of enumeration elements list.

SW_PAD_CTL_PAD_LCD_DATA18

SW_PAD_CTL_PAD_LCD_DATA18 SW PAD Control Register
address_offset : 0x380 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_LCD_DATA19

SW_PAD_CTL_PAD_LCD_DATA19 SW PAD Control Register
address_offset : 0x384 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_LCD_DATA20

SW_PAD_CTL_PAD_LCD_DATA20 SW PAD Control Register
address_offset : 0x388 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_LCD_DATA21

SW_PAD_CTL_PAD_LCD_DATA21 SW PAD Control Register
address_offset : 0x38C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_LCD_DATA22

SW_PAD_CTL_PAD_LCD_DATA22 SW PAD Control Register
address_offset : 0x390 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_LCD_DATA23

SW_PAD_CTL_PAD_LCD_DATA23 SW PAD Control Register
address_offset : 0x394 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_UART1_RX_DATA

SW_PAD_CTL_PAD_UART1_RX_DATA SW PAD Control Register
address_offset : 0x398 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_UART1_TX_DATA

SW_PAD_CTL_PAD_UART1_TX_DATA SW PAD Control Register
address_offset : 0x39C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_UART2_RX_DATA

SW_PAD_CTL_PAD_UART2_RX_DATA SW PAD Control Register
address_offset : 0x3A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_UART2_TX_DATA

SW_PAD_CTL_PAD_UART2_TX_DATA SW PAD Control Register
address_offset : 0x3A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_UART3_RX_DATA

SW_PAD_CTL_PAD_UART3_RX_DATA SW PAD Control Register
address_offset : 0x3A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_UART3_TX_DATA

SW_PAD_CTL_PAD_UART3_TX_DATA SW PAD Control Register
address_offset : 0x3AC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_UART3_RTS_B

SW_PAD_CTL_PAD_UART3_RTS_B SW PAD Control Register
address_offset : 0x3B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_UART3_CTS_B

SW_PAD_CTL_PAD_UART3_CTS_B SW PAD Control Register
address_offset : 0x3B4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_I2C1_SCL

SW_PAD_CTL_PAD_I2C1_SCL SW PAD Control Register
address_offset : 0x3B8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_I2C1_SDA

SW_PAD_CTL_PAD_I2C1_SDA SW PAD Control Register
address_offset : 0x3BC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_MUX_CTL_PAD_EPDC_DATA02

SW_MUX_CTL_PAD_EPDC_DATA02 SW MUX Control Register
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_EPDC_DATA2

Select mux mode: ALT0 mux port: DATA2 of instance: EPDC

0x1 : ALT1_SIM1_PORT2_RST_B

Select mux mode: ALT1 mux port: PORT2_RST_B of instance: SIM1

0x2 : ALT2_QSPI_A_DATA2

Select mux mode: ALT2 mux port: A_DATA2 of instance: QSPI

0x3 : ALT3_KPP_ROW2

Select mux mode: ALT3 mux port: ROW2 of instance: KPP

0x4 : ALT4_EIM_AD2

Select mux mode: ALT4 mux port: AD2 of instance: EIM

0x5 : ALT5_GPIO2_IO2

Select mux mode: ALT5 mux port: IO2 of instance: GPIO2

0x6 : ALT6_LCD_DATA2

Select mux mode: ALT6 mux port: DATA2 of instance: LCD

0x7 : ALT7_LCD_VSYNC

Select mux mode: ALT7 mux port: VSYNC of instance: LCD

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad EPDC_DATA02

End of enumeration elements list.

SW_PAD_CTL_PAD_I2C2_SCL

SW_PAD_CTL_PAD_I2C2_SCL SW PAD Control Register
address_offset : 0x3C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_I2C2_SDA

SW_PAD_CTL_PAD_I2C2_SDA SW PAD Control Register
address_offset : 0x3C4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_I2C3_SCL

SW_PAD_CTL_PAD_I2C3_SCL SW PAD Control Register
address_offset : 0x3C8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_I2C3_SDA

SW_PAD_CTL_PAD_I2C3_SDA SW PAD Control Register
address_offset : 0x3CC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_I2C4_SCL

SW_PAD_CTL_PAD_I2C4_SCL SW PAD Control Register
address_offset : 0x3D0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_I2C4_SDA

SW_PAD_CTL_PAD_I2C4_SDA SW PAD Control Register
address_offset : 0x3D4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_ECSPI1_SCLK

SW_PAD_CTL_PAD_ECSPI1_SCLK SW PAD Control Register
address_offset : 0x3D8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_ECSPI1_MOSI

SW_PAD_CTL_PAD_ECSPI1_MOSI SW PAD Control Register
address_offset : 0x3DC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_ECSPI1_MISO

SW_PAD_CTL_PAD_ECSPI1_MISO SW PAD Control Register
address_offset : 0x3E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_ECSPI1_SS0

SW_PAD_CTL_PAD_ECSPI1_SS0 SW PAD Control Register
address_offset : 0x3E4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_ECSPI2_SCLK

SW_PAD_CTL_PAD_ECSPI2_SCLK SW PAD Control Register
address_offset : 0x3E8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_ECSPI2_MOSI

SW_PAD_CTL_PAD_ECSPI2_MOSI SW PAD Control Register
address_offset : 0x3EC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_ECSPI2_MISO

SW_PAD_CTL_PAD_ECSPI2_MISO SW PAD Control Register
address_offset : 0x3F0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_ECSPI2_SS0

SW_PAD_CTL_PAD_ECSPI2_SS0 SW PAD Control Register
address_offset : 0x3F4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SD1_CD_B

SW_PAD_CTL_PAD_SD1_CD_B SW PAD Control Register
address_offset : 0x3F8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SD1_WP

SW_PAD_CTL_PAD_SD1_WP SW PAD Control Register
address_offset : 0x3FC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_MUX_CTL_PAD_EPDC_DATA03

SW_MUX_CTL_PAD_EPDC_DATA03 SW MUX Control Register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_EPDC_DATA3

Select mux mode: ALT0 mux port: DATA3 of instance: EPDC

0x1 : ALT1_SIM1_PORT2_SVEN

Select mux mode: ALT1 mux port: PORT2_SVEN of instance: SIM1

0x2 : ALT2_QSPI_A_DATA3

Select mux mode: ALT2 mux port: A_DATA3 of instance: QSPI

0x3 : ALT3_KPP_COL2

Select mux mode: ALT3 mux port: COL2 of instance: KPP

0x4 : ALT4_EIM_AD3

Select mux mode: ALT4 mux port: AD3 of instance: EIM

0x5 : ALT5_GPIO2_IO3

Select mux mode: ALT5 mux port: IO3 of instance: GPIO2

0x6 : ALT6_LCD_DATA3

Select mux mode: ALT6 mux port: DATA3 of instance: LCD

0x7 : ALT7_LCD_HSYNC

Select mux mode: ALT7 mux port: HSYNC of instance: LCD

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad EPDC_DATA03

End of enumeration elements list.

SW_PAD_CTL_PAD_SD1_RESET_B

SW_PAD_CTL_PAD_SD1_RESET_B SW PAD Control Register
address_offset : 0x400 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SD1_CLK

SW_PAD_CTL_PAD_SD1_CLK SW PAD Control Register
address_offset : 0x404 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SD1_CMD

SW_PAD_CTL_PAD_SD1_CMD SW PAD Control Register
address_offset : 0x408 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SD1_DATA0

SW_PAD_CTL_PAD_SD1_DATA0 SW PAD Control Register
address_offset : 0x40C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SD1_DATA1

SW_PAD_CTL_PAD_SD1_DATA1 SW PAD Control Register
address_offset : 0x410 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SD1_DATA2

SW_PAD_CTL_PAD_SD1_DATA2 SW PAD Control Register
address_offset : 0x414 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SD1_DATA3

SW_PAD_CTL_PAD_SD1_DATA3 SW PAD Control Register
address_offset : 0x418 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SD2_CD_B

SW_PAD_CTL_PAD_SD2_CD_B SW PAD Control Register
address_offset : 0x41C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SD2_WP

SW_PAD_CTL_PAD_SD2_WP SW PAD Control Register
address_offset : 0x420 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SD2_RESET_B

SW_PAD_CTL_PAD_SD2_RESET_B SW PAD Control Register
address_offset : 0x424 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SD2_CLK

SW_PAD_CTL_PAD_SD2_CLK SW PAD Control Register
address_offset : 0x428 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SD2_CMD

SW_PAD_CTL_PAD_SD2_CMD SW PAD Control Register
address_offset : 0x42C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SD2_DATA0

SW_PAD_CTL_PAD_SD2_DATA0 SW PAD Control Register
address_offset : 0x430 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SD2_DATA1

SW_PAD_CTL_PAD_SD2_DATA1 SW PAD Control Register
address_offset : 0x434 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SD2_DATA2

SW_PAD_CTL_PAD_SD2_DATA2 SW PAD Control Register
address_offset : 0x438 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SD2_DATA3

SW_PAD_CTL_PAD_SD2_DATA3 SW PAD Control Register
address_offset : 0x43C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_MUX_CTL_PAD_EPDC_DATA04

SW_MUX_CTL_PAD_EPDC_DATA04 SW MUX Control Register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_EPDC_DATA4

Select mux mode: ALT0 mux port: DATA4 of instance: EPDC

0x1 : ALT1_SIM1_PORT2_PD

Select mux mode: ALT1 mux port: PORT2_PD of instance: SIM1

0x2 : ALT2_QSPI_A_DQS

Select mux mode: ALT2 mux port: A_DQS of instance: QSPI

0x3 : ALT3_KPP_ROW1

Select mux mode: ALT3 mux port: ROW1 of instance: KPP

0x4 : ALT4_EIM_AD4

Select mux mode: ALT4 mux port: AD4 of instance: EIM

0x5 : ALT5_GPIO2_IO4

Select mux mode: ALT5 mux port: IO4 of instance: GPIO2

0x6 : ALT6_LCD_DATA4

Select mux mode: ALT6 mux port: DATA4 of instance: LCD

0x7 : ALT7_JTAG_FAIL

Select mux mode: ALT7 mux port: FAIL of instance: JTAG

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad EPDC_DATA04

End of enumeration elements list.

SW_PAD_CTL_PAD_SD3_CLK

SW_PAD_CTL_PAD_SD3_CLK SW PAD Control Register
address_offset : 0x440 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SD3_CMD

SW_PAD_CTL_PAD_SD3_CMD SW PAD Control Register
address_offset : 0x444 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SD3_DATA0

SW_PAD_CTL_PAD_SD3_DATA0 SW PAD Control Register
address_offset : 0x448 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SD3_DATA1

SW_PAD_CTL_PAD_SD3_DATA1 SW PAD Control Register
address_offset : 0x44C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SD3_DATA2

SW_PAD_CTL_PAD_SD3_DATA2 SW PAD Control Register
address_offset : 0x450 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SD3_DATA3

SW_PAD_CTL_PAD_SD3_DATA3 SW PAD Control Register
address_offset : 0x454 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SD3_DATA4

SW_PAD_CTL_PAD_SD3_DATA4 SW PAD Control Register
address_offset : 0x458 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SD3_DATA5

SW_PAD_CTL_PAD_SD3_DATA5 SW PAD Control Register
address_offset : 0x45C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SD3_DATA6

SW_PAD_CTL_PAD_SD3_DATA6 SW PAD Control Register
address_offset : 0x460 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SD3_DATA7

SW_PAD_CTL_PAD_SD3_DATA7 SW PAD Control Register
address_offset : 0x464 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SD3_STROBE

SW_PAD_CTL_PAD_SD3_STROBE SW PAD Control Register
address_offset : 0x468 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SD3_RESET_B

SW_PAD_CTL_PAD_SD3_RESET_B SW PAD Control Register
address_offset : 0x46C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SAI1_RX_DATA

SW_PAD_CTL_PAD_SAI1_RX_DATA SW PAD Control Register
address_offset : 0x470 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SAI1_TX_BCLK

SW_PAD_CTL_PAD_SAI1_TX_BCLK SW PAD Control Register
address_offset : 0x474 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SAI1_TX_SYNC

SW_PAD_CTL_PAD_SAI1_TX_SYNC SW PAD Control Register
address_offset : 0x478 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SAI1_TX_DATA

SW_PAD_CTL_PAD_SAI1_TX_DATA SW PAD Control Register
address_offset : 0x47C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_MUX_CTL_PAD_EPDC_DATA05

SW_MUX_CTL_PAD_EPDC_DATA05 SW MUX Control Register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_EPDC_DATA5

Select mux mode: ALT0 mux port: DATA5 of instance: EPDC

0x1 : ALT1_SIM2_PORT2_TRXD

Select mux mode: ALT1 mux port: PORT2_TRXD of instance: SIM2

0x2 : ALT2_QSPI_A_SCLK

Select mux mode: ALT2 mux port: A_SCLK of instance: QSPI

0x3 : ALT3_KPP_COL1

Select mux mode: ALT3 mux port: COL1 of instance: KPP

0x4 : ALT4_EIM_AD5

Select mux mode: ALT4 mux port: AD5 of instance: EIM

0x5 : ALT5_GPIO2_IO5

Select mux mode: ALT5 mux port: IO5 of instance: GPIO2

0x6 : ALT6_LCD_DATA5

Select mux mode: ALT6 mux port: DATA5 of instance: LCD

0x7 : ALT7_JTAG_ACTIVE

Select mux mode: ALT7 mux port: ACTIVE of instance: JTAG

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad EPDC_DATA05

End of enumeration elements list.

SW_PAD_CTL_PAD_SAI1_RX_SYNC

SW_PAD_CTL_PAD_SAI1_RX_SYNC SW PAD Control Register
address_offset : 0x480 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SAI1_RX_BCLK

SW_PAD_CTL_PAD_SAI1_RX_BCLK SW PAD Control Register
address_offset : 0x484 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SAI1_MCLK

SW_PAD_CTL_PAD_SAI1_MCLK SW PAD Control Register
address_offset : 0x488 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SAI2_TX_SYNC

SW_PAD_CTL_PAD_SAI2_TX_SYNC SW PAD Control Register
address_offset : 0x48C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SAI2_TX_BCLK

SW_PAD_CTL_PAD_SAI2_TX_BCLK SW PAD Control Register
address_offset : 0x490 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SAI2_RX_DATA

SW_PAD_CTL_PAD_SAI2_RX_DATA SW PAD Control Register
address_offset : 0x494 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_SAI2_TX_DATA

SW_PAD_CTL_PAD_SAI2_TX_DATA SW PAD Control Register
address_offset : 0x498 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_ENET1_RGMII_RD0

SW_PAD_CTL_PAD_ENET1_RGMII_RD0 SW PAD Control Register
address_offset : 0x49C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_ENET1_RGMII_RD1

SW_PAD_CTL_PAD_ENET1_RGMII_RD1 SW PAD Control Register
address_offset : 0x4A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_ENET1_RGMII_RD2

SW_PAD_CTL_PAD_ENET1_RGMII_RD2 SW PAD Control Register
address_offset : 0x4A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_ENET1_RGMII_RD3

SW_PAD_CTL_PAD_ENET1_RGMII_RD3 SW PAD Control Register
address_offset : 0x4A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_ENET1_RGMII_RX_CTL

SW_PAD_CTL_PAD_ENET1_RGMII_RX_CTL SW PAD Control Register
address_offset : 0x4AC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_ENET1_RGMII_RXC

SW_PAD_CTL_PAD_ENET1_RGMII_RXC SW PAD Control Register
address_offset : 0x4B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_ENET1_RGMII_TD0

SW_PAD_CTL_PAD_ENET1_RGMII_TD0 SW PAD Control Register
address_offset : 0x4B4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_ENET1_RGMII_TD1

SW_PAD_CTL_PAD_ENET1_RGMII_TD1 SW PAD Control Register
address_offset : 0x4B8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_ENET1_RGMII_TD2

SW_PAD_CTL_PAD_ENET1_RGMII_TD2 SW PAD Control Register
address_offset : 0x4BC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_MUX_CTL_PAD_EPDC_DATA06

SW_MUX_CTL_PAD_EPDC_DATA06 SW MUX Control Register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_EPDC_DATA6

Select mux mode: ALT0 mux port: DATA6 of instance: EPDC

0x1 : ALT1_SIM2_PORT2_CLK

Select mux mode: ALT1 mux port: PORT2_CLK of instance: SIM2

0x2 : ALT2_QSPI_A_SS0_B

Select mux mode: ALT2 mux port: A_SS0_B of instance: QSPI

0x3 : ALT3_KPP_ROW0

Select mux mode: ALT3 mux port: ROW0 of instance: KPP

0x4 : ALT4_EIM_AD6

Select mux mode: ALT4 mux port: AD6 of instance: EIM

0x5 : ALT5_GPIO2_IO6

Select mux mode: ALT5 mux port: IO6 of instance: GPIO2

0x6 : ALT6_LCD_DATA6

Select mux mode: ALT6 mux port: DATA6 of instance: LCD

0x7 : ALT7_JTAG_DE_B

Select mux mode: ALT7 mux port: DE_B of instance: JTAG

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad EPDC_DATA06

End of enumeration elements list.

SW_PAD_CTL_PAD_ENET1_RGMII_TD3

SW_PAD_CTL_PAD_ENET1_RGMII_TD3 SW PAD Control Register
address_offset : 0x4C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_ENET1_RGMII_TX_CTL

SW_PAD_CTL_PAD_ENET1_RGMII_TX_CTL SW PAD Control Register
address_offset : 0x4C4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_ENET1_RGMII_TXC

SW_PAD_CTL_PAD_ENET1_RGMII_TXC SW PAD Control Register
address_offset : 0x4C8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_ENET1_TX_CLK

SW_PAD_CTL_PAD_ENET1_TX_CLK SW PAD Control Register
address_offset : 0x4CC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_ENET1_RX_CLK

SW_PAD_CTL_PAD_ENET1_RX_CLK SW PAD Control Register
address_offset : 0x4D0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_ENET1_CRS

SW_PAD_CTL_PAD_ENET1_CRS SW PAD Control Register
address_offset : 0x4D4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

SW_PAD_CTL_PAD_ENET1_COL

SW_PAD_CTL_PAD_ENET1_COL SW PAD Control Register
address_offset : 0x4D8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DSE : Drive Strength Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DSE_0_X1

0x1 : DSE_1_X4

0x2 : DSE_2_X2

0x3 : DSE_3_X6

End of enumeration elements list.

SRE : Slew Rate Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Fast_Slew_Rate

Fast Slew Rate

0x1 : SRE_1_Slow_Slew_Rate

Slow Slew Rate

End of enumeration elements list.

HYS : Hyst. Enable Field
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

0 : HYS_0_Hysteresis_Disabled

Hysteresis Disabled

0x1 : HYS_1_Hysteresis_Enabled

Hysteresis Enabled

End of enumeration elements list.

PE : Pull Enable Field
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : PE_0_Pull_Disabled

Pull Disabled

0x1 : PE_1_Pull_Enabled

Pull Enabled

End of enumeration elements list.

PS : Pull Select Field
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

0 : PS_0_100K_PD

100K PD

0x1 : PS_1_5K_PU

5K PU

0x2 : PS_2_47K_PU

47K PU

0x3 : PS_3_100K_PU

100K PU

End of enumeration elements list.

FLEXCAN1_RX_SELECT_INPUT

FLEXCAN1_RX_SELECT_INPUT DAISY Register
address_offset : 0x4DC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : GPIO1_IO12_ALT3

Selecting Pad: GPIO1_IO12 Mode: ALT3 for FLEXCAN1_RX

0x1 : I2C1_SCL_ALT2

Selecting Pad: I2C1_SCL Mode: ALT2 for FLEXCAN1_RX

0x2 : SD3_DATA7_ALT4

Selecting Pad: SD3_DATA7 Mode: ALT4 for FLEXCAN1_RX

0x3 : SAI1_RX_DATA_ALT3

Selecting Pad: SAI1_RX_DATA Mode: ALT3 for FLEXCAN1_RX

0x4 : ENET1_RGMII_RD2_ALT1

Selecting Pad: ENET1_RGMII_RD2 Mode: ALT1 for FLEXCAN1_RX

End of enumeration elements list.

FLEXCAN2_RX_SELECT_INPUT

FLEXCAN2_RX_SELECT_INPUT DAISY Register
address_offset : 0x4E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : GPIO1_IO14_ALT3

Selecting Pad: GPIO1_IO14 Mode: ALT3 for FLEXCAN2_RX

0x1 : I2C3_SCL_ALT2

Selecting Pad: I2C3_SCL Mode: ALT2 for FLEXCAN2_RX

0x2 : SD3_DATA4_ALT4

Selecting Pad: SD3_DATA4 Mode: ALT4 for FLEXCAN2_RX

0x3 : SAI1_TX_SYNC_ALT3

Selecting Pad: SAI1_TX_SYNC Mode: ALT3 for FLEXCAN2_RX

0x4 : ENET1_RGMII_TD2_ALT1

Selecting Pad: ENET1_RGMII_TD2 Mode: ALT1 for FLEXCAN2_RX

End of enumeration elements list.

CCM_EXT_CLK_1_SELECT_INPUT

CCM_EXT_CLK_1_SELECT_INPUT DAISY Register
address_offset : 0x4E4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : GPIO1_IO12_ALT5

Selecting Pad: GPIO1_IO12 Mode: ALT5 for CCM_EXT_CLK_1

0x1 : SD1_DATA0_ALT6

Selecting Pad: SD1_DATA0 Mode: ALT6 for CCM_EXT_CLK_1

0x2 : ENET1_TX_CLK_ALT6

Selecting Pad: ENET1_TX_CLK Mode: ALT6 for CCM_EXT_CLK_1

End of enumeration elements list.

CCM_EXT_CLK_2_SELECT_INPUT

CCM_EXT_CLK_2_SELECT_INPUT DAISY Register
address_offset : 0x4E8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : GPIO1_IO13_ALT5

Selecting Pad: GPIO1_IO13 Mode: ALT5 for CCM_EXT_CLK_2

0x1 : SD1_DATA1_ALT6

Selecting Pad: SD1_DATA1 Mode: ALT6 for CCM_EXT_CLK_2

0x2 : ENET1_RX_CLK_ALT6

Selecting Pad: ENET1_RX_CLK Mode: ALT6 for CCM_EXT_CLK_2

End of enumeration elements list.

CCM_EXT_CLK_3_SELECT_INPUT

CCM_EXT_CLK_3_SELECT_INPUT DAISY Register
address_offset : 0x4EC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : GPIO1_IO14_ALT5

Selecting Pad: GPIO1_IO14 Mode: ALT5 for CCM_EXT_CLK_3

0x1 : SD1_DATA2_ALT6

Selecting Pad: SD1_DATA2 Mode: ALT6 for CCM_EXT_CLK_3

0x2 : ENET1_CRS_ALT6

Selecting Pad: ENET1_CRS Mode: ALT6 for CCM_EXT_CLK_3

End of enumeration elements list.

CCM_EXT_CLK_4_SELECT_INPUT

CCM_EXT_CLK_4_SELECT_INPUT DAISY Register
address_offset : 0x4F0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : GPIO1_IO15_ALT5

Selecting Pad: GPIO1_IO15 Mode: ALT5 for CCM_EXT_CLK_4

0x1 : SD1_DATA3_ALT6

Selecting Pad: SD1_DATA3 Mode: ALT6 for CCM_EXT_CLK_4

0x2 : ENET1_COL_ALT6

Selecting Pad: ENET1_COL Mode: ALT6 for CCM_EXT_CLK_4

End of enumeration elements list.

CCM_PMIC_READY_SELECT_INPUT

CCM_PMIC_READY_SELECT_INPUT DAISY Register
address_offset : 0x4F4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : GPIO1_IO09_ALT5

Selecting Pad: GPIO1_IO09 Mode: ALT5 for CCM_PMIC_READY

0x1 : GPIO1_IO13_ALT4

Selecting Pad: GPIO1_IO13 Mode: ALT4 for CCM_PMIC_READY

0x2 : UART1_RX_DATA_ALT2

Selecting Pad: UART1_RX_DATA Mode: ALT2 for CCM_PMIC_READY

0x3 : SAI1_MCLK_ALT3

Selecting Pad: SAI1_MCLK Mode: ALT3 for CCM_PMIC_READY

End of enumeration elements list.

CSI_DATA2_SELECT_INPUT

CSI_DATA2_SELECT_INPUT DAISY Register
address_offset : 0x4F8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : LCD_DATA15_ALT3

Selecting Pad: LCD_DATA15 Mode: ALT3 for CSI_DATA2

0x1 : ECSPI1_SCLK_ALT3

Selecting Pad: ECSPI1_SCLK Mode: ALT3 for CSI_DATA2

End of enumeration elements list.

CSI_DATA3_SELECT_INPUT

CSI_DATA3_SELECT_INPUT DAISY Register
address_offset : 0x4FC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : LCD_DATA14_ALT3

Selecting Pad: LCD_DATA14 Mode: ALT3 for CSI_DATA3

0x1 : ECSPI1_MOSI_ALT3

Selecting Pad: ECSPI1_MOSI Mode: ALT3 for CSI_DATA3

End of enumeration elements list.

SW_MUX_CTL_PAD_EPDC_DATA07

SW_MUX_CTL_PAD_EPDC_DATA07 SW MUX Control Register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_EPDC_DATA7

Select mux mode: ALT0 mux port: DATA7 of instance: EPDC

0x1 : ALT1_SIM2_PORT2_RST_B

Select mux mode: ALT1 mux port: PORT2_RST_B of instance: SIM2

0x2 : ALT2_QSPI_A_SS1_B

Select mux mode: ALT2 mux port: A_SS1_B of instance: QSPI

0x3 : ALT3_KPP_COL0

Select mux mode: ALT3 mux port: COL0 of instance: KPP

0x4 : ALT4_EIM_AD7

Select mux mode: ALT4 mux port: AD7 of instance: EIM

0x5 : ALT5_GPIO2_IO7

Select mux mode: ALT5 mux port: IO7 of instance: GPIO2

0x6 : ALT6_LCD_DATA7

Select mux mode: ALT6 mux port: DATA7 of instance: LCD

0x7 : ALT7_JTAG_DONE

Select mux mode: ALT7 mux port: DONE of instance: JTAG

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad EPDC_DATA07

End of enumeration elements list.

CSI_DATA4_SELECT_INPUT

CSI_DATA4_SELECT_INPUT DAISY Register
address_offset : 0x500 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : LCD_DATA13_ALT3

Selecting Pad: LCD_DATA13 Mode: ALT3 for CSI_DATA4

0x1 : ECSPI1_MISO_ALT3

Selecting Pad: ECSPI1_MISO Mode: ALT3 for CSI_DATA4

End of enumeration elements list.

CSI_DATA5_SELECT_INPUT

CSI_DATA5_SELECT_INPUT DAISY Register
address_offset : 0x504 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : LCD_DATA12_ALT3

Selecting Pad: LCD_DATA12 Mode: ALT3 for CSI_DATA5

0x1 : ECSPI1_SS0_ALT3

Selecting Pad: ECSPI1_SS0 Mode: ALT3 for CSI_DATA5

End of enumeration elements list.

CSI_DATA6_SELECT_INPUT

CSI_DATA6_SELECT_INPUT DAISY Register
address_offset : 0x508 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : LCD_DATA11_ALT3

Selecting Pad: LCD_DATA11 Mode: ALT3 for CSI_DATA6

0x1 : ECSPI2_SCLK_ALT3

Selecting Pad: ECSPI2_SCLK Mode: ALT3 for CSI_DATA6

End of enumeration elements list.

CSI_DATA7_SELECT_INPUT

CSI_DATA7_SELECT_INPUT DAISY Register
address_offset : 0x50C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : LCD_DATA10_ALT3

Selecting Pad: LCD_DATA10 Mode: ALT3 for CSI_DATA7

0x1 : ECSPI2_MOSI_ALT3

Selecting Pad: ECSPI2_MOSI Mode: ALT3 for CSI_DATA7

End of enumeration elements list.

CSI_DATA8_SELECT_INPUT

CSI_DATA8_SELECT_INPUT DAISY Register
address_offset : 0x510 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : LCD_DATA09_ALT3

Selecting Pad: LCD_DATA09 Mode: ALT3 for CSI_DATA8

0x1 : ECSPI2_MISO_ALT3

Selecting Pad: ECSPI2_MISO Mode: ALT3 for CSI_DATA8

End of enumeration elements list.

CSI_DATA9_SELECT_INPUT

CSI_DATA9_SELECT_INPUT DAISY Register
address_offset : 0x514 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : LCD_DATA08_ALT3

Selecting Pad: LCD_DATA08 Mode: ALT3 for CSI_DATA9

0x1 : ECSPI2_SS0_ALT3

Selecting Pad: ECSPI2_SS0 Mode: ALT3 for CSI_DATA9

End of enumeration elements list.

CSI_HSYNC_SELECT_INPUT

CSI_HSYNC_SELECT_INPUT DAISY Register
address_offset : 0x518 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : LCD_DATA05_ALT3

Selecting Pad: LCD_DATA05 Mode: ALT3 for CSI_HSYNC

0x1 : I2C3_SDA_ALT3

Selecting Pad: I2C3_SDA Mode: ALT3 for CSI_HSYNC

End of enumeration elements list.

CSI_PIXCLK_SELECT_INPUT

CSI_PIXCLK_SELECT_INPUT DAISY Register
address_offset : 0x51C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : LCD_DATA06_ALT3

Selecting Pad: LCD_DATA06 Mode: ALT3 for CSI_PIXCLK

0x1 : I2C4_SCL_ALT3

Selecting Pad: I2C4_SCL Mode: ALT3 for CSI_PIXCLK

End of enumeration elements list.

CSI_VSYNC_SELECT_INPUT

CSI_VSYNC_SELECT_INPUT DAISY Register
address_offset : 0x520 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : LCD_DATA04_ALT3

Selecting Pad: LCD_DATA04 Mode: ALT3 for CSI_VSYNC

0x1 : I2C3_SCL_ALT3

Selecting Pad: I2C3_SCL Mode: ALT3 for CSI_VSYNC

End of enumeration elements list.

ECSPI1_SCLK_SELECT_INPUT

ECSPI1_SCLK_SELECT_INPUT DAISY Register
address_offset : 0x524 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : UART3_RTS_B_ALT3

Selecting Pad: UART3_RTS_B Mode: ALT3 for ECSPI1_SCLK

0x1 : ECSPI1_SCLK_ALT0

Selecting Pad: ECSPI1_SCLK Mode: ALT0 for ECSPI1_SCLK

End of enumeration elements list.

ECSPI1_MISO_SELECT_INPUT

ECSPI1_MISO_SELECT_INPUT DAISY Register
address_offset : 0x528 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : UART3_RX_DATA_ALT3

Selecting Pad: UART3_RX_DATA Mode: ALT3 for ECSPI1_MISO

0x1 : ECSPI1_MISO_ALT0

Selecting Pad: ECSPI1_MISO Mode: ALT0 for ECSPI1_MISO

End of enumeration elements list.

ECSPI1_MOSI_SELECT_INPUT

ECSPI1_MOSI_SELECT_INPUT DAISY Register
address_offset : 0x52C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : UART3_TX_DATA_ALT3

Selecting Pad: UART3_TX_DATA Mode: ALT3 for ECSPI1_MOSI

0x1 : ECSPI1_MOSI_ALT0

Selecting Pad: ECSPI1_MOSI Mode: ALT0 for ECSPI1_MOSI

End of enumeration elements list.

ECSPI1_SS0_B_SELECT_INPUT

ECSPI1_SS0_B_SELECT_INPUT DAISY Register
address_offset : 0x530 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : UART3_CTS_B_ALT3

Selecting Pad: UART3_CTS_B Mode: ALT3 for ECSPI1_SS0_B

0x1 : ECSPI1_SS0_ALT0

Selecting Pad: ECSPI1_SS0 Mode: ALT0 for ECSPI1_SS0_B

End of enumeration elements list.

ECSPI2_SCLK_SELECT_INPUT

ECSPI2_SCLK_SELECT_INPUT DAISY Register
address_offset : 0x534 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : ECSPI2_SCLK_ALT0

Selecting Pad: ECSPI2_SCLK Mode: ALT0 for ECSPI2_SCLK

0x1 : ENET1_RGMII_RD2_ALT2

Selecting Pad: ENET1_RGMII_RD2 Mode: ALT2 for ECSPI2_SCLK

End of enumeration elements list.

ECSPI2_MISO_SELECT_INPUT

ECSPI2_MISO_SELECT_INPUT DAISY Register
address_offset : 0x538 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : ECSPI2_MISO_ALT0

Selecting Pad: ECSPI2_MISO Mode: ALT0 for ECSPI2_MISO

0x1 : ENET1_RGMII_TD2_ALT2

Selecting Pad: ENET1_RGMII_TD2 Mode: ALT2 for ECSPI2_MISO

End of enumeration elements list.

ECSPI2_MOSI_SELECT_INPUT

ECSPI2_MOSI_SELECT_INPUT DAISY Register
address_offset : 0x53C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : ECSPI2_MOSI_ALT0

Selecting Pad: ECSPI2_MOSI Mode: ALT0 for ECSPI2_MOSI

0x1 : ENET1_RGMII_RD3_ALT2

Selecting Pad: ENET1_RGMII_RD3 Mode: ALT2 for ECSPI2_MOSI

End of enumeration elements list.

SW_MUX_CTL_PAD_EPDC_DATA08

SW_MUX_CTL_PAD_EPDC_DATA08 SW MUX Control Register
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 3 (4 bit)
access : read-write

Enumeration:

0 : ALT0_EPDC_DATA8

Select mux mode: ALT0 mux port: DATA8 of instance: EPDC

0x1 : ALT1_SIM1_PORT1_TRXD

Select mux mode: ALT1 mux port: PORT1_TRXD of instance: SIM1

0x2 : ALT2_QSPI_B_DATA0

Select mux mode: ALT2 mux port: B_DATA0 of instance: QSPI

0x3 : ALT3_UART6_RX_DATA

Select mux mode: ALT3 mux port: RX_DATA of instance: UART6

0x4 : ALT4_EIM_OE

Select mux mode: ALT4 mux port: OE of instance: EIM

0x5 : ALT5_GPIO2_IO8

Select mux mode: ALT5 mux port: IO8 of instance: GPIO2

0x6 : ALT6_LCD_DATA8

Select mux mode: ALT6 mux port: DATA8 of instance: LCD

0x7 : ALT7_LCD_BUSY

Select mux mode: ALT7 mux port: BUSY of instance: LCD

0x8 : ALT8_EPDC_SDCLK

Select mux mode: ALT8 mux port: SDCLK of instance: EPDC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad EPDC_DATA08

End of enumeration elements list.

ECSPI2_SS0_B_SELECT_INPUT

ECSPI2_SS0_B_SELECT_INPUT DAISY Register
address_offset : 0x540 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : ECSPI2_SS0_ALT0

Selecting Pad: ECSPI2_SS0 Mode: ALT0 for ECSPI2_SS0_B

0x1 : ENET1_RGMII_TD3_ALT2

Selecting Pad: ENET1_RGMII_TD3 Mode: ALT2 for ECSPI2_SS0_B

End of enumeration elements list.

ECSPI3_SCLK_SELECT_INPUT

ECSPI3_SCLK_SELECT_INPUT DAISY Register
address_offset : 0x544 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : I2C2_SCL_ALT3

Selecting Pad: I2C2_SCL Mode: ALT3 for ECSPI3_SCLK

0x1 : SAI2_RX_DATA_ALT1

Selecting Pad: SAI2_RX_DATA Mode: ALT1 for ECSPI3_SCLK

End of enumeration elements list.

ECSPI3_MISO_SELECT_INPUT

ECSPI3_MISO_SELECT_INPUT DAISY Register
address_offset : 0x548 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : I2C1_SCL_ALT3

Selecting Pad: I2C1_SCL Mode: ALT3 for ECSPI3_MIS

0x1 : SAI2_TX_SYNC_ALT1

Selecting Pad: SAI2_TX_SYNC Mode: ALT1 for ECSPI3_MIS

End of enumeration elements list.

ECSPI3_MOSI_SELECT_INPUT

ECSPI3_MOSI_SELECT_INPUT DAISY Register
address_offset : 0x54C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : I2C1_SDA_ALT3

Selecting Pad: I2C1_SDA Mode: ALT3 for ECSPI3_MOSI

0x1 : SAI2_TX_BCLK_ALT1

Selecting Pad: SAI2_TX_BCLK Mode: ALT1 for ECSPI3_MOSI

End of enumeration elements list.

ECSPI3_SS0_B_SELECT_INPUT

ECSPI3_SS0_B_SELECT_INPUT DAISY Register
address_offset : 0x550 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : I2C2_SDA_ALT3

Selecting Pad: I2C2_SDA Mode: ALT3 for ECSPI3_SS0_B

0x1 : SAI2_TX_DATA_ALT1

Selecting Pad: SAI2_TX_DATA Mode: ALT1 for ECSPI3_SS0_B

End of enumeration elements list.

ECSPI4_SCLK_SELECT_INPUT

ECSPI4_SCLK_SELECT_INPUT DAISY Register
address_offset : 0x554 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : LCD_HSYNC_ALT1

Selecting Pad: LCD_HSYNC Mode: ALT1 for ECSPI4_SCLK

0x1 : SD1_RESET_B_ALT3

Selecting Pad: SD1_RESET_B Mode: ALT3 for ECSPI4_SCLK

0x2 : SD3_DATA1_ALT2

Selecting Pad: SD3_DATA1 Mode: ALT2 for

End of enumeration elements list.

ECSPI4_MISO_SELECT_INPUT

ECSPI4_MISO_SELECT_INPUT DAISY Register
address_offset : 0x558 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : LCD_CLK_ALT1

Selecting Pad: LCD_CLK Mode: ALT1 for ECSPI4_MISO

0x1 : SD1_CD_B_ALT3

Selecting Pad: SD1_CD_B Mode: ALT3 for ECSPI4_MISO

0x2 : SD3_CLK_ALT2

Selecting Pad: SD3_CLK Mode: ALT2 for ECSPI4_MISO

End of enumeration elements list.

ECSPI4_MOSI_SELECT_INPUT

ECSPI4_MOSI_SELECT_INPUT DAISY Register
address_offset : 0x55C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : LCD_ENABLE_ALT1

Selecting Pad: LCD_ENABLE Mode: ALT1 for ECSPI4_MOSI

0x1 : SD1_WP_ALT3

Selecting Pad: SD1_WP Mode: ALT3 for ECSPI4_MOSI

0x2 : SD3_CMD_ALT2

Selecting Pad: SD3_CMD Mode: ALT2 for ECSPI4_MOSI

End of enumeration elements list.

ECSPI4_SS0_B_SELECT_INPUT

ECSPI4_SS0_B_SELECT_INPUT DAISY Register
address_offset : 0x560 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : LCD_VSYNC_ALT1

Selecting Pad: LCD_VSYNC Mode: ALT1 for ECSPI4_SS0_B

0x1 : SD1_CLK_ALT3

Selecting Pad: SD1_CLK Mode: ALT3 for ECSPI4_SS0_B

0x2 : SD3_DATA0_ALT2

Selecting Pad: SD3_DATA0 Mode: ALT2 for ECSPI4_SS0_B

End of enumeration elements list.

CCM_ENET1_REF_CLK_SELECT_INPUT

CCM_ENET1_REF_CLK_SELECT_INPUT DAISY Register
address_offset : 0x564 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : GPIO1_IO12_ALT2

Selecting Pad: GPIO1_IO12 Mode: ALT2 for CCM_ENET1_REF_CLK

0x1 : I2C1_SDA_ALT4

Selecting Pad: I2C1_SDA Mode: ALT4 for CCM_ENET1_REF_CLK

0x2 : ENET1_TX_CLK_ALT1

Selecting Pad: ENET1_TX_CLK Mode: ALT1 for CCM_ENET1_REF_CLK

0x3 : GPIO1_IO02_ALT2

Selecting Pad: GPIO1_IO02 Mode: ALT2 for CCM_ENET1_REF_CLK

End of enumeration elements list.

ENET1_MDIO_SELECT_INPUT

ENET1_MDIO_SELECT_INPUT DAISY Register
address_offset : 0x568 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : GPIO1_IO10_ALT2

Selecting Pad: GPIO1_IO10 Mode: ALT2 for ENET1_MDIO

0x1 : UART1_RX_DATA_ALT6

Selecting Pad: UART1_RX_DATA Mode: ALT6 for ENET1_MDIO

0x2 : SD2_CD_B_ALT1

Selecting Pad: SD2_CD_B Mode: ALT1 for ENET1_MDIO

End of enumeration elements list.

ENET1_RX_CLK_SELECT_INPUT

ENET1_RX_CLK_SELECT_INPUT DAISY Register
address_offset : 0x56C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : ENET1_RGMII_RXC_ALT0

Selecting Pad: ENET1_RGMII_RXC Mode: ALT0 for ENET1_RGMII_RXC

0x1 : ENET1_RX_CLK_ALT0

Selecting Pad: ENET1_RX_CLK Mode: ALT0 for ENET1_RX_CLK

End of enumeration elements list.

CCM_ENET2_REF_CLK_SELECT_INPUT

CCM_ENET2_REF_CLK_SELECT_INPUT DAISY Register
address_offset : 0x570 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : GPIO1_IO13_ALT2

Selecting Pad: GPIO1_IO13 Mode: ALT2 for CCM_ENET2_REF_CLK

0x1 : EPDC_BDR0_ALT3

Selecting Pad: EPDC_BDR0 Mode: ALT3 for CCM_ENET2_REF_CLK

0x2 : I2C2_SCL_ALT4

Selecting Pad: I2C2_SCL Mode: ALT4 for CCM_ENET2_REF_CLK

0x3 : GPIO1_IO03_ALT2

Selecting Pad: GPIO1_IO03 Mode: ALT2 for CCM_ENET2_REF_CLK

End of enumeration elements list.

ENET2_MDIO_SELECT_INPUT

ENET2_MDIO_SELECT_INPUT DAISY Register
address_offset : 0x574 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : GPIO1_IO14_ALT2

Selecting Pad: GPIO1_IO14 Mode: ALT2 for ENET2_MDIO

0x1 : UART2_RX_DATA_ALT6

Selecting Pad: UART2_RX_DATA Mode: ALT6 for ENET2_MDIO

0x2 : SD2_CD_B_ALT2

Selecting Pad: SD2_CD_B Mode: ALT2 for ENET2_MDIO

End of enumeration elements list.

ENET2_RX_CLK_SELECT_INPUT

ENET2_RX_CLK_SELECT_INPUT DAISY Register
address_offset : 0x578 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : EPDC_SDCE1_ALT2

Selecting Pad: EPDC_SDCE1 Mode: ALT2 for ENET2_RX_CLK

0x1 : EPDC_BDR1_ALT2

Selecting Pad: EPDC_BDR1 Mode: ALT2 for ENET2_RX_CLK

End of enumeration elements list.

EPDC_PWR_IRQ_SELECT_INPUT

EPDC_PWR_IRQ_SELECT_INPUT DAISY Register
address_offset : 0x57C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : ECSPI1_MISO_ALT6

Selecting Pad: ECSPI1_MISO Mode: ALT6 for EPDC_PWR_IRQ

0x1 : ENET1_TX_CLK_ALT4

Selecting Pad: ENET1_TX_CLK Mode: ALT4 for EPDC_PWR_IRQ

End of enumeration elements list.

SW_MUX_CTL_PAD_EPDC_DATA09

SW_MUX_CTL_PAD_EPDC_DATA09 SW MUX Control Register
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 3 (4 bit)
access : read-write

Enumeration:

0 : ALT0_EPDC_DATA9

Select mux mode: ALT0 mux port: DATA9 of instance: EPDC

0x1 : ALT1_SIM1_PORT1_CLK

Select mux mode: ALT1 mux port: PORT1_CLK of instance: SIM1

0x2 : ALT2_QSPI_B_DATA1

Select mux mode: ALT2 mux port: B_DATA1 of instance: QSPI

0x3 : ALT3_UART6_TX_DATA

Select mux mode: ALT3 mux port: TX_DATA of instance: UART6

0x4 : ALT4_EIM_RW

Select mux mode: ALT4 mux port: RW of instance: EIM

0x5 : ALT5_GPIO2_IO9

Select mux mode: ALT5 mux port: IO9 of instance: GPIO2

0x6 : ALT6_LCD_DATA9

Select mux mode: ALT6 mux port: DATA9 of instance: LCD

0x7 : ALT7_LCD_DATA0

Select mux mode: ALT7 mux port: DATA0 of instance: LCD

0x8 : ALT8_EPDC_SDLE

Select mux mode: ALT8 mux port: SDLE of instance: EPDC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad EPDC_DATA09

End of enumeration elements list.

EPDC_PWR_STAT_SELECT_INPUT

EPDC_PWR_STAT_SELECT_INPUT DAISY Register
address_offset : 0x580 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : EPDC_PWR_STAT_ALT0

Selecting Pad: EPDC_PWR_STAT Mode: ALT0 for EPDC_PWR_STAT

0x1 : ECSPI1_MOSI_ALT6

Selecting Pad: ECSPI1_MOSI Mode: ALT6 for EPDC_PWR_STAT

End of enumeration elements list.

FLEXTIMER1_CH0_SELECT_INPUT

FLEXTIMER1_CH0_SELECT_INPUT DAISY Register
address_offset : 0x584 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : EPDC_SDOE_ALT1

Selecting Pad: EPDC_SDOE Mode: ALT1 for FLEXTIMER1_CH0

0x1 : SD1_CD_B_ALT4

Selecting Pad: SD1_CD_B Mode: ALT4 for FLEXTIMER1_CH0

End of enumeration elements list.

FLEXTIMER1_CH1_SELECT_INPUT

FLEXTIMER1_CH1_SELECT_INPUT DAISY Register
address_offset : 0x588 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : EPDC_SDSHR_ALT1

Selecting Pad: EPDC_SDSHR Mode: ALT1 for FLEXTIMER1_CH1

0x1 : SD1_WP_ALT4

Selecting Pad: SD1_WP Mode: ALT4 for FLEXTIMER1_CH1

End of enumeration elements list.

FLEXTIMER1_CH2_SELECT_INPUT

FLEXTIMER1_CH2_SELECT_INPUT DAISY Register
address_offset : 0x58C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : EPDC_SDCE0_ALT1

Selecting Pad: EPDC_SDCE0 Mode: ALT1 for FLEXTIMER1_CH2

0x1 : SD1_RESET_B_ALT4

Selecting Pad: SD1_RESET_B Mode: ALT4 for FLEXTIMER1_CH2

End of enumeration elements list.

FLEXTIMER1_CH3_SELECT_INPUT

FLEXTIMER1_CH3_SELECT_INPUT DAISY Register
address_offset : 0x590 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : EPDC_SDCE1_ALT1

Selecting Pad: EPDC_SDCE1 Mode: ALT1 for FLEXTIMER1_CH3

0x1 : SD1_CLK_ALT4

Selecting Pad: SD1_CLK Mode: ALT4 for FLEXTIMER1_CH3

End of enumeration elements list.

FLEXTIMER1_CH4_SELECT_INPUT

FLEXTIMER1_CH4_SELECT_INPUT DAISY Register
address_offset : 0x594 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : LCD_DATA16_ALT1

Selecting Pad: LCD_DATA16 Mode: ALT1 for FLEXTIMER1_CH4

0x1 : GPIO1_IO04_ALT2

Selecting Pad: GPIO1_IO04 Mode: ALT2 for FLEXTIMER1_CH4

End of enumeration elements list.

FLEXTIMER1_CH5_SELECT_INPUT

FLEXTIMER1_CH5_SELECT_INPUT DAISY Register
address_offset : 0x598 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : LCD_DATA17_ALT1

Selecting Pad: LCD_DATA17 Mode: ALT1 for FLEXTIMER1_CH5

0x1 : GPIO1_IO05_ALT2

Selecting Pad: GPIO1_IO05 Mode: ALT2 for FLEXTIMER1_CH5

End of enumeration elements list.

FLEXTIMER1_CH6_SELECT_INPUT

FLEXTIMER1_CH6_SELECT_INPUT DAISY Register
address_offset : 0x59C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : LCD_DATA18_ALT1

Selecting Pad: LCD_DATA18 Mode: ALT1 for FLEXTIMER1_CH6

0x1 : GPIO1_IO06_ALT2

Selecting Pad: GPIO1_IO06 Mode: ALT2 for FLEXTIMER1_CH6

End of enumeration elements list.

FLEXTIMER1_CH7_SELECT_INPUT

FLEXTIMER1_CH7_SELECT_INPUT DAISY Register
address_offset : 0x5A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : LCD_DATA19_ALT1

Selecting Pad: LCD_DATA19 Mode: ALT1 for FLEXTIMER1_CH7

0x1 : GPIO1_IO07_ALT2

Selecting Pad: GPIO1_IO07 Mode: ALT2 for FLEXTIMER1_CH7

End of enumeration elements list.

FLEXTIMER1_PHA_SELECT_INPUT

FLEXTIMER1_PHA_SELECT_INPUT DAISY Register
address_offset : 0x5A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : GPIO1_IO10_ALT5

Selecting Pad: GPIO1_IO10 Mode: ALT5 for FLEXTIMER1_PHA

0x1 : SD1_DATA3_ALT4

Selecting Pad: SD1_DATA3 Mode: ALT4 for FLEXTIMER1_PHA

End of enumeration elements list.

FLEXTIMER1_PHB_SELECT_INPUT

FLEXTIMER1_PHB_SELECT_INPUT DAISY Register
address_offset : 0x5A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : GPIO1_IO11_ALT5

Selecting Pad: GPIO1_IO11 Mode: ALT5 for FLEXTIMER1_PHB

0x1 : SD2_CD_B_ALT4

Selecting Pad: SD2_CD_B Mode: ALT4 for FLEXTIMER1_PHB

End of enumeration elements list.

FLEXTIMER2_CH0_SELECT_INPUT

FLEXTIMER2_CH0_SELECT_INPUT DAISY Register
address_offset : 0x5AC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : EPDC_GDCLK_ALT1

Selecting Pad: EPDC_GDCLK Mode: ALT1 for FLEXTIMER2_CH0

0x1 : SD1_CMD_ALT4

Selecting Pad: SD1_CMD Mode: ALT4 for FLEXTIMER2_CH0

End of enumeration elements list.

FLEXTIMER2_CH1_SELECT_INPUT

FLEXTIMER2_CH1_SELECT_INPUT DAISY Register
address_offset : 0x5B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : EPDC_GDOE_ALT1

Selecting Pad: EPDC_GDOE Mode: ALT1 for FLEXTIMER2_CH1

0x1 : SD1_DATA0_ALT4

Selecting Pad: SD1_DATA0 Mode: ALT4 for FLEXTIMER2_CH1

End of enumeration elements list.

FLEXTIMER2_CH2_SELECT_INPUT

FLEXTIMER2_CH2_SELECT_INPUT DAISY Register
address_offset : 0x5B4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : EPDC_GDRL_ALT1

Selecting Pad: EPDC_GDRL Mode: ALT1 for FLEXTIMER2_CH2

0x1 : SD1_DATA1_ALT4

Selecting Pad: SD1_DATA1 Mode: ALT4 for FLEXTIMER2_CH2

End of enumeration elements list.

FLEXTIMER2_CH3_SELECT_INPUT

FLEXTIMER2_CH3_SELECT_INPUT DAISY Register
address_offset : 0x5B8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : EPDC_GDSP_ALT1

Selecting Pad: EPDC_GDSP Mode: ALT1 for FLEXTIMER2_CH3

0x1 : SD1_DATA2_ALT4

Selecting Pad: SD1_DATA2 Mode: ALT4 for FLEXTIMER2_CH3

End of enumeration elements list.

FLEXTIMER2_CH4_SELECT_INPUT

FLEXTIMER2_CH4_SELECT_INPUT DAISY Register
address_offset : 0x5BC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : LCD_DATA20_ALT1

Selecting Pad: LCD_DATA20 Mode: ALT1 for FLEXTIMER2_CH4

0x1 : SAI2_TX_SYNC_ALT4

Selecting Pad: SAI2_TX_SYNC Mode: ALT4 for FLEXTIMER2_CH4

End of enumeration elements list.

SW_MUX_CTL_PAD_EPDC_DATA10

SW_MUX_CTL_PAD_EPDC_DATA10 SW MUX Control Register
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 3 (4 bit)
access : read-write

Enumeration:

0 : ALT0_EPDC_DATA10

Select mux mode: ALT0 mux port: DATA10 of instance: EPDC

0x1 : ALT1_SIM1_PORT1_RST_B

Select mux mode: ALT1 mux port: PORT1_RST_B of instance: SIM1

0x2 : ALT2_QSPI_B_DATA2

Select mux mode: ALT2 mux port: B_DATA2 of instance: QSPI

0x3 : ALT3_UART6_RTS_B

Select mux mode: ALT3 mux port: RTS_B of instance: UART6

0x4 : ALT4_EIM_CS0_B

Select mux mode: ALT4 mux port: CS0_B of instance: EIM

0x5 : ALT5_GPIO2_IO10

Select mux mode: ALT5 mux port: IO10 of instance: GPIO2

0x6 : ALT6_LCD_DATA10

Select mux mode: ALT6 mux port: DATA10 of instance: LCD

0x7 : ALT7_LCD_DATA9

Select mux mode: ALT7 mux port: DATA9 of instance: LCD

0x8 : ALT8_EPDC_SDOE

Select mux mode: ALT8 mux port: SDOE of instance: EPDC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad EPDC_DATA10

End of enumeration elements list.

FLEXTIMER2_CH5_SELECT_INPUT

FLEXTIMER2_CH5_SELECT_INPUT DAISY Register
address_offset : 0x5C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : LCD_DATA21_ALT1

Selecting Pad: LCD_DATA21 Mode: ALT1 for FLEXTIMER2_CH5

0x1 : SAI2_TX_BCLK_ALT4

Selecting Pad: SAI2_TX_BCLK Mode: ALT4 for FLEXTIMER2_CH5

End of enumeration elements list.

FLEXTIMER2_CH6_SELECT_INPUT

FLEXTIMER2_CH6_SELECT_INPUT DAISY Register
address_offset : 0x5C4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : LCD_DATA22_ALT1

Selecting Pad: LCD_DATA22 Mode: ALT1 for FLEXTIMER2_CH6

0x1 : SAI2_RX_DATA_ALT4

Selecting Pad: SAI2_RX_DATA Mode: ALT4 for FLEXTIMER2_CH6

End of enumeration elements list.

FLEXTIMER2_CH7_SELECT_INPUT

FLEXTIMER2_CH7_SELECT_INPUT DAISY Register
address_offset : 0x5C8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : LCD_DATA23_ALT1

Selecting Pad: LCD_DATA23 Mode: ALT1 for FLEXTIMER2_CH7

0x1 : SAI2_TX_DATA_ALT4

Selecting Pad: SAI2_TX_DATA Mode: ALT4 for FLEXTIMER2_CH7

End of enumeration elements list.

FLEXTIMER2_PHA_SELECT_INPUT

FLEXTIMER2_PHA_SELECT_INPUT DAISY Register
address_offset : 0x5CC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : EPDC_PWR_COM_ALT1

Selecting Pad: EPDC_PWR_COM Mode: ALT1 for FLEXTIMER2_PHA

0x1 : SAI1_RX_BCLK_ALT4

Selecting Pad: SAI1_RX_BCLK Mode: ALT4 for FLEXTIMER2_PHA

End of enumeration elements list.

FLEXTIMER2_PHB_SELECT_INPUT

FLEXTIMER2_PHB_SELECT_INPUT DAISY Register
address_offset : 0x5D0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : EPDC_PWR_STAT_ALT1

Selecting Pad: EPDC_PWR_STAT Mode: ALT1 for FLEXTIMER2_PHB

0x1 : SAI1_MCLK_ALT4

Selecting Pad: SAI1_MCLK Mode: ALT4 for FLEXTIMER2_PHB

End of enumeration elements list.

I2C1_SCL_SELECT_INPUT

I2C1_SCL_SELECT_INPUT DAISY Register
address_offset : 0x5D4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : UART1_RX_DATA_ALT1

Selecting Pad: UART1_RX_DATA Mode: ALT1 for I2C1_SCL

0x1 : I2C1_SCL_ALT0

Selecting Pad: I2C1_SCL Mode: ALT0 for I2C1_SCL

0x2 : GPIO1_IO04_ALT4

Selecting Pad: GPIO1_IO04 Mode: ALT4 for I2C1_SCL

End of enumeration elements list.

I2C1_SDA_SELECT_INPUT

I2C1_SDA_SELECT_INPUT DAISY Register
address_offset : 0x5D8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : UART1_TX_DATA_ALT1

Selecting Pad: UART1_TX_DATA Mode: ALT1 for I2C1_SDA

0x1 : I2C1_SDA_ALT0

Selecting Pad: I2C1_SDA Mode: ALT0 for I2C1_SDA

0x2 : GPIO1_IO05_ALT4

Selecting Pad: GPIO1_IO05 Mode: ALT4 for I2C1_SDA

End of enumeration elements list.

I2C2_SCL_SELECT_INPUT

I2C2_SCL_SELECT_INPUT DAISY Register
address_offset : 0x5DC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : UART2_RX_DATA_ALT1

Selecting Pad: UART2_RX_DATA Mode: ALT1 for I2C2_SCL

0x1 : I2C2_SCL_ALT0

Selecting Pad: I2C2_SCL Mode: ALT0 for I2C2_SCL

0x2 : GPIO1_IO06_ALT4

Selecting Pad: GPIO1_IO06 Mode: ALT4 for I2C2_SCL

End of enumeration elements list.

I2C2_SDA_SELECT_INPUT

I2C2_SDA_SELECT_INPUT DAISY Register
address_offset : 0x5E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : UART2_TX_DATA_ALT1

Selecting Pad: UART2_TX_DATA Mode: ALT1 for I2C2_SDA

0x1 : I2C2_SDA_ALT0

Selecting Pad: I2C2_SDA Mode: ALT0 for I2C2_SDA

0x2 : GPIO1_IO07_ALT4

Selecting Pad: GPIO1_IO07 Mode: ALT4 for I2C2_SDA

End of enumeration elements list.

I2C3_SCL_SELECT_INPUT

I2C3_SCL_SELECT_INPUT DAISY Register
address_offset : 0x5E4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : GPIO1_IO08_ALT4

Selecting Pad: GPIO1_IO08 Mode: ALT4 for I2C3_SCL

0x1 : LCD_DATA20_ALT6

Selecting Pad: LCD_DATA20 Mode: ALT6 for I2C3_SCL

0x2 : I2C3_SCL_ALT0

Selecting Pad: I2C3_SCL Mode: ALT0 for I2C3_SCL

0x3 : SD3_DATA3_ALT2

Selecting Pad: SD3_DATA3 Mode: ALT2 for I2C3_SCL

0x4 : ENET1_RGMII_RD0_ALT2

Selecting Pad: ENET1_RGMII_RD0 Mode: ALT2 for I2C3_SCL

End of enumeration elements list.

I2C3_SDA_SELECT_INPUT

I2C3_SDA_SELECT_INPUT DAISY Register
address_offset : 0x5E8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : GPIO1_IO09_ALT4

Selecting Pad: GPIO1_IO09 Mode: ALT4 for I2C3_SDA

0x1 : LCD_DATA21_ALT6

Selecting Pad: LCD_DATA21 Mode: ALT6 for I2C3_SDA

0x2 : I2C3_SDA_ALT0

Selecting Pad: I2C3_SDA Mode: ALT0 for I2C3_SDA

0x3 : SD3_DATA2_ALT2

Selecting Pad: SD3_DATA2 Mode: ALT2 for I2C3_SDA

0x4 : ENET1_RGMII_RD1_ALT2

Selecting Pad: ENET1_RGMII_RD1 Mode: ALT2 for I2C3_SDA

End of enumeration elements list.

I2C4_SCL_SELECT_INPUT

I2C4_SCL_SELECT_INPUT DAISY Register
address_offset : 0x5EC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : GPIO1_IO10_ALT4

Selecting Pad: GPIO1_IO10 Mode: ALT4 for I2C4_SCL

0x1 : LCD_DATA22_ALT6

Selecting Pad: LCD_DATA22 Mode: ALT6 for I2C4_SCL

0x2 : I2C4_SCL_ALT0

Selecting Pad: I2C4_SCL Mode: ALT0 for I2C4_SCL

0x3 : SAI1_RX_SYNC_ALT3

Selecting Pad: SAI1_RX_SYNC Mode: ALT3 for I2C4_SCL

0x4 : ENET1_RGMII_TD2_ALT3

Selecting Pad: ENET1_RGMII_TD2 Mode: ALT3 for I2C4_SCL

End of enumeration elements list.

I2C4_SDA_SELECT_INPUT

I2C4_SDA_SELECT_INPUT DAISY Register
address_offset : 0x5F0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : GPIO1_IO11_ALT4

Selecting Pad: GPIO1_IO11 Mode: ALT4 for I2C4_SDA

0x1 : LCD_DATA23_ALT6

Selecting Pad: LCD_DATA23 Mode: ALT6 for I2C4_SDA

0x2 : I2C4_SDA_ALT0

Selecting Pad: I2C4_SDA Mode: ALT0 for I2C4_SDA

0x3 : SAI1_RX_BCLK_ALT3

Selecting Pad: SAI1_RX_BCLK Mode: ALT3 for I2C4_SDA

0x4 : ENET1_RGMII_TD3_ALT3

Selecting Pad: ENET1_RGMII_TD3 Mode: ALT3 for I2C4_SDA

End of enumeration elements list.

KPP_COL0_SELECT_INPUT

KPP_COL0_SELECT_INPUT DAISY Register
address_offset : 0x5F4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : EPDC_DATA07_ALT3

Selecting Pad: EPDC_DATA07 Mode: ALT3 for KPP_COL0

0x1 : ENET1_RGMII_TD1_ALT6

Selecting Pad: ENET1_RGMII_TD1 Mode: ALT6 for KPP_COL0

End of enumeration elements list.

KPP_COL1_SELECT_INPUT

KPP_COL1_SELECT_INPUT DAISY Register
address_offset : 0x5F8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : EPDC_DATA05_ALT3

Selecting Pad: EPDC_DATA05 Mode: ALT3 for KPP_COL1

0x1 : ENET1_RGMII_RXC_ALT6

Selecting Pad: ENET1_RGMII_RXC Mode: ALT6 for KPP_COL1

End of enumeration elements list.

KPP_COL2_SELECT_INPUT

KPP_COL2_SELECT_INPUT DAISY Register
address_offset : 0x5FC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : EPDC_DATA03_ALT3

Selecting Pad: EPDC_DATA03 Mode: ALT3 for KPP_COL2

0x1 : ENET1_RGMII_RD3_ALT6

Selecting Pad: ENET1_RGMII_RD3 Mode: ALT6 for KPP_COL2

End of enumeration elements list.

SW_MUX_CTL_PAD_EPDC_DATA11

SW_MUX_CTL_PAD_EPDC_DATA11 SW MUX Control Register
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 3 (4 bit)
access : read-write

Enumeration:

0 : ALT0_EPDC_DATA11

Select mux mode: ALT0 mux port: DATA11 of instance: EPDC

0x1 : ALT1_SIM1_PORT1_SVEN

Select mux mode: ALT1 mux port: PORT1_SVEN of instance: SIM1

0x2 : ALT2_QSPI_B_DATA3

Select mux mode: ALT2 mux port: B_DATA3 of instance: QSPI

0x3 : ALT3_UART6_CTS_B

Select mux mode: ALT3 mux port: CTS_B of instance: UART6

0x4 : ALT4_EIM_BCLK

Select mux mode: ALT4 mux port: BCLK of instance: EIM

0x5 : ALT5_GPIO2_IO11

Select mux mode: ALT5 mux port: IO11 of instance: GPIO2

0x6 : ALT6_LCD_DATA11

Select mux mode: ALT6 mux port: DATA11 of instance: LCD

0x7 : ALT7_LCD_DATA1

Select mux mode: ALT7 mux port: DATA1 of instance: LCD

0x8 : ALT8_EPDC_SDCE0

Select mux mode: ALT8 mux port: SDCE0 of instance: EPDC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad EPDC_DATA11

End of enumeration elements list.

KPP_COL3_SELECT_INPUT

KPP_COL3_SELECT_INPUT DAISY Register
address_offset : 0x600 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : EPDC_DATA01_ALT3

Selecting Pad: EPDC_DATA01 Mode: ALT3 for KPP_COL3

0x1 : ENET1_RGMII_RD1_ALT6

Selecting Pad: ENET1_RGMII_RD1 Mode: ALT6 for KPP_COL3

End of enumeration elements list.

KPP_COL4_SELECT_INPUT

KPP_COL4_SELECT_INPUT DAISY Register
address_offset : 0x604 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : EPDC_SDLE_ALT3

Selecting Pad: EPDC_SDLE Mode: ALT3 for KPP_COL4

0x1 : GPIO1_IO07_ALT6

Selecting Pad: GPIO1_IO07 Mode: ALT6 for KPP_COL4

End of enumeration elements list.

KPP_COL5_SELECT_INPUT

KPP_COL5_SELECT_INPUT DAISY Register
address_offset : 0x608 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : GPIO1_IO08_ALT6

Selecting Pad: GPIO1_IO08 Mode: ALT6 for KPP_COL5

0x1 : EPDC_SDOE_ALT3

Selecting Pad: EPDC_SDOE Mode: ALT3 for KPP_COL5

End of enumeration elements list.

KPP_COL6_SELECT_INPUT

KPP_COL6_SELECT_INPUT DAISY Register
address_offset : 0x60C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : GPIO1_IO10_ALT6

Selecting Pad: GPIO1_IO10 Mode: ALT6 for KPP_COL6

0x1 : EPDC_SDCE2_ALT3

Selecting Pad: EPDC_SDCE2 Mode: ALT3 for KPP_COL6

End of enumeration elements list.

KPP_COL7_SELECT_INPUT

KPP_COL7_SELECT_INPUT DAISY Register
address_offset : 0x610 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : EPDC_GDCLK_ALT3

Selecting Pad: EPDC_GDCLK Mode: ALT3 for KPP_COL7

0x1 : SAI2_RX_DATA_ALT6

Selecting Pad: SAI2_RX_DATA Mode: ALT6 for KPP_COL7

End of enumeration elements list.

KPP_ROW0_SELECT_INPUT

KPP_ROW0_SELECT_INPUT DAISY Register
address_offset : 0x614 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : EPDC_DATA06_ALT3

Selecting Pad: EPDC_DATA06 Mode: ALT3 for KPP_ROW0

0x1 : ENET1_RGMII_TD0_ALT6

Selecting Pad: ENET1_RGMII_TD0 Mode: ALT6 for KPP_ROW0

End of enumeration elements list.

KPP_ROW1_SELECT_INPUT

KPP_ROW1_SELECT_INPUT DAISY Register
address_offset : 0x618 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : EPDC_DATA04_ALT3

Selecting Pad: EPDC_DATA04 Mode: ALT3 for KPP_ROW1

0x1 : ENET1_RGMII_RX_CTL_ALT6

Selecting Pad: ENET1_RGMII_RX_CTL Mode: ALT6 for KPP_ROW1

End of enumeration elements list.

KPP_ROW2_SELECT_INPUT

KPP_ROW2_SELECT_INPUT DAISY Register
address_offset : 0x61C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : EPDC_DATA02_ALT3

Selecting Pad: EPDC_DATA02 Mode: ALT3 for KPP_ROW2

0x1 : ENET1_RGMII_RD2_ALT6

Selecting Pad: ENET1_RGMII_RD2 Mode: ALT6 for KPP_ROW2

End of enumeration elements list.

KPP_ROW3_SELECT_INPUT

KPP_ROW3_SELECT_INPUT DAISY Register
address_offset : 0x620 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : EPDC_DATA00_ALT3

Selecting Pad: EPDC_DATA00 Mode: ALT3 for KPP_ROW3

0x1 : ENET1_RGMII_RD0_ALT6

Selecting Pad: ENET1_RGMII_RD0 Mode: ALT6 for KPP_ROW3

End of enumeration elements list.

KPP_ROW4_SELECT_INPUT

KPP_ROW4_SELECT_INPUT DAISY Register
address_offset : 0x624 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : EPDC_SDCLK_ALT3

Selecting Pad: EPDC_SDCLK Mode: ALT3 for KPP_ROW4

0x1 : GPIO1_IO06_ALT6

Selecting Pad: GPIO1_IO06 Mode: ALT6 for KPP_ROW4

End of enumeration elements list.

KPP_ROW5_SELECT_INPUT

KPP_ROW5_SELECT_INPUT DAISY Register
address_offset : 0x628 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : GPIO1_IO09_ALT6

Selecting Pad: GPIO1_IO09 Mode: ALT6 for KPP_ROW5

0x1 : EPDC_SDSHR_ALT3

Selecting Pad: EPDC_SDSHR Mode: ALT3 for KPP_ROW5

End of enumeration elements list.

KPP_ROW6_SELECT_INPUT

KPP_ROW6_SELECT_INPUT DAISY Register
address_offset : 0x62C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : GPIO1_IO11_ALT6

Selecting Pad: GPIO1_IO11 Mode: ALT6 for KPP_ROW6

0x1 : EPDC_SDCE3_ALT3

Selecting Pad: EPDC_SDCE3 Mode: ALT3 for KPP_ROW6

End of enumeration elements list.

KPP_ROW7_SELECT_INPUT

KPP_ROW7_SELECT_INPUT DAISY Register
address_offset : 0x630 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : EPDC_GDOE_ALT3

Selecting Pad: EPDC_GDOE Mode: ALT3 for KPP_ROW7

0x1 : SAI2_TX_DATA_ALT6

Selecting Pad: SAI2_TX_DATA Mode: ALT6 for KPP_ROW7

End of enumeration elements list.

LCD_BUSY_SELECT_INPUT

LCD_BUSY_SELECT_INPUT DAISY Register
address_offset : 0x634 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : EPDC_DATA08_ALT7

Selecting Pad: EPDC_DATA08 Mode: ALT7 for LCD_BUSY

0x1 : EPDC_GDSP_ALT6

Selecting Pad: EPDC_GDSP Mode: ALT6 for LCD_BUSY

End of enumeration elements list.

LCD_DATA00_SELECT_INPUT

LCD_DATA00_SELECT_INPUT DAISY Register
address_offset : 0x638 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : EPDC_DATA00_ALT6

Selecting Pad: EPDC_DATA00 Mode: ALT6 for LCD_DATA00

0x1 : EPDC_DATA09_ALT7

Selecting Pad: EPDC_DATA09 Mode: ALT7 for LCD_DATA

0x2 : LCD_DATA00_ALT0

Selecting Pad: LCD_DATA00 Mode: ALT0 for LCD_DATA00

End of enumeration elements list.

LCD_DATA01_SELECT_INPUT

LCD_DATA01_SELECT_INPUT DAISY Register
address_offset : 0x63C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : EPDC_DATA01_ALT6

Selecting Pad: EPDC_DATA01 Mode: ALT6 for LCD_DATA01

0x1 : EPDC_DATA11_ALT7

Selecting Pad: EPDC_DATA11 Mode: ALT7 for LCD_DATA01

0x2 : LCD_DATA01_ALT0

Selecting Pad: LCD_DATA01 Mode: ALT0 for LCD_DATA01

End of enumeration elements list.

SW_MUX_CTL_PAD_EPDC_DATA12

SW_MUX_CTL_PAD_EPDC_DATA12 SW MUX Control Register
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 3 (4 bit)
access : read-write

Enumeration:

0 : ALT0_EPDC_DATA12

Select mux mode: ALT0 mux port: DATA12 of instance: EPDC

0x1 : ALT1_SIM1_PORT1_PD

Select mux mode: ALT1 mux port: PORT1_PD of instance: SIM1

0x2 : ALT2_QSPI_B_DQS

Select mux mode: ALT2 mux port: B_DQS of instance: QSPI

0x3 : ALT3_UART7_RX_DATA

Select mux mode: ALT3 mux port: RX_DATA of instance: UART7

0x4 : ALT4_EIM_LBA_B

Select mux mode: ALT4 mux port: LBA_B of instance: EIM

0x5 : ALT5_GPIO2_IO12

Select mux mode: ALT5 mux port: IO12 of instance: GPIO2

0x6 : ALT6_LCD_DATA12

Select mux mode: ALT6 mux port: DATA12 of instance: LCD

0x7 : ALT7_LCD_DATA21

Select mux mode: ALT7 mux port: DATA21 of instance: LCD

0x8 : ALT8_EPDC_GDCLK

Select mux mode: ALT8 mux port: GDCLK of instance: EPDC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad EPDC_DATA12

End of enumeration elements list.

LCD_DATA02_SELECT_INPUT

LCD_DATA02_SELECT_INPUT DAISY Register
address_offset : 0x640 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : EPDC_DATA02_ALT6

Selecting Pad: EPDC_DATA02 Mode: ALT6 for LCD_DATA02

0x1 : EPDC_SDCE3_ALT7

Selecting Pad: EPDC_SDCE3 Mode: ALT7 for LCD_DATA02

0x2 : LCD_DATA02_ALT0

Selecting Pad: LCD_DATA02 Mode: ALT0 for LCD_DATA02

End of enumeration elements list.

LCD_DATA03_SELECT_INPUT

LCD_DATA03_SELECT_INPUT DAISY Register
address_offset : 0x644 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : EPDC_DATA03_ALT6

Selecting Pad: EPDC_DATA03 Mode: ALT6 for LCD_DATA03

0x1 : EPDC_SDCE2_ALT7

Selecting Pad: EPDC_SDCE2 Mode: ALT7 for LCD_DATA03

0x2 : LCD_DATA03_ALT0

Selecting Pad: LCD_DATA03 Mode: ALT0 for LCD_DATA03

End of enumeration elements list.

LCD_DATA04_SELECT_INPUT

LCD_DATA04_SELECT_INPUT DAISY Register
address_offset : 0x648 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : EPDC_DATA04_ALT6

Selecting Pad: EPDC_DATA04 Mode: ALT6 for LCD_DATA04

0x1 : EPDC_SDCE1_ALT7

Selecting Pad: EPDC_SDCE1 Mode: ALT7 for LCD_DATA04

0x2 : LCD_DATA04_ALT0

Selecting Pad: LCD_DATA04 Mode: ALT0 for LCD_DATA04

End of enumeration elements list.

LCD_DATA05_SELECT_INPUT

LCD_DATA05_SELECT_INPUT DAISY Register
address_offset : 0x64C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : EPDC_DATA05_ALT6

Selecting Pad: EPDC_DATA05 Mode: ALT6 for LCD_DATA05

0x1 : EPDC_SDCE0_ALT7

Selecting Pad: EPDC_SDCE0 Mode: ALT7 for LCD_DATA05

0x2 : LCD_DATA05_ALT0

Selecting Pad: LCD_DATA05 Mode: ALT0 for LCD_DATA05

End of enumeration elements list.

LCD_DATA06_SELECT_INPUT

LCD_DATA06_SELECT_INPUT DAISY Register
address_offset : 0x650 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : EPDC_DATA06_ALT6

Selecting Pad: EPDC_DATA06 Mode: ALT6 for LCD_DATA06

0x1 : EPDC_BDR1_ALT7

Selecting Pad: EPDC_BDR1 Mode: ALT7 for LCD_DATA06

0x2 : LCD_DATA06_ALT0

Selecting Pad: LCD_DATA06 Mode: ALT0 for LCD_DATA06

End of enumeration elements list.

LCD_DATA07_SELECT_INPUT

LCD_DATA07_SELECT_INPUT DAISY Register
address_offset : 0x654 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : EPDC_DATA07_ALT6

Selecting Pad: EPDC_DATA07 Mode: ALT6 for LCD_DATA07

0x1 : EPDC_BDR0_ALT7

Selecting Pad: EPDC_BDR0 Mode: ALT7 for LCD_DATA07

0x2 : LCD_DATA07_ALT0

Selecting Pad: LCD_DATA07 Mode: ALT0 for LCD_DATA07

End of enumeration elements list.

LCD_DATA08_SELECT_INPUT

LCD_DATA08_SELECT_INPUT DAISY Register
address_offset : 0x658 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : EPDC_DATA08_ALT6

Selecting Pad: EPDC_DATA08 Mode: ALT6 for LCD_DATA08

0x1 : EPDC_SDLE_ALT7

Selecting Pad: EPDC_SDLE Mode: ALT7 for LCD_DATA08

0x2 : LCD_DATA08_ALT0

Selecting Pad: LCD_DATA08 Mode: ALT0 for LCD_DATA08

End of enumeration elements list.

LCD_DATA09_SELECT_INPUT

LCD_DATA09_SELECT_INPUT DAISY Register
address_offset : 0x65C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : EPDC_DATA09_ALT6

Selecting Pad: EPDC_DATA09 Mode: ALT6 for LCD_DATA09

0x1 : EPDC_DATA10_ALT7

Selecting Pad: EPDC_DATA10 Mode: ALT7 for LCD_DATA09

0x2 : LCD_DATA09_ALT0

Selecting Pad: LCD_DATA09 Mode: ALT0 for LCD_DATA09

End of enumeration elements list.

LCD_DATA10_SELECT_INPUT

LCD_DATA10_SELECT_INPUT DAISY Register
address_offset : 0x660 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : EPDC_DATA10_ALT6

Selecting Pad: EPDC_DATA10 Mode: ALT6 for LCD_DATA10

0x1 : EPDC_SDSHR_ALT7

Selecting Pad: EPDC_SDSHR Mode: ALT7 for LCD_DATA10

0x2 : LCD_DATA10_ALT0

Selecting Pad: LCD_DATA10 Mode: ALT0 for LCD_DATA10

End of enumeration elements list.

LCD_DATA11_SELECT_INPUT

LCD_DATA11_SELECT_INPUT DAISY Register
address_offset : 0x664 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : EPDC_DATA11_ALT6

Selecting Pad: EPDC_DATA11 Mode: ALT6 for LCD_DATA11

0x1 : EPDC_PWR_COM_ALT7

Selecting Pad: EPDC_PWR_COM Mode: ALT7 for LCD_DATA11

0x2 : LCD_DATA11_ALT0

Selecting Pad: LCD_DATA11 Mode: ALT0 for LCD_DATA11

End of enumeration elements list.

LCD_DATA12_SELECT_INPUT

LCD_DATA12_SELECT_INPUT DAISY Register
address_offset : 0x668 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : EPDC_DATA12_ALT6

Selecting Pad: EPDC_DATA12 Mode: ALT6 for LCD_DATA12

0x1 : EPDC_PWR_STAT_ALT7

Selecting Pad: EPDC_PWR_STAT Mode: ALT7 for LCD_DATA12

0x2 : LCD_DATA12_ALT0

Selecting Pad: LCD_DATA12 Mode: ALT0 for LCD_DATA12

End of enumeration elements list.

LCD_DATA13_SELECT_INPUT

LCD_DATA13_SELECT_INPUT DAISY Register
address_offset : 0x66C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : EPDC_DATA13_ALT6

Selecting Pad: EPDC_DATA13 Mode: ALT6 for LCD_DATA13

0x1 : LCD_DATA13_ALT0

Selecting Pad: LCD_DATA13 Mode: ALT0 for LCD_DATA13

0x2 : ECSPI2_SCLK_ALT4

Selecting Pad: ECSPI2_SCLK Mode: ALT4 for LCD_DATA13

End of enumeration elements list.

LCD_DATA14_SELECT_INPUT

LCD_DATA14_SELECT_INPUT DAISY Register
address_offset : 0x670 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : EPDC_DATA14_ALT6

Selecting Pad: EPDC_DATA14 Mode: ALT6 for LCD_DATA14

0x1 : LCD_DATA14_ALT0

Selecting Pad: LCD_DATA14 Mode: ALT0 for LCD_DATA14

0x2 : ECSPI2_MOSI_ALT4

Selecting Pad: ECSPI2_MOSI Mode: ALT4 for LCD_DATA14

End of enumeration elements list.

LCD_DATA15_SELECT_INPUT

LCD_DATA15_SELECT_INPUT DAISY Register
address_offset : 0x674 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : EPDC_DATA15_ALT6

Selecting Pad: EPDC_DATA15 Mode: ALT6 for LCD_DATA15

0x1 : LCD_DATA15_ALT0

Selecting Pad: LCD_DATA15 Mode: ALT0 for LCD_DATA15

0x2 : ECSPI2_MISO_ALT4

Selecting Pad: ECSPI2_MISO Mode: ALT4 for LCD_DATA15

End of enumeration elements list.

LCD_DATA16_SELECT_INPUT

LCD_DATA16_SELECT_INPUT DAISY Register
address_offset : 0x678 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : EPDC_SDLE_ALT6

Selecting Pad: EPDC_SDLE Mode: ALT6 for LCD_DATA16

0x1 : EPDC_GDCLK_ALT7

Selecting Pad: EPDC_GDCLK Mode: ALT7 for LCD_DATA16

0x2 : LCD_DATA16_ALT0

Selecting Pad: LCD_DATA16 Mode: ALT0 for LCD_DATA16

End of enumeration elements list.

LCD_DATA17_SELECT_INPUT

LCD_DATA17_SELECT_INPUT DAISY Register
address_offset : 0x67C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : EPDC_SDOE_ALT6

Selecting Pad: EPDC_SDOE Mode: ALT6 for LCD_DATA17

0x1 : EPDC_GDSP_ALT7

Selecting Pad: EPDC_GDSP Mode: ALT7 for LCD_DATA17

0x2 : LCD_DATA17_ALT0

Selecting Pad: LCD_DATA17 Mode: ALT0 for LCD_DATA17

End of enumeration elements list.

SW_MUX_CTL_PAD_EPDC_DATA13

SW_MUX_CTL_PAD_EPDC_DATA13 SW MUX Control Register
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 3 (4 bit)
access : read-write

Enumeration:

0 : ALT0_EPDC_DATA13

Select mux mode: ALT0 mux port: DATA13 of instance: EPDC

0x1 : ALT1_SIM2_PORT1_TRXD

Select mux mode: ALT1 mux port: PORT1_TRXD of instance: SIM2

0x2 : ALT2_QSPI_B_SCLK

Select mux mode: ALT2 mux port: B_SCLK of instance: QSPI

0x3 : ALT3_UART7_TX_DATA

Select mux mode: ALT3 mux port: TX_DATA of instance: UART7

0x4 : ALT4_EIM_WAIT

Select mux mode: ALT4 mux port: WAIT of instance: EIM

0x5 : ALT5_GPIO2_IO13

Select mux mode: ALT5 mux port: IO13 of instance: GPIO2

0x6 : ALT6_LCD_DATA13

Select mux mode: ALT6 mux port: DATA13 of instance: LCD

0x7 : ALT7_LCD_CS

Select mux mode: ALT7 mux port: CS of instance: LCD

0x8 : ALT8_EPDC_GDOE

Select mux mode: ALT8 mux port: GDOE of instance: EPDC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad EPDC_DATA13

End of enumeration elements list.

LCD_DATA18_SELECT_INPUT

LCD_DATA18_SELECT_INPUT DAISY Register
address_offset : 0x680 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : EPDC_SDSHR_ALT6

Selecting Pad: EPDC_SDSHR Mode: ALT6 for LCD_DATA18

0x1 : EPDC_GDOE_ALT7

Selecting Pad: EPDC_GDOE Mode: ALT7 for LCD_DATA18

0x2 : LCD_DATA18_ALT0

Selecting Pad: LCD_DATA18 Mode: ALT0 for LCD_DATA18

End of enumeration elements list.

LCD_DATA19_SELECT_INPUT

LCD_DATA19_SELECT_INPUT DAISY Register
address_offset : 0x684 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : EPDC_SDCE0_ALT6

Selecting Pad: EPDC_SDCE0 Mode: ALT6 for LCD_DATA19

0x1 : EPDC_GDRL_ALT7

Selecting Pad: EPDC_GDRL Mode: ALT7 for LCD_DATA19

0x2 : LCD_DATA19_ALT0

Selecting Pad: LCD_DATA19 Mode: ALT0 for LCD_DATA19

End of enumeration elements list.

LCD_DATA20_SELECT_INPUT

LCD_DATA20_SELECT_INPUT DAISY Register
address_offset : 0x688 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : EPDC_SDCLK_ALT7

Selecting Pad: EPDC_SDCLK Mode: ALT7 for LCD_DATA20

0x1 : EPDC_SDCE1_ALT6

Selecting Pad: EPDC_SDCE1 Mode: ALT6 for LCD_DATA20

0x2 : LCD_DATA20_ALT0

Selecting Pad: LCD_DATA20 Mode: ALT0 for LCD_DATA20

End of enumeration elements list.

LCD_DATA21_SELECT_INPUT

LCD_DATA21_SELECT_INPUT DAISY Register
address_offset : 0x68C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : EPDC_DATA12_ALT7

Selecting Pad: EPDC_DATA12 Mode: ALT7 for LCD_DATA21

0x1 : EPDC_SDCE2_ALT6

Selecting Pad: EPDC_SDCE2 Mode: ALT6 for LCD_DATA21

0x2 : LCD_DATA21_ALT0

Selecting Pad: LCD_DATA21 Mode: ALT0 for LCD_DATA21

End of enumeration elements list.

LCD_DATA22_SELECT_INPUT

LCD_DATA22_SELECT_INPUT DAISY Register
address_offset : 0x690 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : EPDC_DATA14_ALT7

Selecting Pad: EPDC_DATA14 Mode: ALT7 for LCD_DATA22

0x1 : EPDC_SDCE3_ALT6

Selecting Pad: EPDC_SDCE3 Mode: ALT6 for LCD_DATA22

0x2 : LCD_DATA22_ALT0

Selecting Pad: LCD_DATA22 Mode: ALT0 for LCD_DATA22

End of enumeration elements list.

LCD_DATA23_SELECT_INPUT

LCD_DATA23_SELECT_INPUT DAISY Register
address_offset : 0x694 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : EPDC_SDOE_ALT7

Selecting Pad: EPDC_SDOE Mode: ALT7 for LCD_DATA23

0x1 : EPDC_GDCLK_ALT6

Selecting Pad: EPDC_GDCLK Mode: ALT6 for LCD_DATA23

0x2 : LCD_DATA23_ALT0

Selecting Pad: LCD_DATA23 Mode: ALT0 for LCD_DATA23

End of enumeration elements list.

LCD_VSYNC_SELECT_INPUT

LCD_VSYNC_SELECT_INPUT DAISY Register
address_offset : 0x698 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : EPDC_DATA02_ALT7

Selecting Pad: EPDC_DATA02 Mode: ALT7 for LCD_VSYNC

0x1 : EPDC_PWR_STAT_ALT6

Selecting Pad: EPDC_PWR_STAT Mode: ALT6 for LCD_VSYNC

0x2 : LCD_VSYNC_ALT0

Selecting Pad: LCD_VSYNC Mode: ALT0 for LCD_VSYNC

End of enumeration elements list.

SAI1_RX_BCLK_SELECT_INPUT

SAI1_RX_BCLK_SELECT_INPUT DAISY Register
address_offset : 0x69C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : SAI1_RX_BCLK_ALT0

Selecting Pad: SAI1_RX_BCLK Mode: ALT0 for SAI1_RX_BCLK

0x1 : ENET1_TXC_ALT2

Selecting Pad: ENET1_TXC Mode: ALT2 for SAI1_RX_BCLK

End of enumeration elements list.

SAI1_RX_DATA_SELECT_INPUT

SAI1_RX_DATA_SELECT_INPUT DAISY Register
address_offset : 0x6A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : SAI1_RX_DATA_ALT0

Selecting Pad: SAI1_RX_DATA Mode: ALT0 for SAI1_RX_DATA

0x1 : ENET1_TX_CLK_ALT2

Selecting Pad: ENET1_TX_CLK Mode: ALT2 for SAI1_RX_DATA

End of enumeration elements list.

SAI1_RX_SYNC_SELECT_INPUT

SAI1_RX_SYNC_SELECT_INPUT DAISY Register
address_offset : 0x6A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : SAI1_RX_SYNC_ALT0

Selecting Pad: SAI1_RX_SYNC Mode: ALT0 for SAI1_RX_SYNC

0x1 : ENET1_TX_CTL_ALT2

Selecting Pad: ENET1_TX_CTL Mode: ALT2 for SAI1_RX_SYNC

End of enumeration elements list.

SAI1_TX_BCLK_SELECT_INPUT

SAI1_TX_BCLK_SELECT_INPUT DAISY Register
address_offset : 0x6A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : SAI1_TX_BCLK_ALT0

Selecting Pad: SAI1_TX_BCLK Mode: ALT0 for SAI1_TX_BCLK

0x1 : ENET1_RX_CLK_ALT2

Selecting Pad: ENET1_RX_CLK Mode: ALT2 for SAI1_TX_BCLK

End of enumeration elements list.

SAI1_TX_SYNC_SELECT_INPUT

SAI1_TX_SYNC_SELECT_INPUT DAISY Register
address_offset : 0x6AC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : SAI1_TX_SYNC_ALT0

Selecting Pad: SAI1_TX_SYNC Mode: ALT0 for SAI1_TX_SYNC

0x1 : ENET1_CRS_ALT2

Selecting Pad: ENET1_CRS Mode: ALT2 for SAI1_TX_SYNC

End of enumeration elements list.

SAI2_RX_BCLK_SELECT_INPUT

SAI2_RX_BCLK_SELECT_INPUT DAISY Register
address_offset : 0x6B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : SD2_CMD_ALT1

Selecting Pad: SD2_CMD Mode: ALT1 for SAI2_RX_BCLK

0x1 : SAI1_RX_BCLK_ALT2

Selecting Pad: SAI1_RX_BCLK Mode: ALT2 for SAI2_RX_BCLK

End of enumeration elements list.

SAI2_RX_DATA_SELECT_INPUT

SAI2_RX_DATA_SELECT_INPUT DAISY Register
address_offset : 0x6B4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : SD2_DATA0_ALT1

Selecting Pad: SD2_DATA0 Mode: ALT1 for SAI2_RX_DATA

0x1 : SAI2_RX_DATA_ALT0

Selecting Pad: SAI2_RX_DATA Mode: ALT0 for SAI2_RX_DATA

End of enumeration elements list.

SAI2_RX_SYNC_SELECT_INPUT

SAI2_RX_SYNC_SELECT_INPUT DAISY Register
address_offset : 0x6B8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : SD2_CLK_ALT1

Selecting Pad: SD2_CLK Mode: ALT1 for SAI2_RX_SYNC

0x1 : SAI1_RX_SYNC_ALT2

Selecting Pad: SAI1_RX_SYNC Mode: ALT2 for SAI2_RX_SYNC

End of enumeration elements list.

SAI2_TX_BCLK_SELECT_INPUT

SAI2_TX_BCLK_SELECT_INPUT DAISY Register
address_offset : 0x6BC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : SD2_DATA1_ALT1

Selecting Pad: SD2_DATA1 Mode: ALT1 for SAI2_TX_BCLK

0x1 : SAI2_TX_BCLK_ALT0

Selecting Pad: SAI2_TX_BCLK Mode: ALT0 for SAI2_TX_BCLK

End of enumeration elements list.

SW_MUX_CTL_PAD_EPDC_DATA14

SW_MUX_CTL_PAD_EPDC_DATA14 SW MUX Control Register
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 3 (4 bit)
access : read-write

Enumeration:

0 : ALT0_EPDC_DATA14

Select mux mode: ALT0 mux port: DATA14 of instance: EPDC

0x1 : ALT1_SIM2_PORT1_CLK

Select mux mode: ALT1 mux port: PORT1_CLK of instance: SIM2

0x2 : ALT2_QSPI_B_SS0_B

Select mux mode: ALT2 mux port: B_SS0_B of instance: QSPI

0x3 : ALT3_UART7_RTS_B

Select mux mode: ALT3 mux port: RTS_B of instance: UART7

0x4 : ALT4_EIM_EB_B0

Select mux mode: ALT4 mux port: EB_B0 of instance: EIM

0x5 : ALT5_GPIO2_IO14

Select mux mode: ALT5 mux port: IO14 of instance: GPIO2

0x6 : ALT6_LCD_DATA14

Select mux mode: ALT6 mux port: DATA14 of instance: LCD

0x7 : ALT7_LCD_DATA22

Select mux mode: ALT7 mux port: DATA22 of instance: LCD

0x8 : ALT8_EPDC_GDSP

Select mux mode: ALT8 mux port: GDSP of instance: EPDC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad EPDC_DATA14

End of enumeration elements list.

SAI2_TX_SYNC_SELECT_INPUT

SAI2_TX_SYNC_SELECT_INPUT DAISY Register
address_offset : 0x6C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : SD2_DATA2_ALT1

Selecting Pad: SD2_DATA2 Mode: ALT1 for SAI2_TX_SYNC

0x1 : SAI2_TX_SYNC_ALT0

Selecting Pad: SAI2_TX_SYNC Mode: ALT0 for SAI2_TX_SYNC

End of enumeration elements list.

SAI3_RX_BCLK_SELECT_INPUT

SAI3_RX_BCLK_SELECT_INPUT DAISY Register
address_offset : 0x6C4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : UART2_RX_DATA_ALT2

Selecting Pad: UART2_RX_DATA Mode: ALT2 for SAI3_RX_BCLK

0x1 : SD1_CMD_ALT1

Selecting Pad: SD1_CMD Mode: ALT1 for SAI3_RX_BCLK

0x2 : SD3_CMD_ALT3

Selecting Pad: SD3_CMD Mode: ALT3 for SAI3_RX_BCLK

End of enumeration elements list.

SAI3_RX_DATA_SELECT_INPUT

SAI3_RX_DATA_SELECT_INPUT DAISY Register
address_offset : 0x6C8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : UART2_TX_DATA_ALT2

Selecting Pad: UART2_TX_DATA Mode: ALT2 for SAI3_RX_DATA

0x1 : SD1_DATA0_ALT1

Selecting Pad: SD1_DATA0 Mode: ALT1 for SAI3_RX_DATA

0x2 : SD3_DATA0_ALT3

Selecting Pad: SD3_DATA0 Mode: ALT3 for

End of enumeration elements list.

SAI3_RX_SYNC_SELECT_INPUT

SAI3_RX_SYNC_SELECT_INPUT DAISY Register
address_offset : 0x6CC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : UART3_RX_DATA_ALT2

Selecting Pad: UART3_RX_DATA Mode: ALT2 for SAI3_RX_SYNC

0x1 : SD1_CLK_ALT1

Selecting Pad: SD1_CLK Mode: ALT1 for SAI3_RX_SYNC

0x2 : SD3_CLK_ALT3

Selecting Pad: SD3_CLK Mode: ALT3 for SAI3_RX_SYNC

End of enumeration elements list.

SAI3_TX_BCLK_SELECT_INPUT

SAI3_TX_BCLK_SELECT_INPUT DAISY Register
address_offset : 0x6D0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : UART3_TX_DATA_ALT2

Selecting Pad: UART3_TX_DATA Mode: ALT2 for SAI3_TX_BCLK

0x1 : SD1_DATA1_ALT1

Selecting Pad: SD1_DATA1 Mode: ALT1 for SAI3_TX_BCLK

0x2 : SD3_DATA1_ALT3

Selecting Pad: SD3_DATA1 Mode: ALT3 for SAI3_TX_BCLK

End of enumeration elements list.

SAI3_TX_SYNC_SELECT_INPUT

SAI3_TX_SYNC_SELECT_INPUT DAISY Register
address_offset : 0x6D4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : UART3_CTS_B_ALT2

Selecting Pad: UART3_CTS_B Mode: ALT2 for SAI3_TX_SYNC

0x1 : SD1_DATA2_ALT1

Selecting Pad: SD1_DATA2 Mode: ALT1 for SAI3_TX_SYNC

0x2 : SD3_DATA2_ALT3

Selecting Pad: SD3_DATA2 Mode: ALT3 for SAI3_TX_SYNC

End of enumeration elements list.

SDMA_EVENTS0_SELECT_INPUT

SDMA_EVENTS0_SELECT_INPUT DAISY Register
address_offset : 0x6D8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : GPIO1_IO14_ALT6

Selecting Pad: GPIO1_IO14 Mode: ALT6 for SDMA_EVENTS0

0x1 : I2C3_SCL_ALT4

Selecting Pad: I2C3_SCL Mode: ALT4 for SDMA_EVENTS0

0x2 : SD2_CD_B_ALT6

Selecting Pad: SD2_CD_B Mode: ALT6 for SDMA_EVENTS0

End of enumeration elements list.

SDMA_EVENTS1_SELECT_INPUT

SDMA_EVENTS1_SELECT_INPUT DAISY Register
address_offset : 0x6DC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : GPIO1_IO15_ALT6

Selecting Pad: GPIO1_IO15 Mode: ALT6 for SDMA_EVENTS1

0x1 : I2C3_SDA_ALT4

Selecting Pad: I2C3_SDA Mode: ALT4 for SDMA_EVENTS1

0x2 : SD2_WP_ALT6

Selecting Pad: SD2_WP Mode: ALT6 for SDMA_EVENTS1

End of enumeration elements list.

SIM1_PORT1_PD_SELECT_INPUT

SIM1_PORT1_PD_SELECT_INPUT DAISY Register
address_offset : 0x6E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : EPDC_DATA12_ALT1

Selecting Pad: EPDC_DATA12 Mode: ALT1 for SIM1_PORT1_PD

0x1 : SAI1_RX_SYNC_ALT4

Selecting Pad: SAI1_RX_SYNC Mode: ALT4 for SIM1_PORT1_PD

End of enumeration elements list.

SIM1_PORT1_TRXD_SELECT_INPUT

SIM1_PORT1_TRXD_SELECT_INPUT DAISY Register
address_offset : 0x6E4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : EPDC_DATA08_ALT1

Selecting Pad: EPDC_DATA08 Mode: ALT1 for SIM1_PORT1_TRXD

0x1 : SAI1_RX_DATA_ALT4

Selecting Pad: SAI1_RX_DATA Mode: ALT4 for SIM1_PORT1_TRXD

End of enumeration elements list.

SIM2_PORT1_PD_SELECT_INPUT

SIM2_PORT1_PD_SELECT_INPUT DAISY Register
address_offset : 0x6E8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : EPDC_SDCE3_ALT1

Selecting Pad: EPDC_SDCE3 Mode: ALT1 for SIM2_PORT1_PD

0x1 : SD2_DATA3_ALT4

Selecting Pad: SD2_DATA3 Mode: ALT4 for SIM2_PORT1_PD

End of enumeration elements list.

SIM2_PORT1_TRXD_SELECT_INPUT

SIM2_PORT1_TRXD_SELECT_INPUT DAISY Register
address_offset : 0x6EC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : EPDC_DATA13_ALT1

Selecting Pad: EPDC_DATA13 Mode: ALT1 for SIM2_PORT1_TRXD

0x1 : SD2_CMD_ALT4

Selecting Pad: SD2_CMD Mode: ALT4 for SIM2_PORT1_TRXD

End of enumeration elements list.

UART1_RTS_B_SELECT_INPUT

UART1_RTS_B_SELECT_INPUT DAISY Register
address_offset : 0x6F0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : SAI2_TX_SYNC_ALT3

Selecting Pad: SAI2_TX_SYNC Mode: ALT3 for UART1_RTS_B

0x1 : SAI2_TX_BCLK_ALT3

Selecting Pad: SAI2_TX_BCLK Mode: ALT3 for UART1_RTS_B

0x2 : ENET1_RGMII_RD0_ALT3

Selecting Pad: ENET1_RGMII_RD0 Mode: ALT3 for UART1_RTS_B

0x3 : ENET1_RGMII_RD1_ALT3

Selecting Pad: ENET1_RGMII_RD1 Mode: ALT3 for UART1_RTS_B

End of enumeration elements list.

UART1_RX_DATA_SELECT_INPUT

UART1_RX_DATA_SELECT_INPUT DAISY Register
address_offset : 0x6F4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : UART1_RX_DATA_ALT0

Selecting Pad: UART1_RX_DATA Mode: ALT0 for UART1_RX_DATA

0x1 : UART1_TX_DATA_ALT0

Selecting Pad: UART1_TX_DATA Mode: ALT0 for UART1_RX_DATA

0x2 : ENET1_RGMII_RD2_ALT3

Selecting Pad: ENET1_RGMII_RD2 Mode: ALT3 for UART1_RX_DATA

0x3 : ENET1_RGMII_RD3_ALT3

Selecting Pad: ENET1_RGMII_RD3 Mode: ALT3 for UART1_RX_DATA

End of enumeration elements list.

UART2_RTS_B_SELECT_INPUT

UART2_RTS_B_SELECT_INPUT DAISY Register
address_offset : 0x6F8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : LCD_HSYNC_ALT4

Selecting Pad: LCD_HSYNC Mode: ALT4 for UART2_RTS_B

0x1 : LCD_VSYNC_ALT4

Selecting Pad: LCD_VSYNC Mode: ALT4 for UART2_RTS_B

0x2 : SAI2_RX_DATA_ALT3

Selecting Pad: SAI2_RX_DATA Mode: ALT3 for UART2_RTS_B

0x3 : SAI2_TX_DATA_ALT3

Selecting Pad: SAI2_TX_DATA Mode: ALT3 for UART2_RTS_B

End of enumeration elements list.

UART2_RX_DATA_SELECT_INPUT

UART2_RX_DATA_SELECT_INPUT DAISY Register
address_offset : 0x6FC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : LCD_CLK_ALT4

Selecting Pad: LCD_CLK Mode: ALT4 for UART2_RX_DATA

0x1 : LCD_ENABLE_ALT4

Selecting Pad: LCD_ENABLE Mode: ALT4 for UART2_RX_DATA

0x2 : UART2_RX_DATA_ALT0

Selecting Pad: UART2_RX_DATA Mode: ALT0 for UART2_RX_DATA

0x3 : UART2_TX_DATA_ALT0

Selecting Pad: UART2_TX_DATA Mode: ALT0 for UART2_RX_DATA

End of enumeration elements list.

SW_MUX_CTL_PAD_EPDC_DATA15

SW_MUX_CTL_PAD_EPDC_DATA15 SW MUX Control Register
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 3 (4 bit)
access : read-write

Enumeration:

0 : ALT0_EPDC_DATA15

Select mux mode: ALT0 mux port: DATA15 of instance: EPDC

0x1 : ALT1_SIM2_PORT1_RST_B

Select mux mode: ALT1 mux port: PORT1_RST_B of instance: SIM2

0x2 : ALT2_QSPI_B_SS1_B

Select mux mode: ALT2 mux port: B_SS1_B of instance: QSPI

0x3 : ALT3_UART7_CTS_B

Select mux mode: ALT3 mux port: CTS_B of instance: UART7

0x4 : ALT4_EIM_CS1_B

Select mux mode: ALT4 mux port: CS1_B of instance: EIM

0x5 : ALT5_GPIO2_IO15

Select mux mode: ALT5 mux port: IO15 of instance: GPIO2

0x6 : ALT6_LCD_DATA15

Select mux mode: ALT6 mux port: DATA15 of instance: LCD

0x7 : ALT7_LCD_WR_RWN

Select mux mode: ALT7 mux port: WR_RWN of instance: LCD

0x8 : ALT8_EPDC_PWR_COM

Select mux mode: ALT8 mux port: PWR_COM of instance: EPDC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad EPDC_DATA15

End of enumeration elements list.

UART3_RTS_B_SELECT_INPUT

UART3_RTS_B_SELECT_INPUT DAISY Register
address_offset : 0x700 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : GPIO1_IO10_ALT3

Selecting Pad: GPIO1_IO10 Mode: ALT3 for UART3_RTS_B

0x1 : GPIO1_IO11_ALT3

Selecting Pad: GPIO1_IO11 Mode: ALT3 for UART3_RTS_B

0x2 : UART3_RTS_B_ALT0

Selecting Pad: UART3_RTS_B Mode: ALT0 for UART3_RTS_B

0x3 : UART3_CTS_B_ALT0

Selecting Pad: UART3_CTS_B Mode: ALT0 for UART3_RTS_B

0x4 : SD3_DATA6_ALT3

Selecting Pad: SD3_DATA6 Mode: ALT3 for UART3_RTS_B

0x5 : SD3_DATA7_ALT3

Selecting Pad: SD3_DATA7 Mode: ALT3 for UART3_RTS_B

End of enumeration elements list.

UART3_RX_DATA_SELECT_INPUT

UART3_RX_DATA_SELECT_INPUT DAISY Register
address_offset : 0x704 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : GPIO1_IO08_ALT3

Selecting Pad: GPIO1_IO08 Mode: ALT3 for UART3_RX_DATA

0x1 : GPIO1_IO09_ALT3

Selecting Pad: GPIO1_IO09 Mode: ALT3 for UART3_RX_DATA

0x2 : UART3_RX_DATA_ALT0

Selecting Pad: UART3_RX_DATA Mode: ALT0 for UART3_RX_DATA

0x3 : UART3_TX_DATA_ALT0

Selecting Pad: UART3_TX_DATA Mode: ALT0 for UART3_RX_DATA

0x4 : SD3_DATA4_ALT3

Selecting Pad: SD3_DATA4 Mode: ALT3 for UART3_RX_DATA

0x5 : SD3_DATA5_ALT3

Selecting Pad: SD3_DATA5 Mode: ALT3 for UART3_RX_DATA

End of enumeration elements list.

UART4_RTS_B_SELECT_INPUT

UART4_RTS_B_SELECT_INPUT DAISY Register
address_offset : 0x708 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : I2C1_SCL_ALT1

Selecting Pad: I2C1_SCL Mode: ALT1 for UART4_RTS_B

0x1 : I2C1_SDA_ALT1

Selecting Pad: I2C1_SDA Mode: ALT1 for UART4_RTS_B

0x2 : SD2_DATA2_ALT2

Selecting Pad: SD2_DATA2 Mode: ALT2 for UART4_RTS_B

0x3 : SD2_DATA3_ALT2

Selecting Pad: SD2_DATA3 Mode: ALT2 for UART4_RTS_B

0x4 : SAI2_RX_DATA_ALT2

Selecting Pad: SAI2_RX_DATA Mode: ALT2 for UART4_RTS_B

0x5 : SAI2_TX_DATA_ALT2

Selecting Pad: SAI2_TX_DATA Mode: ALT2 for UART4_RTS_B

End of enumeration elements list.

UART4_RX_DATA_SELECT_INPUT

UART4_RX_DATA_SELECT_INPUT DAISY Register
address_offset : 0x70C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : I2C2_SCL_ALT1

Selecting Pad: I2C2_SCL Mode: ALT1 for UART4_RX_DATA

0x1 : I2C2_SDA_ALT1

Selecting Pad: I2C2_SDA Mode: ALT1 for UART4_RX_DATA

0x2 : SD2_DATA0_ALT2

Selecting Pad: SD2_DATA0 Mode: ALT2 for UART4_RX_DATA

0x3 : SD2_DATA1_ALT2

Selecting Pad: SD2_DATA1 Mode: ALT2 for UART4_RX_DATA

0x4 : SAI2_TX_SYNC_ALT2

Selecting Pad: SAI2_TX_SYNC Mode: ALT2 for UART4_RX_DATA

0x5 : SAI2_TX_BCLK_ALT2

Selecting Pad: SAI2_TX_BCLK Mode: ALT2 for UART4_RX_DATA

End of enumeration elements list.

UART5_RTS_B_SELECT_INPUT

UART5_RTS_B_SELECT_INPUT DAISY Register
address_offset : 0x710 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : I2C3_SCL_ALT1

Selecting Pad: I2C3_SCL Mode: ALT1 for UART5_RTS_B

0x1 : I2C3_SDA_ALT1

Selecting Pad: I2C3_SDA Mode: ALT1 for UART5_RTS_B

0x2 : SAI1_TX_SYNC_ALT2

Selecting Pad: SAI1_TX_SYNC Mode: ALT2 for UART5_RTS_B

0x3 : SAI1_TX_DATA_ALT2

Selecting Pad: SAI1_TX_DATA Mode: ALT2 for UART5_RTS_B

0x4 : GPIO1_IO04_ALT3

Selecting Pad: GPIO1_IO04 Mode: ALT3 for UART5_RTS_B

0x5 : GPIO1_IO05_ALT3

Selecting Pad: GPIO1_IO05 Mode: ALT3 for UART5_RTS_B

End of enumeration elements list.

UART5_RX_DATA_SELECT_INPUT

UART5_RX_DATA_SELECT_INPUT DAISY Register
address_offset : 0x714 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : I2C4_SCL_ALT1

Selecting Pad: I2C4_SCL Mode: ALT1 for UART5_RX_DATA

0x1 : I2C4_SDA_ALT1

Selecting Pad: I2C4_SDA Mode: ALT1 for UART5_RX_DATA

0x2 : SAI1_RX_DATA_ALT2

Selecting Pad: SAI1_RX_DATA Mode: ALT2 for UART5_RX_DATA

0x3 : SAI1_TX_BCLK_ALT2

Selecting Pad: SAI1_TX_BCLK Mode: ALT2 for UART5_RX_DATA

0x4 : GPIO1_IO06_ALT3

Selecting Pad: GPIO1_IO06 Mode: ALT3 for UART5_RX_DATA

0x5 : GPIO1_IO07_ALT3

Selecting Pad: GPIO1_IO07 Mode: ALT3 for UART5_RX_DATA

End of enumeration elements list.

UART6_RTS_B_SELECT_INPUT

UART6_RTS_B_SELECT_INPUT DAISY Register
address_offset : 0x718 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : EPDC_DATA10_ALT3

Selecting Pad: EPDC_DATA10 Mode: ALT3 for UART6_RTS_B

0x1 : EPDC_DATA11_ALT3

Selecting Pad: EPDC_DATA11 Mode: ALT3 for UART6_RTS_B

0x2 : ECSPI1_MISO_ALT1

Selecting Pad: ECSPI1_MISO Mode: ALT1 for UART6_RTS_B

0x3 : ECSPI1_SS0_ALT1

Selecting Pad: ECSPI1_SS0 Mode: ALT1 for UART6_RTS_B

0x4 : SD1_RESET_B_ALT2

Selecting Pad: SD1_RESET_B Mode: ALT2 for UART6_RTS_B

0x5 : SD1_CLK_ALT2

Selecting Pad: SD1_CLK Mode: ALT2 for UART6_RTS_B

End of enumeration elements list.

UART6_RX_DATA_SELECT_INPUT

UART6_RX_DATA_SELECT_INPUT DAISY Register
address_offset : 0x71C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : EPDC_DATA08_ALT3

Selecting Pad: EPDC_DATA08 Mode: ALT3 for UART6_RX_DATA

0x1 : EPDC_DATA09_ALT3

Selecting Pad: EPDC_DATA09 Mode: ALT3 for UART6_RX_DATA

0x2 : ECSPI1_SCLK_ALT1

Selecting Pad: ECSPI1_SCLK Mode: ALT1 for UART6_RX_DATA

0x3 : ECSPI1_MOSI_ALT1

Selecting Pad: ECSPI1_MOSI Mode: ALT1 for UART6_RX_DATA

0x4 : SD1_CD_B_ALT2

Selecting Pad: SD1_CD_B Mode: ALT2 for UART6_RX_DATA

0x5 : SD1_WP_ALT2

Selecting Pad: SD1_WP Mode: ALT2 for UART6_RX_DATA

End of enumeration elements list.

UART7_RTS_B_SELECT_INPUT

UART7_RTS_B_SELECT_INPUT DAISY Register
address_offset : 0x720 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : EPDC_DATA14_ALT3

Selecting Pad: EPDC_DATA14 Mode: ALT3 for UART7_RTS_B

0x1 : EPDC_DATA15_ALT3

Selecting Pad: EPDC_DATA15 Mode: ALT3 for UART7_RTS_B

0x2 : ECSPI2_MISO_ALT1

Selecting Pad: ECSPI2_MISO Mode: ALT1 for UART7_RTS_B

0x3 : ECSPI2_SS0_ALT1

Selecting Pad: ECSPI2_SS0 Mode: ALT1 for UART7_RTS_B

0x4 : SD1_DATA2_ALT2

Selecting Pad: SD1_DATA2 Mode: ALT2 for UART7_RTS_B

0x5 : SD1_DATA3_ALT2

Selecting Pad: SD1_DATA3 Mode: ALT2 for UART7_RTS_B

End of enumeration elements list.

UART7_RX_DATA_SELECT_INPUT

UART7_RX_DATA_SELECT_INPUT DAISY Register
address_offset : 0x724 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : EPDC_DATA12_ALT3

Selecting Pad: EPDC_DATA12 Mode: ALT3 for UART7_RX_DATA

0x1 : EPDC_DATA13_ALT3

Selecting Pad: EPDC_DATA13 Mode: ALT3 for UART7_RX_DATA

0x2 : ECSPI2_SCLK_ALT1

Selecting Pad: ECSPI2_SCLK Mode: ALT1 for UART7_RX_DATA

0x3 : ECSPI2_MOSI_ALT1

Selecting Pad: ECSPI2_MOSI Mode: ALT1 for UART7_RX_DATA

0x4 : SD1_DATA0_ALT2

Selecting Pad: SD1_DATA0 Mode: ALT2 for UART7_RX_DATA

0x5 : SD1_DATA1_ALT2

Selecting Pad: SD1_DATA1 Mode: ALT2 for UART7_RX_DATA

End of enumeration elements list.

USB_OTG2_OC_SELECT_INPUT

USB_OTG2_OC_SELECT_INPUT DAISY Register
address_offset : 0x728 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : UART3_RTS_B_ALT1

Selecting Pad: UART3_RTS_B Mode: ALT1 for USB_OTG2_OC

0x1 : GPIO1_IO06_ALT1

Selecting Pad: GPIO1_IO06 Mode: ALT1 for USB_OTG2_OC

End of enumeration elements list.

USB_OTG1_OC_SELECT_INPUT

USB_OTG1_OC_SELECT_INPUT DAISY Register
address_offset : 0x72C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : UART3_RX_DATA_ALT1

Selecting Pad: UART3_RX_DATA Mode: ALT1 for USB_OTG1_OC

0x1 : GPIO1_IO04_ALT1

Selecting Pad: GPIO1_IO04 Mode: ALT1 for USB_OTG1_OC

End of enumeration elements list.

USB_OTG2_ID_SELECT_INPUT

USB_OTG2_ID_SELECT_INPUT DAISY Register
address_offset : 0x730 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : GPIO1_IO13_ALT7

Selecting Pad: GPIO1_IO13 Mode: ALT7 for USB_OTG2_ID

0x1 : I2C4_SDA_ALT4

Selecting Pad: I2C4_SDA Mode: ALT4 for USB_OTG2_ID

0x2 : SD2_RESET_B_ALT4

Selecting Pad: SD2_RESET_B Mode: ALT4 for USB_OTG2_ID

0x3 : GPIO1_IO03_ALT7

Selecting Pad: GPIO1_IO03 Mode: ALT7 for USB_OTG2_ID

End of enumeration elements list.

USB_OTG1_ID_SELECT_INPUT

USB_OTG1_ID_SELECT_INPUT DAISY Register
address_offset : 0x734 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : GPIO1_IO12_ALT7

Selecting Pad: GPIO1_IO12 Mode: ALT7 for USB_OTG1_ID

0x1 : I2C4_SCL_ALT4

Selecting Pad: I2C4_SCL Mode: ALT4 for USB_OTG1_ID

0x2 : SD2_WP_ALT4

Selecting Pad: SD2_WP Mode: ALT4 for USB_OTG1_ID

0x3 : GPIO1_IO02_ALT7

Selecting Pad: GPIO1_IO02 Mode: ALT7 for USB_OTG1_ID

End of enumeration elements list.

SD3_CD_B_SELECT_INPUT

SD3_CD_B_SELECT_INPUT DAISY Register
address_offset : 0x738 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : GPIO1_IO14_ALT1

Selecting Pad: GPIO1_IO14 Mode: ALT1 for SD3_CD_B

0x1 : I2C2_SCL_ALT6

Selecting Pad: I2C2_SCL Mode: ALT6 for SD3_CD_B

0x2 : SD3_DATA7_ALT2

Selecting Pad: SD3_DATA7 Mode: ALT2 for SD3_CD_B

End of enumeration elements list.

SD3_WP_SELECT_INPUT

SD3_WP_SELECT_INPUT DAISY Register
address_offset : 0x73C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAISY : Input Select (DAISY) Field
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : GPIO1_IO15_ALT1

Selecting Pad: GPIO1_IO15 Mode: ALT1 for SD3_WP

0x1 : I2C2_SDA_ALT6

Selecting Pad: I2C2_SDA Mode: ALT6 for SD3_WP

0x2 : SD3_DATA6_ALT2

Selecting Pad: SD3_DATA6 Mode: ALT2 for SD3_WP

End of enumeration elements list.

SW_MUX_CTL_PAD_EPDC_SDCLK

SW_MUX_CTL_PAD_EPDC_SDCLK SW MUX Control Register
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_EPDC_SDCLK

Select mux mode: ALT0 mux port: SDCLK of instance: EPDC

0x1 : ALT1_SIM2_PORT2_SVEN

Select mux mode: ALT1 mux port: PORT2_SVEN of instance: SIM2

0x2 : ALT2_ENET2_RGMII_RD0

Select mux mode: ALT2 mux port: RGMII_RD0 of instance: ENET2

0x3 : ALT3_KPP_ROW4

Select mux mode: ALT3 mux port: ROW4 of instance: KPP

0x4 : ALT4_EIM_AD10

Select mux mode: ALT4 mux port: AD10 of instance: EIM

0x5 : ALT5_GPIO2_IO16

Select mux mode: ALT5 mux port: IO16 of instance: GPIO2

0x6 : ALT6_LCD_CLK

Select mux mode: ALT6 mux port: CLK of instance: LCD

0x7 : ALT7_LCD_DATA20

Select mux mode: ALT7 mux port: DATA20 of instance: LCD

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad EPDC_SDCLK

End of enumeration elements list.

SW_MUX_CTL_PAD_EPDC_SDLE

SW_MUX_CTL_PAD_EPDC_SDLE SW MUX Control Register
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_EPDC_SDLE

Select mux mode: ALT0 mux port: SDLE of instance: EPDC

0x1 : ALT1_SIM2_PORT2_PD

Select mux mode: ALT1 mux port: PORT2_PD of instance: SIM2

0x2 : ALT2_ENET2_RGMII_RD1

Select mux mode: ALT2 mux port: RGMII_RD1 of instance: ENET2

0x3 : ALT3_KPP_COL4

Select mux mode: ALT3 mux port: COL4 of instance: KPP

0x4 : ALT4_EIM_AD11

Select mux mode: ALT4 mux port: AD11 of instance: EIM

0x5 : ALT5_GPIO2_IO17

Select mux mode: ALT5 mux port: IO17 of instance: GPIO2

0x6 : ALT6_LCD_DATA16

Select mux mode: ALT6 mux port: DATA16 of instance: LCD

0x7 : ALT7_LCD_DATA8

Select mux mode: ALT7 mux port: DATA8 of instance: LCD

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad EPDC_SDLE

End of enumeration elements list.

SW_MUX_CTL_PAD_EPDC_SDOE

SW_MUX_CTL_PAD_EPDC_SDOE SW MUX Control Register
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_EPDC_SDOE

Select mux mode: ALT0 mux port: SDOE of instance: EPDC

0x1 : ALT1_FLEXTIMER1_CH0

Select mux mode: ALT1 mux port: CH0 of instance: FLEXTIMER1

0x2 : ALT2_ENET2_RGMII_RD2

Select mux mode: ALT2 mux port: RGMII_RD2 of instance: ENET2

0x3 : ALT3_KPP_COL5

Select mux mode: ALT3 mux port: COL5 of instance: KPP

0x4 : ALT4_EIM_AD12

Select mux mode: ALT4 mux port: AD12 of instance: EIM

0x5 : ALT5_GPIO2_IO18

Select mux mode: ALT5 mux port: IO18 of instance: GPIO2

0x6 : ALT6_LCD_DATA17

Select mux mode: ALT6 mux port: DATA17 of instance: LCD

0x7 : ALT7_LCD_DATA23

Select mux mode: ALT7 mux port: DATA23 of instance: LCD

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad EPDC_SDOE

End of enumeration elements list.

SW_MUX_CTL_PAD_EPDC_SDSHR

SW_MUX_CTL_PAD_EPDC_SDSHR SW MUX Control Register
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_EPDC_SDSHR

Select mux mode: ALT0 mux port: SDSHR of instance: EPDC

0x1 : ALT1_FLEXTIMER1_CH1

Select mux mode: ALT1 mux port: CH1 of instance: FLEXTIMER1

0x2 : ALT2_ENET2_RGMII_RD3

Select mux mode: ALT2 mux port: RGMII_RD3 of instance: ENET2

0x3 : ALT3_KPP_ROW5

Select mux mode: ALT3 mux port: ROW5 of instance: KPP

0x4 : ALT4_EIM_AD13

Select mux mode: ALT4 mux port: AD13 of instance: EIM

0x5 : ALT5_GPIO2_IO19

Select mux mode: ALT5 mux port: IO19 of instance: GPIO2

0x6 : ALT6_LCD_DATA18

Select mux mode: ALT6 mux port: DATA18 of instance: LCD

0x7 : ALT7_LCD_DATA10

Select mux mode: ALT7 mux port: DATA10 of instance: LCD

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad EPDC_SDSHR

End of enumeration elements list.

SW_MUX_CTL_PAD_EPDC_SDCE0

SW_MUX_CTL_PAD_EPDC_SDCE0 SW MUX Control Register
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_EPDC_SDCE0

Select mux mode: ALT0 mux port: SDCE0 of instance: EPDC

0x1 : ALT1_FLEXTIMER1_CH2

Select mux mode: ALT1 mux port: CH2 of instance: FLEXTIMER1

0x2 : ALT2_ENET2_RGMII_RX_CTL

Select mux mode: ALT2 mux port: RGMII_RX_CTL of instance: ENET2

0x4 : ALT4_EIM_AD14

Select mux mode: ALT4 mux port: AD14 of instance: EIM

0x5 : ALT5_GPIO2_IO20

Select mux mode: ALT5 mux port: IO20 of instance: GPIO2

0x6 : ALT6_LCD_DATA19

Select mux mode: ALT6 mux port: DATA19 of instance: LCD

0x7 : ALT7_LCD_DATA5

Select mux mode: ALT7 mux port: DATA5 of instance: LCD

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad EPDC_SDCE0

End of enumeration elements list.

SW_MUX_CTL_PAD_EPDC_SDCE1

SW_MUX_CTL_PAD_EPDC_SDCE1 SW MUX Control Register
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_EPDC_SDCE1

Select mux mode: ALT0 mux port: SDCE1 of instance: EPDC

0x1 : ALT1_FLEXTIMER1_CH3

Select mux mode: ALT1 mux port: CH3 of instance: FLEXTIMER1

0x2 : ALT2_ENET2_RGMII_RXC

Select mux mode: ALT2 mux port: RGMII_RXC of instance: ENET2

0x3 : ALT3_ENET2_RX_ER

Select mux mode: ALT3 mux port: RX_ER of instance: ENET2

0x4 : ALT4_EIM_AD15

Select mux mode: ALT4 mux port: AD15 of instance: EIM

0x5 : ALT5_GPIO2_IO21

Select mux mode: ALT5 mux port: IO21 of instance: GPIO2

0x6 : ALT6_LCD_DATA20

Select mux mode: ALT6 mux port: DATA20 of instance: LCD

0x7 : ALT7_LCD_DATA4

Select mux mode: ALT7 mux port: DATA4 of instance: LCD

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad EPDC_SDCE1

End of enumeration elements list.

SW_MUX_CTL_PAD_EPDC_SDCE2

SW_MUX_CTL_PAD_EPDC_SDCE2 SW MUX Control Register
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_EPDC_SDCE2

Select mux mode: ALT0 mux port: SDCE2 of instance: EPDC

0x1 : ALT1_SIM2_PORT1_SVEN

Select mux mode: ALT1 mux port: PORT1_SVEN of instance: SIM2

0x2 : ALT2_ENET2_RGMII_TD0

Select mux mode: ALT2 mux port: RGMII_TD0 of instance: ENET2

0x3 : ALT3_KPP_COL6

Select mux mode: ALT3 mux port: COL6 of instance: KPP

0x4 : ALT4_EIM_ADDR16

Select mux mode: ALT4 mux port: ADDR16 of instance: EIM

0x5 : ALT5_GPIO2_IO22

Select mux mode: ALT5 mux port: IO22 of instance: GPIO2

0x6 : ALT6_LCD_DATA21

Select mux mode: ALT6 mux port: DATA21 of instance: LCD

0x7 : ALT7_LCD_DATA3

Select mux mode: ALT7 mux port: DATA3 of instance: LCD

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad EPDC_SDCE2

End of enumeration elements list.

SW_MUX_CTL_PAD_EPDC_SDCE3

SW_MUX_CTL_PAD_EPDC_SDCE3 SW MUX Control Register
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_EPDC_SDCE3

Select mux mode: ALT0 mux port: SDCE3 of instance: EPDC

0x1 : ALT1_SIM2_PORT1_PD

Select mux mode: ALT1 mux port: PORT1_PD of instance: SIM2

0x2 : ALT2_ENET2_RGMII_TD1

Select mux mode: ALT2 mux port: RGMII_TD1 of instance: ENET2

0x3 : ALT3_KPP_ROW6

Select mux mode: ALT3 mux port: ROW6 of instance: KPP

0x4 : ALT4_EIM_ADDR17

Select mux mode: ALT4 mux port: ADDR17 of instance: EIM

0x5 : ALT5_GPIO2_IO23

Select mux mode: ALT5 mux port: IO23 of instance: GPIO2

0x6 : ALT6_LCD_DATA22

Select mux mode: ALT6 mux port: DATA22 of instance: LCD

0x7 : ALT7_LCD_DATA2

Select mux mode: ALT7 mux port: DATA2 of instance: LCD

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad EPDC_SDCE3

End of enumeration elements list.

SW_MUX_CTL_PAD_EPDC_GDCLK

SW_MUX_CTL_PAD_EPDC_GDCLK SW MUX Control Register
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_EPDC_GDCLK

Select mux mode: ALT0 mux port: GDCLK of instance: EPDC

0x1 : ALT1_FLEXTIMER2_CH0

Select mux mode: ALT1 mux port: CH0 of instance: FLEXTIMER2

0x2 : ALT2_ENET2_RGMII_TD2

Select mux mode: ALT2 mux port: RGMII_TD2 of instance: ENET2

0x3 : ALT3_KPP_COL7

Select mux mode: ALT3 mux port: COL7 of instance: KPP

0x4 : ALT4_EIM_ADDR18

Select mux mode: ALT4 mux port: ADDR18 of instance: EIM

0x5 : ALT5_GPIO2_IO24

Select mux mode: ALT5 mux port: IO24 of instance: GPIO2

0x6 : ALT6_LCD_DATA23

Select mux mode: ALT6 mux port: DATA23 of instance: LCD

0x7 : ALT7_LCD_DATA16

Select mux mode: ALT7 mux port: DATA16 of instance: LCD

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad EPDC_GDCLK

End of enumeration elements list.

SW_MUX_CTL_PAD_EPDC_GDOE

SW_MUX_CTL_PAD_EPDC_GDOE SW MUX Control Register
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_EPDC_GDOE

Select mux mode: ALT0 mux port: GDOE of instance: EPDC

0x1 : ALT1_FLEXTIMER2_CH1

Select mux mode: ALT1 mux port: CH1 of instance: FLEXTIMER2

0x2 : ALT2_ENET2_RGMII_TD3

Select mux mode: ALT2 mux port: RGMII_TD3 of instance: ENET2

0x3 : ALT3_KPP_ROW7

Select mux mode: ALT3 mux port: ROW7 of instance: KPP

0x4 : ALT4_EIM_ADDR19

Select mux mode: ALT4 mux port: ADDR19 of instance: EIM

0x5 : ALT5_GPIO2_IO25

Select mux mode: ALT5 mux port: IO25 of instance: GPIO2

0x6 : ALT6_LCD_WR_RWN

Select mux mode: ALT6 mux port: WR_RWN of instance: LCD

0x7 : ALT7_LCD_DATA18

Select mux mode: ALT7 mux port: DATA18 of instance: LCD

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad EPDC_GDOE

End of enumeration elements list.

SW_MUX_CTL_PAD_EPDC_GDRL

SW_MUX_CTL_PAD_EPDC_GDRL SW MUX Control Register
address_offset : 0x9C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_EPDC_GDRL

Select mux mode: ALT0 mux port: GDRL of instance: EPDC

0x1 : ALT1_FLEXTIMER2_CH2

Select mux mode: ALT1 mux port: CH2 of instance: FLEXTIMER2

0x2 : ALT2_ENET2_RGMII_TX_CTL

Select mux mode: ALT2 mux port: RGMII_TX_CTL of instance: ENET2

0x4 : ALT4_EIM_ADDR20

Select mux mode: ALT4 mux port: ADDR20 of instance: EIM

0x5 : ALT5_GPIO2_IO26

Select mux mode: ALT5 mux port: IO26 of instance: GPIO2

0x6 : ALT6_LCD_RD_E

Select mux mode: ALT6 mux port: RD_E of instance: LCD

0x7 : ALT7_LCD_DATA19

Select mux mode: ALT7 mux port: DATA19 of instance: LCD

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad EPDC_GDRL

End of enumeration elements list.

SW_MUX_CTL_PAD_EPDC_GDSP

SW_MUX_CTL_PAD_EPDC_GDSP SW MUX Control Register
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_EPDC_GDSP

Select mux mode: ALT0 mux port: GDSP of instance: EPDC

0x1 : ALT1_FLEXTIMER2_CH3

Select mux mode: ALT1 mux port: CH3 of instance: FLEXTIMER2

0x2 : ALT2_ENET2_RGMII_TXC

Select mux mode: ALT2 mux port: RGMII_TXC of instance: ENET2

0x3 : ALT3_ENET2_TX_ER

Select mux mode: ALT3 mux port: TX_ER of instance: ENET2

0x4 : ALT4_EIM_ADDR21

Select mux mode: ALT4 mux port: ADDR21 of instance: EIM

0x5 : ALT5_GPIO2_IO27

Select mux mode: ALT5 mux port: IO27 of instance: GPIO2

0x6 : ALT6_LCD_BUSY

Select mux mode: ALT6 mux port: BUSY of instance: LCD

0x7 : ALT7_LCD_DATA17

Select mux mode: ALT7 mux port: DATA17 of instance: LCD

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad EPDC_GDSP

End of enumeration elements list.

SW_MUX_CTL_PAD_EPDC_BDR0

SW_MUX_CTL_PAD_EPDC_BDR0 SW MUX Control Register
address_offset : 0xA4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_EPDC_BDR0

Select mux mode: ALT0 mux port: BDR0 of instance: EPDC

0x2 : ALT2_ENET2_TX_CLK

Select mux mode: ALT2 mux port: TX_CLK of instance: ENET2

0x3 : ALT3_CCM_ENET2_REF_CLK

Select mux mode: ALT3 mux port: ENET2_REF_CLK of instance: ENET2

0x4 : ALT4_EIM_ADDR22

Select mux mode: ALT4 mux port: ADDR22 of instance: EIM

0x5 : ALT5_GPIO2_IO28

Select mux mode: ALT5 mux port: IO28 of instance: GPIO2

0x6 : ALT6_LCD_CS

Select mux mode: ALT6 mux port: CS of instance: LCD

0x7 : ALT7_LCD_DATA7

Select mux mode: ALT7 mux port: DATA7 of instance: LCD

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad EPDC_BDR0

End of enumeration elements list.

SW_MUX_CTL_PAD_EPDC_BDR1

SW_MUX_CTL_PAD_EPDC_BDR1 SW MUX Control Register
address_offset : 0xA8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_EPDC_BDR1

Select mux mode: ALT0 mux port: BDR1 of instance: EPDC

0x1 : ALT1_EPDC_SDCLKN

Select mux mode: ALT1 mux port: SDCLKN of instance: EPDC

0x2 : ALT2_ENET2_RX_CLK

Select mux mode: ALT2 mux port: RX_CLK of instance: ENET2

0x4 : ALT4_EIM_AD8

Select mux mode: ALT4 mux port: AD8 of instance: EIM

0x5 : ALT5_GPIO2_IO29

Select mux mode: ALT5 mux port: IO29 of instance: GPIO2

0x6 : ALT6_LCD_ENABLE

Select mux mode: ALT6 mux port: ENABLE of instance: LCD

0x7 : ALT7_LCD_DATA6

Select mux mode: ALT7 mux port: DATA6 of instance: LCD

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad EPDC_BDR1

End of enumeration elements list.

SW_MUX_CTL_PAD_EPDC_PWR_COM

SW_MUX_CTL_PAD_EPDC_PWR_COM SW MUX Control Register
address_offset : 0xAC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_EPDC_PWR_COM

Select mux mode: ALT0 mux port: PWR_COM of instance: EPDC

0x1 : ALT1_FLEXTIMER2_PHA

Select mux mode: ALT1 mux port: PHA of instance: FLEXTIMER2

0x2 : ALT2_ENET2_CRS

Select mux mode: ALT2 mux port: CRS of instance: ENET2

0x4 : ALT4_EIM_AD9

Select mux mode: ALT4 mux port: AD9 of instance: EIM

0x5 : ALT5_GPIO2_IO30

Select mux mode: ALT5 mux port: IO30 of instance: GPIO2

0x6 : ALT6_LCD_HSYNC

Select mux mode: ALT6 mux port: HSYNC of instance: LCD

0x7 : ALT7_LCD_DATA11

Select mux mode: ALT7 mux port: DATA11 of instance: LCD

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad EPDC_PWR_COM

End of enumeration elements list.

SW_MUX_CTL_PAD_EPDC_PWR_STAT

SW_MUX_CTL_PAD_EPDC_PWR_STAT SW MUX Control Register
address_offset : 0xB0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_EPDC_PWR_STAT

Select mux mode: ALT0 mux port: PWR_STAT of instance: EPDC

0x1 : ALT1_FLEXTIMER2_PHB

Select mux mode: ALT1 mux port: PHB of instance: FLEXTIMER2

0x2 : ALT2_ENET2_COL

Select mux mode: ALT2 mux port: COL of instance: ENET2

0x4 : ALT4_EIM_EB_B1

Select mux mode: ALT4 mux port: EB_B1 of instance: EIM

0x5 : ALT5_GPIO2_IO31

Select mux mode: ALT5 mux port: IO31 of instance: GPIO2

0x6 : ALT6_LCD_VSYNC

Select mux mode: ALT6 mux port: VSYNC of instance: LCD

0x7 : ALT7_LCD_DATA12

Select mux mode: ALT7 mux port: DATA12 of instance: LCD

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad EPDC_PWR_STAT

End of enumeration elements list.

SW_MUX_CTL_PAD_LCD_CLK

SW_MUX_CTL_PAD_LCD_CLK SW MUX Control Register
address_offset : 0xB4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_LCD_CLK

Select mux mode: ALT0 mux port: CLK of instance: LCD

0x1 : ALT1_ECSPI4_MISO

Select mux mode: ALT1 mux port: MISO of instance: ECSPI4

0x2 : ALT2_ENET1_1588_EVENT2_IN

Select mux mode: ALT2 mux port: 1588_EVENT2_IN of instance: ENET1

0x3 : ALT3_CSI_DATA16

Select mux mode: ALT3 mux port: DATA16 of instance: CSI

0x4 : ALT4_UART2_RX_DATA

Select mux mode: ALT4 mux port: RX_DATA of instance: UART2

0x5 : ALT5_GPIO3_IO0

Select mux mode: ALT5 mux port: IO0 of instance: GPIO3

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad LCD_CLK

End of enumeration elements list.

SW_MUX_CTL_PAD_LCD_ENABLE

SW_MUX_CTL_PAD_LCD_ENABLE SW MUX Control Register
address_offset : 0xB8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_LCD_ENABLE

Select mux mode: ALT0 mux port: ENABLE of instance: LCD

0x1 : ALT1_ECSPI4_MOSI

Select mux mode: ALT1 mux port: MOSI of instance: ECSPI4

0x2 : ALT2_ENET1_1588_EVENT3_IN

Select mux mode: ALT2 mux port: 1588_EVENT3_IN of instance: ENET1

0x3 : ALT3_CSI_DATA17

Select mux mode: ALT3 mux port: DATA17 of instance: CSI

0x4 : ALT4_UART2_TX_DATA

Select mux mode: ALT4 mux port: TX_DATA of instance: UART2

0x5 : ALT5_GPIO3_IO1

Select mux mode: ALT5 mux port: IO1 of instance: GPIO3

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad LCD_ENABLE

End of enumeration elements list.

SW_MUX_CTL_PAD_LCD_HSYNC

SW_MUX_CTL_PAD_LCD_HSYNC SW MUX Control Register
address_offset : 0xBC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_LCD_HSYNC

Select mux mode: ALT0 mux port: HSYNC of instance: LCD

0x1 : ALT1_ECSPI4_SCLK

Select mux mode: ALT1 mux port: SCLK of instance: ECSPI4

0x2 : ALT2_ENET2_1588_EVENT2_IN

Select mux mode: ALT2 mux port: 1588_EVENT2_IN of instance: ENET2

0x3 : ALT3_CSI_DATA18

Select mux mode: ALT3 mux port: DATA18 of instance: CSI

0x4 : ALT4_UART2_RTS_B

Select mux mode: ALT4 mux port: RTS_B of instance: UART2

0x5 : ALT5_GPIO3_IO2

Select mux mode: ALT5 mux port: IO2 of instance: GPIO3

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad LCD_HSYNC

End of enumeration elements list.

SW_MUX_CTL_PAD_LCD_VSYNC

SW_MUX_CTL_PAD_LCD_VSYNC SW MUX Control Register
address_offset : 0xC0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_LCD_VSYNC

Select mux mode: ALT0 mux port: VSYNC of instance: LCD

0x1 : ALT1_ECSPI4_SS0

Select mux mode: ALT1 mux port: SS0 of instance: ECSPI4

0x2 : ALT2_ENET2_1588_EVENT3_IN

Select mux mode: ALT2 mux port: 1588_EVENT3_IN of instance: ENET2

0x3 : ALT3_CSI_DATA19

Select mux mode: ALT3 mux port: DATA19 of instance: CSI

0x4 : ALT4_UART2_CTS_B

Select mux mode: ALT4 mux port: CTS_B of instance: UART2

0x5 : ALT5_GPIO3_IO3

Select mux mode: ALT5 mux port: IO3 of instance: GPIO3

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad LCD_VSYNC

End of enumeration elements list.

SW_MUX_CTL_PAD_LCD_RESET

SW_MUX_CTL_PAD_LCD_RESET SW MUX Control Register
address_offset : 0xC4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_LCD_RESET

Select mux mode: ALT0 mux port: RESET of instance: LCD

0x1 : ALT1_GPT1_COMPARE1

Select mux mode: ALT1 mux port: COMPARE1 of instance: GPT1

0x2 : ALT2_ARM_PLATFORM_EVENTI

Select mux mode: ALT2 mux port: EVENTI of instance: ARM_PLATFORM

0x3 : ALT3_CSI_FIELD

Select mux mode: ALT3 mux port: FIELD of instance: CSI

0x4 : ALT4_EIM_DTACK_B

Select mux mode: ALT4 mux port: DTACK_B of instance: EIM

0x5 : ALT5_GPIO3_IO4

Select mux mode: ALT5 mux port: IO4 of instance: GPIO3

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad LCD_RESET

End of enumeration elements list.

SW_MUX_CTL_PAD_LCD_DATA00

SW_MUX_CTL_PAD_LCD_DATA00 SW MUX Control Register
address_offset : 0xC8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_LCD_DATA0

Select mux mode: ALT0 mux port: DATA0 of instance: LCD

0x1 : ALT1_GPT1_COMPARE2

Select mux mode: ALT1 mux port: COMPARE2 of instance: GPT1

0x3 : ALT3_CSI_DATA20

Select mux mode: ALT3 mux port: DATA20 of instance: CSI

0x4 : ALT4_EIM_DATA0

Select mux mode: ALT4 mux port: DATA0 of instance: EIM

0x5 : ALT5_GPIO3_IO5

Select mux mode: ALT5 mux port: IO5 of instance: GPIO3

0x6 : ALT6_SRC_BOOT_CFG0

Select mux mode: ALT6 mux port: BOOT_CFG0 of instance: SRC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad LCD_DATA00

End of enumeration elements list.

SW_MUX_CTL_PAD_LCD_DATA01

SW_MUX_CTL_PAD_LCD_DATA01 SW MUX Control Register
address_offset : 0xCC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_LCD_DATA1

Select mux mode: ALT0 mux port: DATA1 of instance: LCD

0x1 : ALT1_GPT1_COMPARE3

Select mux mode: ALT1 mux port: COMPARE3 of instance: GPT1

0x3 : ALT3_CSI_DATA21

Select mux mode: ALT3 mux port: DATA21 of instance: CSI

0x4 : ALT4_EIM_DATA1

Select mux mode: ALT4 mux port: DATA1 of instance: EIM

0x5 : ALT5_GPIO3_IO6

Select mux mode: ALT5 mux port: IO6 of instance: GPIO3

0x6 : ALT6_SRC_BOOT_CFG1

Select mux mode: ALT6 mux port: BOOT_CFG1 of instance: SRC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad LCD_DATA01

End of enumeration elements list.

SW_MUX_CTL_PAD_LCD_DATA02

SW_MUX_CTL_PAD_LCD_DATA02 SW MUX Control Register
address_offset : 0xD0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_LCD_DATA2

Select mux mode: ALT0 mux port: DATA2 of instance: LCD

0x1 : ALT1_GPT1_CLK

Select mux mode: ALT1 mux port: CLK of instance: GPT1

0x3 : ALT3_CSI_DATA22

Select mux mode: ALT3 mux port: DATA22 of instance: CSI

0x4 : ALT4_EIM_DATA2

Select mux mode: ALT4 mux port: DATA2 of instance: EIM

0x5 : ALT5_GPIO3_IO7

Select mux mode: ALT5 mux port: IO7 of instance: GPIO3

0x6 : ALT6_SRC_BOOT_CFG2

Select mux mode: ALT6 mux port: BOOT_CFG2 of instance: SRC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad LCD_DATA02

End of enumeration elements list.

SW_MUX_CTL_PAD_LCD_DATA03

SW_MUX_CTL_PAD_LCD_DATA03 SW MUX Control Register
address_offset : 0xD4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_LCD_DATA3

Select mux mode: ALT0 mux port: DATA3 of instance: LCD

0x1 : ALT1_GPT1_CAPTURE1

Select mux mode: ALT1 mux port: CAPTURE1 of instance: GPT1

0x3 : ALT3_CSI_DATA23

Select mux mode: ALT3 mux port: DATA23 of instance: CSI

0x4 : ALT4_EIM_DATA3

Select mux mode: ALT4 mux port: DATA3 of instance: EIM

0x5 : ALT5_GPIO3_IO8

Select mux mode: ALT5 mux port: IO8 of instance: GPIO3

0x6 : ALT6_SRC_BOOT_CFG3

Select mux mode: ALT6 mux port: BOOT_CFG3 of instance: SRC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad LCD_DATA03

End of enumeration elements list.

SW_MUX_CTL_PAD_LCD_DATA04

SW_MUX_CTL_PAD_LCD_DATA04 SW MUX Control Register
address_offset : 0xD8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_LCD_DATA4

Select mux mode: ALT0 mux port: DATA4 of instance: LCD

0x1 : ALT1_GPT1_CAPTURE2

Select mux mode: ALT1 mux port: CAPTURE2 of instance: GPT1

0x3 : ALT3_CSI_VSYNC

Select mux mode: ALT3 mux port: VSYNC of instance: CSI

0x4 : ALT4_EIM_DATA4

Select mux mode: ALT4 mux port: DATA4 of instance: EIM

0x5 : ALT5_GPIO3_IO9

Select mux mode: ALT5 mux port: IO9 of instance: GPIO3

0x6 : ALT6_SRC_BOOT_CFG4

Select mux mode: ALT6 mux port: BOOT_CFG4 of instance: SRC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad LCD_DATA04

End of enumeration elements list.

SW_MUX_CTL_PAD_LCD_DATA05

SW_MUX_CTL_PAD_LCD_DATA05 SW MUX Control Register
address_offset : 0xDC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_LCD_DATA5

Select mux mode: ALT0 mux port: DATA5 of instance: LCD

0x3 : ALT3_CSI_HSYNC

Select mux mode: ALT3 mux port: HSYNC of instance: CSI

0x4 : ALT4_EIM_DATA5

Select mux mode: ALT4 mux port: DATA5 of instance: EIM

0x5 : ALT5_GPIO3_IO10

Select mux mode: ALT5 mux port: IO10 of instance: GPIO3

0x6 : ALT6_SRC_BOOT_CFG5

Select mux mode: ALT6 mux port: BOOT_CFG5 of instance: SRC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad LCD_DATA05

End of enumeration elements list.

SW_MUX_CTL_PAD_LCD_DATA06

SW_MUX_CTL_PAD_LCD_DATA06 SW MUX Control Register
address_offset : 0xE0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_LCD_DATA6

Select mux mode: ALT0 mux port: DATA6 of instance: LCD

0x3 : ALT3_CSI_PIXCLK

Select mux mode: ALT3 mux port: PIXCLK of instance: CSI

0x4 : ALT4_EIM_DATA6

Select mux mode: ALT4 mux port: DATA6 of instance: EIM

0x5 : ALT5_GPIO3_IO11

Select mux mode: ALT5 mux port: IO11 of instance: GPIO3

0x6 : ALT6_SRC_BOOT_CFG6

Select mux mode: ALT6 mux port: BOOT_CFG6 of instance: SRC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad LCD_DATA06

End of enumeration elements list.

SW_MUX_CTL_PAD_LCD_DATA07

SW_MUX_CTL_PAD_LCD_DATA07 SW MUX Control Register
address_offset : 0xE4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_LCD_DATA7

Select mux mode: ALT0 mux port: DATA7 of instance: LCD

0x3 : ALT3_CSI_MCLK

Select mux mode: ALT3 mux port: MCLK of instance: CSI

0x4 : ALT4_EIM_DATA7

Select mux mode: ALT4 mux port: DATA7 of instance: EIM

0x5 : ALT5_GPIO3_IO12

Select mux mode: ALT5 mux port: IO12 of instance: GPIO3

0x6 : ALT6_SRC_BOOT_CFG7

Select mux mode: ALT6 mux port: BOOT_CFG7 of instance: SRC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad LCD_DATA07

End of enumeration elements list.

SW_MUX_CTL_PAD_LCD_DATA08

SW_MUX_CTL_PAD_LCD_DATA08 SW MUX Control Register
address_offset : 0xE8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_LCD_DATA8

Select mux mode: ALT0 mux port: DATA8 of instance: LCD

0x3 : ALT3_CSI_DATA9

Select mux mode: ALT3 mux port: DATA9 of instance: CSI

0x4 : ALT4_EIM_DATA8

Select mux mode: ALT4 mux port: DATA8 of instance: EIM

0x5 : ALT5_GPIO3_IO13

Select mux mode: ALT5 mux port: IO13 of instance: GPIO3

0x6 : ALT6_SRC_BOOT_CFG8

Select mux mode: ALT6 mux port: BOOT_CFG8 of instance: SRC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad LCD_DATA08

End of enumeration elements list.

SW_MUX_CTL_PAD_LCD_DATA09

SW_MUX_CTL_PAD_LCD_DATA09 SW MUX Control Register
address_offset : 0xEC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_LCD_DATA9

Select mux mode: ALT0 mux port: DATA9 of instance: LCD

0x3 : ALT3_CSI_DATA8

Select mux mode: ALT3 mux port: DATA8 of instance: CSI

0x4 : ALT4_EIM_DATA9

Select mux mode: ALT4 mux port: DATA9 of instance: EIM

0x5 : ALT5_GPIO3_IO14

Select mux mode: ALT5 mux port: IO14 of instance: GPIO3

0x6 : ALT6_SRC_BOOT_CFG9

Select mux mode: ALT6 mux port: BOOT_CFG9 of instance: SRC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad LCD_DATA09

End of enumeration elements list.

SW_MUX_CTL_PAD_LCD_DATA10

SW_MUX_CTL_PAD_LCD_DATA10 SW MUX Control Register
address_offset : 0xF0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_LCD_DATA10

Select mux mode: ALT0 mux port: DATA10 of instance: LCD

0x3 : ALT3_CSI_DATA7

Select mux mode: ALT3 mux port: DATA7 of instance: CSI

0x4 : ALT4_EIM_DATA10

Select mux mode: ALT4 mux port: DATA10 of instance: EIM

0x5 : ALT5_GPIO3_IO15

Select mux mode: ALT5 mux port: IO15 of instance: GPIO3

0x6 : ALT6_SRC_BOOT_CFG10

Select mux mode: ALT6 mux port: BOOT_CFG10 of instance: SRC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad LCD_DATA10

End of enumeration elements list.

SW_MUX_CTL_PAD_LCD_DATA11

SW_MUX_CTL_PAD_LCD_DATA11 SW MUX Control Register
address_offset : 0xF4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_LCD_DATA11

Select mux mode: ALT0 mux port: DATA11 of instance: LCD

0x3 : ALT3_CSI_DATA6

Select mux mode: ALT3 mux port: DATA6 of instance: CSI

0x4 : ALT4_EIM_DATA11

Select mux mode: ALT4 mux port: DATA11 of instance: EIM

0x5 : ALT5_GPIO3_IO16

Select mux mode: ALT5 mux port: IO16 of instance: GPIO3

0x6 : ALT6_SRC_BOOT_CFG11

Select mux mode: ALT6 mux port: BOOT_CFG11 of instance: SRC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad LCD_DATA11

End of enumeration elements list.

SW_MUX_CTL_PAD_LCD_DATA12

SW_MUX_CTL_PAD_LCD_DATA12 SW MUX Control Register
address_offset : 0xF8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_LCD_DATA12

Select mux mode: ALT0 mux port: DATA12 of instance: LCD

0x3 : ALT3_CSI_DATA5

Select mux mode: ALT3 mux port: DATA5 of instance: CSI

0x4 : ALT4_EIM_DATA12

Select mux mode: ALT4 mux port: DATA12 of instance: EIM

0x5 : ALT5_GPIO3_IO17

Select mux mode: ALT5 mux port: IO17 of instance: GPIO3

0x6 : ALT6_SRC_BOOT_CFG12

Select mux mode: ALT6 mux port: BOOT_CFG12 of instance: SRC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad LCD_DATA12

End of enumeration elements list.

SW_MUX_CTL_PAD_LCD_DATA13

SW_MUX_CTL_PAD_LCD_DATA13 SW MUX Control Register
address_offset : 0xFC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MUX_MODE : MUX Mode Select Field.
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : ALT0_LCD_DATA13

Select mux mode: ALT0 mux port: DATA13 of instance: LCD

0x3 : ALT3_CSI_DATA4

Select mux mode: ALT3 mux port: DATA4 of instance: CSI

0x4 : ALT4_EIM_DATA13

Select mux mode: ALT4 mux port: DATA13 of instance: EIM

0x5 : ALT5_GPIO3_IO18

Select mux mode: ALT5 mux port: IO18 of instance: GPIO3

0x6 : ALT6_SRC_BOOT_CFG13

Select mux mode: ALT6 mux port: BOOT_CFG13 of instance: SRC

End of enumeration elements list.

SION : Software Input On Field.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : DISABLED

Input Path is determined by functionality

0x1 : ENABLED

Force input path of pad LCD_DATA13

End of enumeration elements list.

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IOMUXC

Peripheral Memory Blocks

Registers

SW_MUX_CTL_PAD_LCD_DATA14

SW_MUX_CTL_PAD_LCD_DATA15

SW_MUX_CTL_PAD_LCD_DATA16

SW_MUX_CTL_PAD_LCD_DATA17

SW_MUX_CTL_PAD_LCD_DATA18

SW_MUX_CTL_PAD_LCD_DATA19

SW_MUX_CTL_PAD_LCD_DATA20

SW_MUX_CTL_PAD_LCD_DATA21

SW_MUX_CTL_PAD_LCD_DATA22

SW_MUX_CTL_PAD_LCD_DATA23

SW_MUX_CTL_PAD_UART1_RX_DATA

SW_MUX_CTL_PAD_UART1_TX_DATA

SW_MUX_CTL_PAD_UART2_RX_DATA

SW_MUX_CTL_PAD_UART2_TX_DATA

SW_MUX_CTL_PAD_UART3_RX_DATA

SW_MUX_CTL_PAD_UART3_TX_DATA

SW_MUX_CTL_PAD_GPIO1_IO08

SW_MUX_CTL_PAD_UART3_RTS_B

SW_MUX_CTL_PAD_UART3_CTS_B

SW_MUX_CTL_PAD_I2C1_SCL

SW_MUX_CTL_PAD_I2C1_SDA

SW_MUX_CTL_PAD_I2C2_SCL

SW_MUX_CTL_PAD_I2C2_SDA

SW_MUX_CTL_PAD_I2C3_SCL

SW_MUX_CTL_PAD_I2C3_SDA

SW_MUX_CTL_PAD_I2C4_SCL

SW_MUX_CTL_PAD_I2C4_SDA

SW_MUX_CTL_PAD_ECSPI1_SCLK

SW_MUX_CTL_PAD_ECSPI1_MOSI

SW_MUX_CTL_PAD_ECSPI1_MISO

SW_MUX_CTL_PAD_ECSPI1_SS0

SW_MUX_CTL_PAD_ECSPI2_SCLK

SW_MUX_CTL_PAD_ECSPI2_MOSI

SW_MUX_CTL_PAD_GPIO1_IO09

SW_MUX_CTL_PAD_ECSPI2_MISO

SW_MUX_CTL_PAD_ECSPI2_SS0

SW_MUX_CTL_PAD_SD1_CD_B

SW_MUX_CTL_PAD_SD1_WP

SW_MUX_CTL_PAD_SD1_RESET_B

SW_MUX_CTL_PAD_SD1_CLK

SW_MUX_CTL_PAD_SD1_CMD

SW_MUX_CTL_PAD_SD1_DATA0

SW_MUX_CTL_PAD_SD1_DATA1

SW_MUX_CTL_PAD_SD1_DATA2

SW_MUX_CTL_PAD_SD1_DATA3

SW_MUX_CTL_PAD_SD2_CD_B

SW_MUX_CTL_PAD_SD2_WP

SW_MUX_CTL_PAD_SD2_RESET_B

SW_MUX_CTL_PAD_SD2_CLK

SW_MUX_CTL_PAD_SD2_CMD

SW_MUX_CTL_PAD_GPIO1_IO10

SW_MUX_CTL_PAD_SD2_DATA0

SW_MUX_CTL_PAD_SD2_DATA1

SW_MUX_CTL_PAD_SD2_DATA2

SW_MUX_CTL_PAD_SD2_DATA3

SW_MUX_CTL_PAD_SD3_CLK

SW_MUX_CTL_PAD_SD3_CMD

SW_MUX_CTL_PAD_SD3_DATA0

SW_MUX_CTL_PAD_SD3_DATA1

SW_MUX_CTL_PAD_SD3_DATA2

SW_MUX_CTL_PAD_SD3_DATA3

SW_MUX_CTL_PAD_SD3_DATA4

SW_MUX_CTL_PAD_SD3_DATA5

SW_MUX_CTL_PAD_SD3_DATA6

SW_MUX_CTL_PAD_SD3_DATA7

SW_MUX_CTL_PAD_SD3_STROBE

SW_MUX_CTL_PAD_SD3_RESET_B

SW_MUX_CTL_PAD_GPIO1_IO11

SW_MUX_CTL_PAD_SAI1_RX_DATA

SW_MUX_CTL_PAD_SAI1_TX_BCLK

SW_MUX_CTL_PAD_SAI1_TX_SYNC

SW_MUX_CTL_PAD_SAI1_TX_DATA

SW_MUX_CTL_PAD_SAI1_RX_SYNC

SW_MUX_CTL_PAD_SAI1_RX_BCLK

SW_MUX_CTL_PAD_SAI1_MCLK

SW_MUX_CTL_PAD_SAI2_TX_SYNC