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TEMPMON

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x30 byte (0x0)
mem_usage : registers
protection : not protected

Registers

HW_ANADIG_TEMPSENSE0

HW_ANADIG_TEMPSENSE1

HW_ANADIG_TEMPSENSE1_SET

HW_ANADIG_TEMPSENSE1_CLR

HW_ANADIG_TEMPSENSE1_TOG

HW_ANADIG_TEMPSENSE_TRIM

HW_ANADIG_TEMPSENSE_TRIM_SET

HW_ANADIG_TEMPSENSE_TRIM_CLR

HW_ANADIG_TEMPSENSE_TRIM_TOG

HW_ANADIG_TEMPSENSE0_SET

HW_ANADIG_TEMPSENSE0_CLR

HW_ANADIG_TEMPSENSE0_TOG


HW_ANADIG_TEMPSENSE0

Anadig Tempsensor Control Register 0
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HW_ANADIG_TEMPSENSE0 HW_ANADIG_TEMPSENSE0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LOW_ALARM_VALUE HIGH_ALARM_VALUE PANIC_ALARM_VALUE RSVD1

LOW_ALARM_VALUE : This bit field contains the temperature measurement that will issue a low temperature interrupt.
bits : 0 - 8 (9 bit)
access : read-write

HIGH_ALARM_VALUE : This bit field contains the temperature measurement that will issue a high temperature interrupt
bits : 9 - 17 (9 bit)
access : read-write

PANIC_ALARM_VALUE : This bit field contains the temperature measurement that will cause a panic and reset the chip.
bits : 18 - 26 (9 bit)
access : read-write

RSVD1 : This bit field contains the last measured temperature.
bits : 27 - 31 (5 bit)
access : read-only


HW_ANADIG_TEMPSENSE1

Anadig Tempsensor Control Register 1
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HW_ANADIG_TEMPSENSE1 HW_ANADIG_TEMPSENSE1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TEMP_VALUE POWER_DOWN MEASURE_TEMP FINISHED RSVD0 MEASURE_FREQ

TEMP_VALUE : This bit field contains the temperature measurement.
bits : 0 - 8 (9 bit)
access : read-only

POWER_DOWN : This bit powers down the temperature sensor.
bits : 9 - 9 (1 bit)
access : read-write

MEASURE_TEMP : Starts the measurement process
bits : 10 - 10 (1 bit)
access : read-write

FINISHED : Indicates that the latest temp is valid
bits : 11 - 11 (1 bit)
access : read-only

RSVD0 : Always set to zero (0).
bits : 12 - 15 (4 bit)
access : read-only

MEASURE_FREQ : This bits determines how many RTC clocks to wait before automatically repeating a temperature measurement
bits : 16 - 31 (16 bit)
access : read-write


HW_ANADIG_TEMPSENSE1_SET

Anadig Tempsensor Control Register 1
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HW_ANADIG_TEMPSENSE1_SET HW_ANADIG_TEMPSENSE1_SET read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TEMP_VALUE POWER_DOWN MEASURE_TEMP FINISHED RSVD0 MEASURE_FREQ

TEMP_VALUE : This bit field contains the temperature measurement.
bits : 0 - 8 (9 bit)
access : read-only

POWER_DOWN : This bit powers down the temperature sensor.
bits : 9 - 9 (1 bit)
access : read-write

MEASURE_TEMP : Starts the measurement process
bits : 10 - 10 (1 bit)
access : read-write

FINISHED : Indicates that the latest temp is valid
bits : 11 - 11 (1 bit)
access : read-only

RSVD0 : Always set to zero (0).
bits : 12 - 15 (4 bit)
access : read-only

MEASURE_FREQ : This bits determines how many RTC clocks to wait before automatically repeating a temperature measurement
bits : 16 - 31 (16 bit)
access : read-write


HW_ANADIG_TEMPSENSE1_CLR

Anadig Tempsensor Control Register 1
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HW_ANADIG_TEMPSENSE1_CLR HW_ANADIG_TEMPSENSE1_CLR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TEMP_VALUE POWER_DOWN MEASURE_TEMP FINISHED RSVD0 MEASURE_FREQ

TEMP_VALUE : This bit field contains the temperature measurement.
bits : 0 - 8 (9 bit)
access : read-only

POWER_DOWN : This bit powers down the temperature sensor.
bits : 9 - 9 (1 bit)
access : read-write

MEASURE_TEMP : Starts the measurement process
bits : 10 - 10 (1 bit)
access : read-write

FINISHED : Indicates that the latest temp is valid
bits : 11 - 11 (1 bit)
access : read-only

RSVD0 : Always set to zero (0).
bits : 12 - 15 (4 bit)
access : read-only

MEASURE_FREQ : This bits determines how many RTC clocks to wait before automatically repeating a temperature measurement
bits : 16 - 31 (16 bit)
access : read-write


HW_ANADIG_TEMPSENSE1_TOG

Anadig Tempsensor Control Register 1
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HW_ANADIG_TEMPSENSE1_TOG HW_ANADIG_TEMPSENSE1_TOG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TEMP_VALUE POWER_DOWN MEASURE_TEMP FINISHED RSVD0 MEASURE_FREQ

TEMP_VALUE : This bit field contains the temperature measurement.
bits : 0 - 8 (9 bit)
access : read-only

POWER_DOWN : This bit powers down the temperature sensor.
bits : 9 - 9 (1 bit)
access : read-write

MEASURE_TEMP : Starts the measurement process
bits : 10 - 10 (1 bit)
access : read-write

FINISHED : Indicates that the latest temp is valid
bits : 11 - 11 (1 bit)
access : read-only

RSVD0 : Always set to zero (0).
bits : 12 - 15 (4 bit)
access : read-only

MEASURE_FREQ : This bits determines how many RTC clocks to wait before automatically repeating a temperature measurement
bits : 16 - 31 (16 bit)
access : read-write


HW_ANADIG_TEMPSENSE_TRIM

Anadig Tempsensor Trim Control Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HW_ANADIG_TEMPSENSE_TRIM HW_ANADIG_TEMPSENSE_TRIM read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 T_BUF_VREF_SEL RSVD0 T_EN_READ T_VREF_VBE_SEL RSVD1 T_BUF_SLOPE_SEL RSVD2 T_MUX_ADDR

T_BUF_VREF_SEL : Reference voltage setting bits for the am-plifier in the Positive-TC generator block
bits : 0 - 4 (5 bit)
access : read-write

RSVD0 : Always set to zero (0).
bits : 5 - 6 (2 bit)
access : read-only

T_EN_READ : Definition:TBD
bits : 7 - 7 (1 bit)
access : read-write

T_VREF_VBE_SEL : Reference voltage setting bits for the am-plifier in the Positive-TC generator block
bits : 8 - 16 (9 bit)
access : read-write

RSVD1 : Always set to zero (0).
bits : 17 - 19 (3 bit)
access : read-only

T_BUF_SLOPE_SEL : Amplifier gain setting bits
bits : 20 - 23 (4 bit)
access : read-write

RSVD2 : Always set to zero (0).
bits : 24 - 28 (5 bit)
access : read-only

T_MUX_ADDR : Test MUX address setting bits. Only for de-bugging purpose. Default: 110 Other Values : TBD
bits : 29 - 31 (3 bit)
access : read-write


HW_ANADIG_TEMPSENSE_TRIM_SET

Anadig Tempsensor Trim Control Register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HW_ANADIG_TEMPSENSE_TRIM_SET HW_ANADIG_TEMPSENSE_TRIM_SET read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 T_BUF_VREF_SEL RSVD0 T_EN_READ T_VREF_VBE_SEL RSVD1 T_BUF_SLOPE_SEL RSVD2 T_MUX_ADDR

T_BUF_VREF_SEL : Reference voltage setting bits for the am-plifier in the Positive-TC generator block
bits : 0 - 4 (5 bit)
access : read-write

RSVD0 : Always set to zero (0).
bits : 5 - 6 (2 bit)
access : read-only

T_EN_READ : Definition:TBD
bits : 7 - 7 (1 bit)
access : read-write

T_VREF_VBE_SEL : Reference voltage setting bits for the am-plifier in the Positive-TC generator block
bits : 8 - 16 (9 bit)
access : read-write

RSVD1 : Always set to zero (0).
bits : 17 - 19 (3 bit)
access : read-only

T_BUF_SLOPE_SEL : Amplifier gain setting bits
bits : 20 - 23 (4 bit)
access : read-write

RSVD2 : Always set to zero (0).
bits : 24 - 28 (5 bit)
access : read-only

T_MUX_ADDR : Test MUX address setting bits. Only for de-bugging purpose. Default: 110 Other Values : TBD
bits : 29 - 31 (3 bit)
access : read-write


HW_ANADIG_TEMPSENSE_TRIM_CLR

Anadig Tempsensor Trim Control Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HW_ANADIG_TEMPSENSE_TRIM_CLR HW_ANADIG_TEMPSENSE_TRIM_CLR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 T_BUF_VREF_SEL RSVD0 T_EN_READ T_VREF_VBE_SEL RSVD1 T_BUF_SLOPE_SEL RSVD2 T_MUX_ADDR

T_BUF_VREF_SEL : Reference voltage setting bits for the am-plifier in the Positive-TC generator block
bits : 0 - 4 (5 bit)
access : read-write

RSVD0 : Always set to zero (0).
bits : 5 - 6 (2 bit)
access : read-only

T_EN_READ : Definition:TBD
bits : 7 - 7 (1 bit)
access : read-write

T_VREF_VBE_SEL : Reference voltage setting bits for the am-plifier in the Positive-TC generator block
bits : 8 - 16 (9 bit)
access : read-write

RSVD1 : Always set to zero (0).
bits : 17 - 19 (3 bit)
access : read-only

T_BUF_SLOPE_SEL : Amplifier gain setting bits
bits : 20 - 23 (4 bit)
access : read-write

RSVD2 : Always set to zero (0).
bits : 24 - 28 (5 bit)
access : read-only

T_MUX_ADDR : Test MUX address setting bits. Only for de-bugging purpose. Default: 110 Other Values : TBD
bits : 29 - 31 (3 bit)
access : read-write


HW_ANADIG_TEMPSENSE_TRIM_TOG

Anadig Tempsensor Trim Control Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HW_ANADIG_TEMPSENSE_TRIM_TOG HW_ANADIG_TEMPSENSE_TRIM_TOG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 T_BUF_VREF_SEL RSVD0 T_EN_READ T_VREF_VBE_SEL RSVD1 T_BUF_SLOPE_SEL RSVD2 T_MUX_ADDR

T_BUF_VREF_SEL : Reference voltage setting bits for the am-plifier in the Positive-TC generator block
bits : 0 - 4 (5 bit)
access : read-write

RSVD0 : Always set to zero (0).
bits : 5 - 6 (2 bit)
access : read-only

T_EN_READ : Definition:TBD
bits : 7 - 7 (1 bit)
access : read-write

T_VREF_VBE_SEL : Reference voltage setting bits for the am-plifier in the Positive-TC generator block
bits : 8 - 16 (9 bit)
access : read-write

RSVD1 : Always set to zero (0).
bits : 17 - 19 (3 bit)
access : read-only

T_BUF_SLOPE_SEL : Amplifier gain setting bits
bits : 20 - 23 (4 bit)
access : read-write

RSVD2 : Always set to zero (0).
bits : 24 - 28 (5 bit)
access : read-only

T_MUX_ADDR : Test MUX address setting bits. Only for de-bugging purpose. Default: 110 Other Values : TBD
bits : 29 - 31 (3 bit)
access : read-write


HW_ANADIG_TEMPSENSE0_SET

Anadig Tempsensor Control Register 0
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HW_ANADIG_TEMPSENSE0_SET HW_ANADIG_TEMPSENSE0_SET read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LOW_ALARM_VALUE HIGH_ALARM_VALUE PANIC_ALARM_VALUE RSVD1

LOW_ALARM_VALUE : This bit field contains the temperature measurement that will issue a low temperature interrupt.
bits : 0 - 8 (9 bit)
access : read-write

HIGH_ALARM_VALUE : This bit field contains the temperature measurement that will issue a high temperature interrupt
bits : 9 - 17 (9 bit)
access : read-write

PANIC_ALARM_VALUE : This bit field contains the temperature measurement that will cause a panic and reset the chip.
bits : 18 - 26 (9 bit)
access : read-write

RSVD1 : This bit field contains the last measured temperature.
bits : 27 - 31 (5 bit)
access : read-only


HW_ANADIG_TEMPSENSE0_CLR

Anadig Tempsensor Control Register 0
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HW_ANADIG_TEMPSENSE0_CLR HW_ANADIG_TEMPSENSE0_CLR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LOW_ALARM_VALUE HIGH_ALARM_VALUE PANIC_ALARM_VALUE RSVD1

LOW_ALARM_VALUE : This bit field contains the temperature measurement that will issue a low temperature interrupt.
bits : 0 - 8 (9 bit)
access : read-write

HIGH_ALARM_VALUE : This bit field contains the temperature measurement that will issue a high temperature interrupt
bits : 9 - 17 (9 bit)
access : read-write

PANIC_ALARM_VALUE : This bit field contains the temperature measurement that will cause a panic and reset the chip.
bits : 18 - 26 (9 bit)
access : read-write

RSVD1 : This bit field contains the last measured temperature.
bits : 27 - 31 (5 bit)
access : read-only


HW_ANADIG_TEMPSENSE0_TOG

Anadig Tempsensor Control Register 0
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HW_ANADIG_TEMPSENSE0_TOG HW_ANADIG_TEMPSENSE0_TOG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LOW_ALARM_VALUE HIGH_ALARM_VALUE PANIC_ALARM_VALUE RSVD1

LOW_ALARM_VALUE : This bit field contains the temperature measurement that will issue a low temperature interrupt.
bits : 0 - 8 (9 bit)
access : read-write

HIGH_ALARM_VALUE : This bit field contains the temperature measurement that will issue a high temperature interrupt
bits : 9 - 17 (9 bit)
access : read-write

PANIC_ALARM_VALUE : This bit field contains the temperature measurement that will cause a panic and reset the chip.
bits : 18 - 26 (9 bit)
access : read-write

RSVD1 : This bit field contains the last measured temperature.
bits : 27 - 31 (5 bit)
access : read-only



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