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PMC1

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x48 byte (0x0)
mem_usage : registers
protection : not protected

Registers

VERID

STOP

VLPS

LLS

VLLS

STATUS

CTRL

BCTRL

HSRUN

SRAMCTRL

RUN

VLPR


VERID

PMC 1 Version register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

VERID VERID read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FEATURE MINOR MAJOR

FEATURE : Feature Specification Number
bits : 0 - 15 (16 bit)
access : read-only

Enumeration:

0 : FEATURE_0

Standard features implemented

End of enumeration elements list.

MINOR : Minor Version Number
bits : 16 - 23 (8 bit)
access : read-only

MAJOR : Major Version Number
bits : 24 - 31 (8 bit)
access : read-only


STOP

PMC 1 STOP mode register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

STOP STOP read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LDOVL

LDOVL : LDO Regulator Voltage Level
bits : 16 - 21 (6 bit)
access : read-write

Enumeration:

0 : LDOVL_0

LDO Voltage Level is 0.60V

0x1 : LDOVL_1

LDO Voltage Level is 0.61V

0x31 : LDOVL_49

LDO Voltage Level is 1.09V

0x32 : LDOVL_50

LDO Voltage Level is 1.10V

End of enumeration elements list.


VLPS

PMC 1 VLPS mode register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VLPS VLPS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LDOM MONLVD MONHVD LDOVL RBBEN

LDOM : LDO Regulator Mode
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : LDOM_0

Linear LDO LP Regulator is enabled.

0x1 : LDOM_1

Linear LDO HP Regulator is enabled.

End of enumeration elements list.

MONLVD : Low-Voltage Detector
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : MONLVD_0

LP monitor is enabled.

0x1 : MONLVD_1

HP monitor is enabled.

End of enumeration elements list.

MONHVD : 1.2V HP High-Voltage Detector
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : MONHVD_0

The monitor is disabled.

0x1 : MONHVD_1

The monitor is enabled.

End of enumeration elements list.

LDOVL : LDO Regulator Voltage Level
bits : 16 - 21 (6 bit)
access : read-write

Enumeration:

0 : LDOVL_0

LDO Voltage Level is 0.60V

0x1 : LDOVL_1

LDO Voltage Level is 0.61V

0x31 : LDOVL_49

LDO Voltage Level is 1.09V

0x32 : LDOVL_50

LDO Voltage Level is 1.10V

End of enumeration elements list.

RBBEN : Reverse Back Bias Enable
bits : 28 - 28 (1 bit)
access : read-write

Enumeration:

0 : RBBEN_0

RBB is disabled

0x1 : RBBEN_1

RBB is enabled

End of enumeration elements list.


LLS

PMC 1 LLS mode register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LLS LLS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LDOM MONLVD MONHVD LDOVL RBBEN

LDOM : LDO Regulator Mode
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : LDOM_0

Linear LDO LP Regulator is enabled.

0x1 : LDOM_1

Linear LDO HP Regulator is enabled.

End of enumeration elements list.

MONLVD : Low-Voltage Detector
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : MONLVD_0

LP monitor is enabled.

0x1 : MONLVD_1

HP monitor is enabled.

End of enumeration elements list.

MONHVD : 1.2V HP High-Voltage Detector
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : MONHVD_0

The monitor is disabled.

0x1 : MONHVD_1

The monitor is enabled.

End of enumeration elements list.

LDOVL : Linear LDO Regulator Voltage Level
bits : 16 - 21 (6 bit)
access : read-write

Enumeration:

0 : LDOVL_0

LDO Voltage Level is 0.60V

0x1 : LDOVL_1

LDO Voltage Level is 0.61V

0x31 : LDOVL_49

LDO Voltage Level is 1.09V

0x32 : LDOVL_50

LDO Voltage Level is 1.10V

End of enumeration elements list.

RBBEN : Reverse Back Bias Enable
bits : 28 - 28 (1 bit)
access : read-write

Enumeration:

0 : RBBEN_0

RBB is disabled

0x1 : RBBEN_1

RBB is enabled

End of enumeration elements list.


VLLS

PMC 1 VLLS mode register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VLLS VLLS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LDOM MONLVD MONHVD

LDOM : LDO Regulator Mode
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : LDOM_0

Linear LDO LP Regulator is enabled.

0x1 : LDOM_1

Linear LDO HP Regulator is enabled.

End of enumeration elements list.

MONLVD : Low-Voltage Detector
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : MONLVD_0

LP monitor is enabled.

0x1 : MONLVD_1

HP monitor is enabled.

End of enumeration elements list.

MONHVD : 1.2V HP High-Voltage Detector
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : MONHVD_0

The monitor is disabled.

0x1 : MONHVD_1

The monitor is enabled.

End of enumeration elements list.


STATUS

PMC 1 Status register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

STATUS STATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LVDF LVDV HVDF HVDV LDOVLF SRAMF

LVDF : 1.2V Low-Voltage Detector Flag
bits : 0 - 0 (1 bit)
access : read-only

Enumeration:

0 : LVDF_0

Low-voltage event was not detected by the 1.2V LVD monitor in the PMC 1

0x1 : LVDF_1

Low-voltage event was detected by the 1.2V LVD monitor in the PMC 1

End of enumeration elements list.

LVDV : 1.2V Low-Voltage Detector Value
bits : 1 - 1 (1 bit)
access : read-only

Enumeration:

0 : LVDV_0

Low-voltage event was not detected by the 1.2V LVD monitor in the PMC 1

0x1 : LVDV_1

Low-voltage event was detected by the 1.2V LVD monitor in the PMC 1

End of enumeration elements list.

HVDF : 1.2V High-Voltage Detector Flag
bits : 4 - 4 (1 bit)
access : read-only

Enumeration:

0 : HVDF_0

High-voltage event was not detected by the 1.2V HVD monitor in PMC 1

0x1 : HVDF_1

High-voltage event was detected by the 1.2V HVD monitor in PMC 1

End of enumeration elements list.

HVDV : 1.2V High-Voltage Detector Value
bits : 5 - 5 (1 bit)
access : read-only

Enumeration:

0 : HVDV_0

High-voltage event was not detected by the 1.2V HVD monitor in PMC 1

0x1 : HVDV_1

High-voltage event was detected by the 1.2V HVD monitor in PMC 1

End of enumeration elements list.

LDOVLF : LDO Voltage Level Flag
bits : 8 - 8 (1 bit)
access : read-only

Enumeration:

0 : LDOVLF_0

LDO Voltage Level is stable

0x1 : LDOVLF_1

LDO Voltage Level is changing

End of enumeration elements list.

SRAMF : SRAM Flag
bits : 24 - 24 (1 bit)
access : read-only

Enumeration:

0 : SRAMF_0

No change request in the SRAMs.

0x1 : SRAMF_1

A change mode request is being processed in the SRAMs.

End of enumeration elements list.


CTRL

PMC 1 Control register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTRL CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LVDIE LVDACK HVDIE HVDACK LVDRE HVDRE ISOACK

LVDIE : Low-Voltage Detector Interrupt Enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : LVDIE_0

Low-voltage detector interrupt is disabled

0x1 : LVDIE_1

Low-voltage detector interrupt is enabled

End of enumeration elements list.

LVDACK : 1.2V Low-Voltage Detector Acknowledge
bits : 1 - 1 (1 bit)
access : write-only

HVDIE : 1.2V High-Voltage Detector Interrupt Enable
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : HVDIE_0

1.2V high-voltage detector interrupt is disabled

0x1 : HVDIE_1

1.2V high-voltage detector interrupt is enabled

End of enumeration elements list.

HVDACK : 1.2V High-Voltage Detector Acknowledge
bits : 3 - 3 (1 bit)
access : write-only

LVDRE : Low-Voltage Detector Reset Enable
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

0 : LVDRE_0

Low-voltage detector reset is disabled

0x1 : LVDRE_1

Low-voltage detector reset is enabled

End of enumeration elements list.

HVDRE : 1.2V High-Voltage Detector Reset Enable
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

0 : HVDRE_0

1.2V high-voltage detector reset is disabled

0x1 : HVDRE_1

1.2V high-voltage detector reset is enabled

End of enumeration elements list.

ISOACK : Isolation Acknowledge
bits : 14 - 14 (1 bit)
access : write-only


BCTRL

PMC 1 Biasing Control register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BCTRL BCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RBBNLEVEL RBBPLEVEL FBBNLEVEL FBBPLEVEL

RBBNLEVEL : RBB N-Well Voltage Level
bits : 0 - 3 (4 bit)
access : read-write

Enumeration:

0 : RBBNLEVEL_0

Voltage level at 0.5V.

0x1 : RBBNLEVEL_1

Voltage level at 0.6V.

0x2 : RBBNLEVEL_2

Voltage level at 0.7V.

0x3 : RBBNLEVEL_3

Voltage level at 0.8V.

0x4 : RBBNLEVEL_4

Voltage level at 0.9V.

0x5 : RBBNLEVEL_5

Voltage level at 1.0V.

0x6 : RBBNLEVEL_6

Voltage level at 1.1V.

0x7 : RBBNLEVEL_7

Voltage level at 1.2V.

0x8 : RBBNLEVEL_8

Voltage level at 1.3V.

End of enumeration elements list.

RBBPLEVEL : RBB P-Well Voltage Level
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : RBBPLEVEL_0

Voltage level at -0.5V.

0x1 : RBBPLEVEL_1

Voltage level at -0.6V.

0x2 : RBBPLEVEL_2

Voltage level at -0.7V.

0x3 : RBBPLEVEL_3

Voltage level at -0.8V.

0x4 : RBBPLEVEL_4

Voltage level at -0.9V.

0x5 : RBBPLEVEL_5

Voltage level at -1.0V.

0x6 : RBBPLEVEL_6

Voltage level at -1.1V.

0x7 : RBBPLEVEL_7

Voltage level at -1.2V.

0x8 : RBBPLEVEL_8

Voltage level at -1.3V.

End of enumeration elements list.

FBBNLEVEL : FBB N-Well Voltage Level
bits : 16 - 19 (4 bit)
access : read-write

Enumeration:

0 : FBBNLEVEL_0

No BIAS condition.

0x1 : FBBNLEVEL_1

Voltage level at -50mV.

0x2 : FBBNLEVEL_2

Voltage level at -150mV.

0x3 : FBBNLEVEL_3

Voltage level at -100mV.

0x4 : FBBNLEVEL_4

Voltage level at -350mV.

0x5 : FBBNLEVEL_5

Voltage level at -300mV.

0x6 : FBBNLEVEL_6

Voltage level at -200mV.

0x7 : FBBNLEVEL_7

Voltage level at -250mV.

End of enumeration elements list.

FBBPLEVEL : FBB P-Well Voltage Level
bits : 24 - 27 (4 bit)
access : read-write

Enumeration:

0 : FBBPLEVEL_0

No BIAS condition.

0x1 : FBBPLEVEL_1

Voltage level at 50mV.

0x2 : FBBPLEVEL_2

Voltage level at 150mV.

0x3 : FBBPLEVEL_3

Voltage level at 100mV.

0x4 : FBBPLEVEL_4

Voltage level at 350mV.

0x5 : FBBPLEVEL_5

Voltage level at 300mV.

0x6 : FBBPLEVEL_6

Voltage level at 200mV.

0x7 : FBBPLEVEL_7

Voltage level at 250mV.

End of enumeration elements list.


HSRUN

PMC 1 HSRUN mode register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HSRUN HSRUN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LDOVL FBBEN

LDOVL : LDO Regulator Voltage Level
bits : 16 - 21 (6 bit)
access : read-write

Enumeration:

0 : LDOVL_0

LDO Voltage Level is 0.60V

0x1 : LDOVL_1

LDO Voltage Level is 0.61V

0x31 : LDOVL_49

LDO Voltage Level is 1.09V

0x32 : LDOVL_50

LDO Voltage Level is 1.10V

End of enumeration elements list.

FBBEN : Forward Back Bias Enable
bits : 24 - 24 (1 bit)
access : read-write

Enumeration:

0 : FBBEN_0

FBB is disabled

0x1 : FBBEN_1

FBB is enabled

End of enumeration elements list.


SRAMCTRL

PMC 1 SRAMs Control register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SRAMCTRL SRAMCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SRAM_STDY

SRAM_STDY : PMC 1 SRAM Bank in Standby Mode
bits : 0 - 7 (8 bit)
access : read-write


RUN

PMC 1 RUN mode register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RUN RUN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LDOVL

LDOVL : LDO Regulator Voltage Level
bits : 16 - 21 (6 bit)
access : read-write

Enumeration:

0 : LDOVL_0

LDO Voltage Level is 0.60V

0x1 : LDOVL_1

LDO Voltage Level is 0.61V

0x31 : LDOVL_49

LDO Voltage Level is 1.09V

0x32 : LDOVL_50

LDO Voltage Level is 1.10V

End of enumeration elements list.


VLPR

PMC 1 VLPR mode register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VLPR VLPR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LDOM MONLVD MONHVD LDOVL

LDOM : LDO Regulator Mode
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : LDOM_0

Linear LDO LP Regulator is enabled.

0x1 : LDOM_1

Linear LDO HP Regulator is enabled.

End of enumeration elements list.

MONLVD : Low-Voltage Detector
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

0 : MONLVD_0

LP monitor is enabled.

0x1 : MONLVD_1

HP monitor is enabled.

End of enumeration elements list.

MONHVD : 1.2V HP High-Voltage Detector
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : MONHVD_0

The monitor is disabled.

0x1 : MONHVD_1

The monitor is enabled.

End of enumeration elements list.

LDOVL : LDO Regulator Voltage Level
bits : 16 - 21 (6 bit)
access : read-write

Enumeration:

0 : LDOVL_0

LDO Voltage Level is 0.60V

0x1 : LDOVL_1

LDO Voltage Level is 0.61V

0x31 : LDOVL_49

LDO Voltage Level is 1.09V

0x32 : LDOVL_50

LDO Voltage Level is 1.10V

End of enumeration elements list.



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