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IOMUXC1

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x3A0 byte (0x0)
mem_usage : registers
protection : not protected

Registers

SW_MUX_CTL_PAD_PTC0

SW_MUX_CTL_PAD_RESERVED13

D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO5_SELECT_INPUT

SW_MUX_CTL_PAD_PTC11

SW_MUX_CTL_PAD_RESERVED14

SW_MUX_CTL_PAD_RESERVED15

SW_MUX_CTL_PAD_RESERVED16

D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO6_SELECT_INPUT

SW_MUX_CTL_PAD_RESERVED17

SW_MUX_CTL_PAD_PTC12

SW_MUX_CTL_PAD_RESERVED18

D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO7_SELECT_INPUT

SW_MUX_CTL_PAD_RESERVED19

SW_MUX_CTL_PAD_RESERVED20

SW_MUX_CTL_PAD_RESERVED21

D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO8_SELECT_INPUT

SW_MUX_CTL_PAD_PTC13

SW_MUX_CTL_PAD_RESERVED22

SW_MUX_CTL_PAD_PTC3

SW_MUX_CTL_PAD_RESERVED23

D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO9_SELECT_INPUT

SW_MUX_CTL_PAD_RESERVED24

SW_MUX_CTL_PAD_RESERVED25

SW_MUX_CTL_PAD_PTC14

SW_MUX_CTL_PAD_RESERVED26

D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO10_SELECT_INPUT

SW_MUX_CTL_PAD_RESERVED27

SW_MUX_CTL_PAD_RESERVED28

D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO11_SELECT_INPUT

SW_MUX_CTL_PAD_RESERVED29

SW_MUX_CTL_PAD_PTC15

SW_MUX_CTL_PAD_RESERVED30

D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO12_SELECT_INPUT

SW_MUX_CTL_PAD_RESERVED31

SW_MUX_CTL_PAD_PTE0

SW_MUX_CTL_PAD_PTE1

D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO13_SELECT_INPUT

SW_MUX_CTL_PAD_PTC16

SW_MUX_CTL_PAD_PTE2

SW_MUX_CTL_PAD_PTE3

D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO14_SELECT_INPUT

SW_MUX_CTL_PAD_PTE4

SW_MUX_CTL_PAD_PTE5

D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO15_SELECT_INPUT

SW_MUX_CTL_PAD_PTC17

SW_MUX_CTL_PAD_PTE6

SW_MUX_CTL_PAD_PTE7

SW_MUX_CTL_PAD_PTC4

LPUART4_IPP_IND_LPUART_CTS_B_SELECT_INPUT

SW_MUX_CTL_PAD_PTE8

SW_MUX_CTL_PAD_PTE9

LPUART4_IPP_IND_LPUART_RXD_SELECT_INPUT

SW_MUX_CTL_PAD_PTC18

SW_MUX_CTL_PAD_PTE10

SW_MUX_CTL_PAD_PTE11

LPUART4_IPP_IND_LPUART_TXD_SELECT_INPUT

SW_MUX_CTL_PAD_PTE12

SW_MUX_CTL_PAD_PTE13

LPUART5_IPP_IND_LPUART_CTS_B_SELECT_INPUT

SW_MUX_CTL_PAD_PTC19

SW_MUX_CTL_PAD_PTE14

SW_MUX_CTL_PAD_PTE15

LPUART5_IPP_IND_LPUART_RXD_SELECT_INPUT

SW_MUX_CTL_PAD_RESERVED32

SW_MUX_CTL_PAD_RESERVED33

LPUART5_IPP_IND_LPUART_TXD_SELECT_INPUT

SW_MUX_CTL_PAD_RESERVED0

SW_MUX_CTL_PAD_RESERVED34

LPUART6_IPP_IND_LPUART_CTS_B_SELECT_INPUT

SW_MUX_CTL_PAD_RESERVED35

SW_MUX_CTL_PAD_RESERVED36

LPUART6_IPP_IND_LPUART_RXD_SELECT_INPUT

SW_MUX_CTL_PAD_RESERVED37

SW_MUX_CTL_PAD_RESERVED1

SW_MUX_CTL_PAD_RESET1_b

SW_MUX_CTL_PAD_RESERVED38

LPUART6_IPP_IND_LPUART_TXD_SELECT_INPUT

SW_MUX_CTL_PAD_RESERVED39

SW_MUX_CTL_PAD_PTC5

SW_MUX_CTL_PAD_RESERVED40

LPUART7_IPP_IND_LPUART_CTS_B_SELECT_INPUT

SW_MUX_CTL_PAD_RESERVED41

SW_MUX_CTL_PAD_RESERVED2

LPUART7_IPP_IND_LPUART_RXD_SELECT_INPUT

SW_MUX_CTL_PAD_RESERVED42

SW_MUX_CTL_PAD_PTC1

USDHC1_IPP_WP_ON_SELECT_INPUT

SW_MUX_CTL_PAD_RESERVED43

LPUART7_IPP_IND_LPUART_TXD_SELECT_INPUT

SW_MUX_CTL_PAD_RESERVED44

SW_MUX_CTL_PAD_RESERVED45

LPI2C4_IPP_IND_LPI2C_HREQ_SELECT_INPUT

SW_MUX_CTL_PAD_RESERVED3

SW_MUX_CTL_PAD_RESERVED46

SW_MUX_CTL_PAD_RESERVED47

LPI2C4_IPP_IND_LPI2C_SCL_SELECT_INPUT

SW_MUX_CTL_PAD_PTF0

LPI2C4_IPP_IND_LPI2C_SDA_SELECT_INPUT

SW_MUX_CTL_PAD_PTF1

SW_MUX_CTL_PAD_RESERVED4

SW_MUX_CTL_PAD_PTF2

LPTPM4_IPP_IND_LPTPM_CH0_SELECT_INPUT

SW_MUX_CTL_PAD_PTF3

LPTPM4_IPP_IND_LPTPM_CH1_SELECT_INPUT

SW_MUX_CTL_PAD_PTF4

SW_MUX_CTL_PAD_PTF5

SW_MUX_CTL_PAD_RESERVED5

LPTPM4_IPP_IND_LPTPM_CH2_SELECT_INPUT

SW_MUX_CTL_PAD_PTF6

SW_MUX_CTL_PAD_PTF7

LPTPM4_IPP_IND_LPTPM_CH3_SELECT_INPUT

SW_MUX_CTL_PAD_PTC6

SW_MUX_CTL_PAD_PTF8

LPTPM4_IPP_IND_LPTPM_CH4_SELECT_INPUT

SW_MUX_CTL_PAD_PTF9

SW_MUX_CTL_PAD_RESERVED6

SW_MUX_CTL_PAD_PTF10

LPTPM4_IPP_IND_LPTPM_CH5_SELECT_INPUT

SW_MUX_CTL_PAD_PTF11

LPTPM4_IPP_IND_LPTPM_CLK_SELECT_INPUT

SW_MUX_CTL_PAD_PTF12

SW_MUX_CTL_PAD_PTF13

LPSPI2_IPP_IND_LPSPI_PCS0_SELECT_INPUT

SW_MUX_CTL_PAD_RESERVED7

SW_MUX_CTL_PAD_PTF14

D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO0_SELECT_INPUT

LPSPI2_IPP_IND_LPSPI_PCS1_SELECT_INPUT

SW_MUX_CTL_PAD_PTF15

SW_MUX_CTL_PAD_PTF16

LPSPI2_IPP_IND_LPSPI_PCS2_SELECT_INPUT

SW_MUX_CTL_PAD_PTF17

SW_MUX_CTL_PAD_RESERVED8

LPSPI2_IPP_IND_LPSPI_PCS3_SELECT_INPUT

SW_MUX_CTL_PAD_PTF18

SW_MUX_CTL_PAD_PTF19

LPSPI2_IPP_IND_LPSPI_SCK_SELECT_INPUT

LPSPI2_IPP_IND_LPSPI_SDI_SELECT_INPUT

SW_MUX_CTL_PAD_RESERVED9

LPSPI2_IPP_IND_LPSPI_SDO_SELECT_INPUT

SW_MUX_CTL_PAD_PTC7

LPI2C5_IPP_IND_LPI2C_HREQ_SELECT_INPUT

LPI2C5_IPP_IND_LPI2C_SCL_SELECT_INPUT

SW_MUX_CTL_PAD_RESERVED10

LPI2C5_IPP_IND_LPI2C_SDA_SELECT_INPUT

LPTPM5_IPP_IND_LPTPM_CH0_SELECT_INPUT

LPTPM5_IPP_IND_LPTPM_CH1_SELECT_INPUT

SW_MUX_CTL_PAD_RESERVED11

LPTPM5_IPP_IND_LPTPM_CLK_SELECT_INPUT

D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO1_SELECT_INPUT

LPTPM6_IPP_IND_LPTPM_CH0_SELECT_INPUT

SW_MUX_CTL_PAD_PTD0

LPTPM6_IPP_IND_LPTPM_CH1_SELECT_INPUT

LPTPM6_IPP_IND_LPTPM_CLK_SELECT_INPUT

LPTPM7_IPP_IND_LPTPM_CH0_SELECT_INPUT

SW_MUX_CTL_PAD_PTD1

LPTPM7_IPP_IND_LPTPM_CH1_SELECT_INPUT

LPTPM7_IPP_IND_LPTPM_CH2_SELECT_INPUT

SW_MUX_CTL_PAD_PTC8

LPTPM7_IPP_IND_LPTPM_CH3_SELECT_INPUT

SW_MUX_CTL_PAD_PTD2

LPTPM7_IPP_IND_LPTPM_CH4_SELECT_INPUT

LPTPM7_IPP_IND_LPTPM_CH5_SELECT_INPUT

LPTPM7_IPP_IND_LPTPM_CLK_SELECT_INPUT

SW_MUX_CTL_PAD_PTD3

LPI2C6_IPP_IND_LPI2C_HREQ_SELECT_INPUT

D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO2_SELECT_INPUT

LPI2C6_IPP_IND_LPI2C_SCL_SELECT_INPUT

LPI2C6_IPP_IND_LPI2C_SDA_SELECT_INPUT

SW_MUX_CTL_PAD_PTD4

LPI2C7_IPP_IND_LPI2C_HREQ_SELECT_INPUT

LPI2C7_IPP_IND_LPI2C_SCL_SELECT_INPUT

LPI2C7_IPP_IND_LPI2C_SDA_SELECT_INPUT

SW_MUX_CTL_PAD_PTD5

LPSPI3_IPP_IND_LPSPI_PCS0_SELECT_INPUT

LPSPI3_IPP_IND_LPSPI_PCS1_SELECT_INPUT

SW_MUX_CTL_PAD_PTC9

LPSPI3_IPP_IND_LPSPI_PCS2_SELECT_INPUT

SW_MUX_CTL_PAD_PTD6

LPSPI3_IPP_IND_LPSPI_PCS3_SELECT_INPUT

LPSPI3_IPP_IND_LPSPI_SCK_SELECT_INPUT

SW_MUX_CTL_PAD_PTC2

LPSPI3_IPP_IND_LPSPI_SDI_SELECT_INPUT

D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO3_SELECT_INPUT

SW_MUX_CTL_PAD_PTD7

LPSPI3_IPP_IND_LPSPI_SDO_SELECT_INPUT

USDHC1_IPP_CARD_DET_SELECT_INPUT

USBO2_ULP1_IPP_IND_OTG_OC_SELECT_INPUT

USBO2_ULP1_IPP_IND_OTG2_OC_SELECT_INPUT

SW_MUX_CTL_PAD_PTD8

DA_IP_HS_USB2PHY_28FDSOI_USB_ID_SELECT_INPUT

VIDEO_IN_IPP_IND_DE_SELECT_INPUT

SW_MUX_CTL_PAD_PTD9

SW_MUX_CTL_PAD_PTC10

SW_MUX_CTL_PAD_PTD10

D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO4_SELECT_INPUT

SW_MUX_CTL_PAD_PTD11

SW_MUX_CTL_PAD_RESERVED12


SW_MUX_CTL_PAD_PTC0

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTC0 SW_MUX_CTL_PAD_PTC0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED13

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x102C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED13 SW_MUX_CTL_PAD_RESERVED13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO5_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x1054 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO5_SELECT_INPUT D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO5_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_PTC11

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTC11 SW_MUX_CTL_PAD_PTC11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED14

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x10E4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED14 SW_MUX_CTL_PAD_RESERVED14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED15

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x11A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED15 SW_MUX_CTL_PAD_RESERVED15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED16

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x1260 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED16 SW_MUX_CTL_PAD_RESERVED16 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO6_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x1270 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO6_SELECT_INPUT D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO6_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED17

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x1324 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED17 SW_MUX_CTL_PAD_RESERVED17 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_PTC12

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x138 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTC12 SW_MUX_CTL_PAD_PTC12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED18

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x13EC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED18 SW_MUX_CTL_PAD_RESERVED18 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO7_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x1490 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO7_SELECT_INPUT D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO7_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED19

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x14B8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED19 SW_MUX_CTL_PAD_RESERVED19 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED20

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x1588 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED20 SW_MUX_CTL_PAD_RESERVED20 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED21

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x165C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED21 SW_MUX_CTL_PAD_RESERVED21 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO8_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x16B4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO8_SELECT_INPUT D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO8_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_PTC13

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x16C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTC13 SW_MUX_CTL_PAD_PTC13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED22

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x1734 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED22 SW_MUX_CTL_PAD_RESERVED22 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_PTC3

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTC3 SW_MUX_CTL_PAD_PTC3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED23

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x1810 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED23 SW_MUX_CTL_PAD_RESERVED23 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO9_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x18DC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO9_SELECT_INPUT D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO9_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED24

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x18F0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED24 SW_MUX_CTL_PAD_RESERVED24 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED25

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x19D4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED25 SW_MUX_CTL_PAD_RESERVED25 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_PTC14

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x1A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTC14 SW_MUX_CTL_PAD_PTC14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED26

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x1ABC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED26 SW_MUX_CTL_PAD_RESERVED26 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO10_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x1B08 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO10_SELECT_INPUT D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO10_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED27

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x1BA8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED27 SW_MUX_CTL_PAD_RESERVED27 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED28

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x1C98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED28 SW_MUX_CTL_PAD_RESERVED28 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO11_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x1D38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO11_SELECT_INPUT D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO11_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED29

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x1D8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED29 SW_MUX_CTL_PAD_RESERVED29 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_PTC15

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x1E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTC15 SW_MUX_CTL_PAD_PTC15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED30

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x1E84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED30 SW_MUX_CTL_PAD_RESERVED30 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO12_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x1F6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO12_SELECT_INPUT D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO12_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED31

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x1F80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED31 SW_MUX_CTL_PAD_RESERVED31 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_PTE0

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x2080 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTE0 SW_MUX_CTL_PAD_PTE0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_PTE1

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x2184 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTE1 SW_MUX_CTL_PAD_PTE1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO13_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x21A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO13_SELECT_INPUT D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO13_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_PTC16

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x220 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTC16 SW_MUX_CTL_PAD_PTC16 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_PTE2

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x228C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTE2 SW_MUX_CTL_PAD_PTE2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_PTE3

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x2398 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTE3 SW_MUX_CTL_PAD_PTE3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO14_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x23E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO14_SELECT_INPUT D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO14_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_PTE4

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x24A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTE4 SW_MUX_CTL_PAD_PTE4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_PTE5

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x25BC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTE5 SW_MUX_CTL_PAD_PTE5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO15_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x2620 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO15_SELECT_INPUT D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO15_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_PTC17

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x264 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTC17 SW_MUX_CTL_PAD_PTC17 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_PTE6

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x26D4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTE6 SW_MUX_CTL_PAD_PTE6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_PTE7

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x27F0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTE7 SW_MUX_CTL_PAD_PTE7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_PTC4

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTC4 SW_MUX_CTL_PAD_PTC4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPUART4_IPP_IND_LPUART_CTS_B_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x2864 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPUART4_IPP_IND_LPUART_CTS_B_SELECT_INPUT LPUART4_IPP_IND_LPUART_CTS_B_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_PTE8

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x2910 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTE8 SW_MUX_CTL_PAD_PTE8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_PTE9

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x2A34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTE9 SW_MUX_CTL_PAD_PTE9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPUART4_IPP_IND_LPUART_RXD_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x2AAC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPUART4_IPP_IND_LPUART_RXD_SELECT_INPUT LPUART4_IPP_IND_LPUART_RXD_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_PTC18

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x2AC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTC18 SW_MUX_CTL_PAD_PTC18 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_PTE10

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x2B5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTE10 SW_MUX_CTL_PAD_PTE10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_PTE11

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x2C88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTE11 SW_MUX_CTL_PAD_PTE11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPUART4_IPP_IND_LPUART_TXD_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x2CF8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPUART4_IPP_IND_LPUART_TXD_SELECT_INPUT LPUART4_IPP_IND_LPUART_TXD_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_PTE12

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x2DB8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTE12 SW_MUX_CTL_PAD_PTE12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_PTE13

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x2EEC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTE13 SW_MUX_CTL_PAD_PTE13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPUART5_IPP_IND_LPUART_CTS_B_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x2F48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPUART5_IPP_IND_LPUART_CTS_B_SELECT_INPUT LPUART5_IPP_IND_LPUART_CTS_B_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_PTC19

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x2F8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTC19 SW_MUX_CTL_PAD_PTC19 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_PTE14

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x3024 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTE14 SW_MUX_CTL_PAD_PTE14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_PTE15

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x3160 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTE15 SW_MUX_CTL_PAD_PTE15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPUART5_IPP_IND_LPUART_RXD_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x319C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPUART5_IPP_IND_LPUART_RXD_SELECT_INPUT LPUART5_IPP_IND_LPUART_RXD_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED32

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x32A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED32 SW_MUX_CTL_PAD_RESERVED32 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED33

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x33E4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED33 SW_MUX_CTL_PAD_RESERVED33 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPUART5_IPP_IND_LPUART_TXD_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x33F4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPUART5_IPP_IND_LPUART_TXD_SELECT_INPUT LPUART5_IPP_IND_LPUART_TXD_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED0

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x348 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED0 SW_MUX_CTL_PAD_RESERVED0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED34

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x352C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED34 SW_MUX_CTL_PAD_RESERVED34 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPUART6_IPP_IND_LPUART_CTS_B_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x3650 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPUART6_IPP_IND_LPUART_CTS_B_SELECT_INPUT LPUART6_IPP_IND_LPUART_CTS_B_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED35

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x3678 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED35 SW_MUX_CTL_PAD_RESERVED35 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED36

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x37C8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED36 SW_MUX_CTL_PAD_RESERVED36 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPUART6_IPP_IND_LPUART_RXD_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x38B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPUART6_IPP_IND_LPUART_RXD_SELECT_INPUT LPUART6_IPP_IND_LPUART_RXD_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED37

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x391C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED37 SW_MUX_CTL_PAD_RESERVED37 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED1

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x39C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED1 SW_MUX_CTL_PAD_RESERVED1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_RESET1_b

SW_MUX_CTL_PAD_RESET1_b SW MUX Control Register
address_offset : 0x39C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESET1_b SW_MUX_CTL_PAD_RESET1_b read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE LK

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED38

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x3A74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED38 SW_MUX_CTL_PAD_RESERVED38 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPUART6_IPP_IND_LPUART_TXD_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x3B14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPUART6_IPP_IND_LPUART_TXD_SELECT_INPUT LPUART6_IPP_IND_LPUART_TXD_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED39

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x3BD0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED39 SW_MUX_CTL_PAD_RESERVED39 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_PTC5

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTC5 SW_MUX_CTL_PAD_PTC5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED40

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x3D30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED40 SW_MUX_CTL_PAD_RESERVED40 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPUART7_IPP_IND_LPUART_CTS_B_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x3D7C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPUART7_IPP_IND_LPUART_CTS_B_SELECT_INPUT LPUART7_IPP_IND_LPUART_CTS_B_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED41

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x3E94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED41 SW_MUX_CTL_PAD_RESERVED41 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED2

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x3F4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED2 SW_MUX_CTL_PAD_RESERVED2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPUART7_IPP_IND_LPUART_RXD_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x3FE8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPUART7_IPP_IND_LPUART_RXD_SELECT_INPUT LPUART7_IPP_IND_LPUART_RXD_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED42

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x3FFC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED42 SW_MUX_CTL_PAD_RESERVED42 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_PTC1

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTC1 SW_MUX_CTL_PAD_PTC1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


USDHC1_IPP_WP_ON_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x400 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USDHC1_IPP_WP_ON_SELECT_INPUT USDHC1_IPP_WP_ON_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED43

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x4168 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED43 SW_MUX_CTL_PAD_RESERVED43 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPUART7_IPP_IND_LPUART_TXD_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x4258 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPUART7_IPP_IND_LPUART_TXD_SELECT_INPUT LPUART7_IPP_IND_LPUART_TXD_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED44

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x42D8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED44 SW_MUX_CTL_PAD_RESERVED44 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED45

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x444C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED45 SW_MUX_CTL_PAD_RESERVED45 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPI2C4_IPP_IND_LPI2C_HREQ_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x44CC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPI2C4_IPP_IND_LPI2C_HREQ_SELECT_INPUT LPI2C4_IPP_IND_LPI2C_HREQ_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED3

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x450 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED3 SW_MUX_CTL_PAD_RESERVED3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED46

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x45C4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED46 SW_MUX_CTL_PAD_RESERVED46 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED47

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x4740 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED47 SW_MUX_CTL_PAD_RESERVED47 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPI2C4_IPP_IND_LPI2C_SCL_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x4744 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPI2C4_IPP_IND_LPI2C_SCL_SELECT_INPUT LPI2C4_IPP_IND_LPI2C_SCL_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_PTF0

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x48C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTF0 SW_MUX_CTL_PAD_PTF0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPI2C4_IPP_IND_LPI2C_SDA_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x49C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPI2C4_IPP_IND_LPI2C_SDA_SELECT_INPUT LPI2C4_IPP_IND_LPI2C_SDA_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_PTF1

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x4A44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTF1 SW_MUX_CTL_PAD_PTF1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED4

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x4B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED4 SW_MUX_CTL_PAD_RESERVED4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_PTF2

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x4BCC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTF2 SW_MUX_CTL_PAD_PTF2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPTPM4_IPP_IND_LPTPM_CH0_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x4C40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPTPM4_IPP_IND_LPTPM_CH0_SELECT_INPUT LPTPM4_IPP_IND_LPTPM_CH0_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_PTF3

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x4D58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTF3 SW_MUX_CTL_PAD_PTF3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPTPM4_IPP_IND_LPTPM_CH1_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x4EC4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPTPM4_IPP_IND_LPTPM_CH1_SELECT_INPUT LPTPM4_IPP_IND_LPTPM_CH1_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_PTF4

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x4EE8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTF4 SW_MUX_CTL_PAD_PTF4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_PTF5

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x507C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTF5 SW_MUX_CTL_PAD_PTF5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED5

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x514 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED5 SW_MUX_CTL_PAD_RESERVED5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPTPM4_IPP_IND_LPTPM_CH2_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x514C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPTPM4_IPP_IND_LPTPM_CH2_SELECT_INPUT LPTPM4_IPP_IND_LPTPM_CH2_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_PTF6

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x5214 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTF6 SW_MUX_CTL_PAD_PTF6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_PTF7

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x53B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTF7 SW_MUX_CTL_PAD_PTF7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPTPM4_IPP_IND_LPTPM_CH3_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x53D8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPTPM4_IPP_IND_LPTPM_CH3_SELECT_INPUT LPTPM4_IPP_IND_LPTPM_CH3_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_PTC6

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTC6 SW_MUX_CTL_PAD_PTC6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_PTF8

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x5550 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTF8 SW_MUX_CTL_PAD_PTF8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPTPM4_IPP_IND_LPTPM_CH4_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x5668 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPTPM4_IPP_IND_LPTPM_CH4_SELECT_INPUT LPTPM4_IPP_IND_LPTPM_CH4_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_PTF9

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x56F4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTF9 SW_MUX_CTL_PAD_PTF9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED6

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x57C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED6 SW_MUX_CTL_PAD_RESERVED6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_PTF10

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x589C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTF10 SW_MUX_CTL_PAD_PTF10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPTPM4_IPP_IND_LPTPM_CH5_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x58FC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPTPM4_IPP_IND_LPTPM_CH5_SELECT_INPUT LPTPM4_IPP_IND_LPTPM_CH5_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_PTF11

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x5A48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTF11 SW_MUX_CTL_PAD_PTF11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPTPM4_IPP_IND_LPTPM_CLK_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x5B94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPTPM4_IPP_IND_LPTPM_CLK_SELECT_INPUT LPTPM4_IPP_IND_LPTPM_CLK_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_PTF12

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x5BF8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTF12 SW_MUX_CTL_PAD_PTF12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_PTF13

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x5DAC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTF13 SW_MUX_CTL_PAD_PTF13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPSPI2_IPP_IND_LPSPI_PCS0_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x5E30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPSPI2_IPP_IND_LPSPI_PCS0_SELECT_INPUT LPSPI2_IPP_IND_LPSPI_PCS0_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED7

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x5E8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED7 SW_MUX_CTL_PAD_RESERVED7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_PTF14

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x5F64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTF14 SW_MUX_CTL_PAD_PTF14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO0_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x604 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO0_SELECT_INPUT D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO0_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


LPSPI2_IPP_IND_LPSPI_PCS1_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x60D0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPSPI2_IPP_IND_LPSPI_PCS1_SELECT_INPUT LPSPI2_IPP_IND_LPSPI_PCS1_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_PTF15

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x6120 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTF15 SW_MUX_CTL_PAD_PTF15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_PTF16

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x62E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTF16 SW_MUX_CTL_PAD_PTF16 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPSPI2_IPP_IND_LPSPI_PCS2_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x6374 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPSPI2_IPP_IND_LPSPI_PCS2_SELECT_INPUT LPSPI2_IPP_IND_LPSPI_PCS2_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_PTF17

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x64A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTF17 SW_MUX_CTL_PAD_PTF17 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED8

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x658 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED8 SW_MUX_CTL_PAD_RESERVED8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPSPI2_IPP_IND_LPSPI_PCS3_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x661C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPSPI2_IPP_IND_LPSPI_PCS3_SELECT_INPUT LPSPI2_IPP_IND_LPSPI_PCS3_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_PTF18

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x666C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTF18 SW_MUX_CTL_PAD_PTF18 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_PTF19

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x6838 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTF19 SW_MUX_CTL_PAD_PTF19 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPSPI2_IPP_IND_LPSPI_SCK_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x68C8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPSPI2_IPP_IND_LPSPI_SCK_SELECT_INPUT LPSPI2_IPP_IND_LPSPI_SCK_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


LPSPI2_IPP_IND_LPSPI_SDI_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x6B78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPSPI2_IPP_IND_LPSPI_SDI_SELECT_INPUT LPSPI2_IPP_IND_LPSPI_SDI_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED9

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x6CC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED9 SW_MUX_CTL_PAD_RESERVED9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPSPI2_IPP_IND_LPSPI_SDO_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x6E2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPSPI2_IPP_IND_LPSPI_SDO_SELECT_INPUT LPSPI2_IPP_IND_LPSPI_SDO_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_PTC7

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTC7 SW_MUX_CTL_PAD_PTC7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPI2C5_IPP_IND_LPI2C_HREQ_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x70E4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPI2C5_IPP_IND_LPI2C_HREQ_SELECT_INPUT LPI2C5_IPP_IND_LPI2C_HREQ_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


LPI2C5_IPP_IND_LPI2C_SCL_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x73A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPI2C5_IPP_IND_LPI2C_SCL_SELECT_INPUT LPI2C5_IPP_IND_LPI2C_SCL_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED10

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x744 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED10 SW_MUX_CTL_PAD_RESERVED10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPI2C5_IPP_IND_LPI2C_SDA_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x7660 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPI2C5_IPP_IND_LPI2C_SDA_SELECT_INPUT LPI2C5_IPP_IND_LPI2C_SDA_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


LPTPM5_IPP_IND_LPTPM_CH0_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x7924 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPTPM5_IPP_IND_LPTPM_CH0_SELECT_INPUT LPTPM5_IPP_IND_LPTPM_CH0_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


LPTPM5_IPP_IND_LPTPM_CH1_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x7BEC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPTPM5_IPP_IND_LPTPM_CH1_SELECT_INPUT LPTPM5_IPP_IND_LPTPM_CH1_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED11

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x7C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED11 SW_MUX_CTL_PAD_RESERVED11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPTPM5_IPP_IND_LPTPM_CLK_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x7EB8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPTPM5_IPP_IND_LPTPM_CLK_SELECT_INPUT LPTPM5_IPP_IND_LPTPM_CLK_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO1_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x80C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO1_SELECT_INPUT D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO1_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


LPTPM6_IPP_IND_LPTPM_CH0_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x8188 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPTPM6_IPP_IND_LPTPM_CH0_SELECT_INPUT LPTPM6_IPP_IND_LPTPM_CH0_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_PTD0

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x840 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTD0 SW_MUX_CTL_PAD_PTD0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPTPM6_IPP_IND_LPTPM_CH1_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x845C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPTPM6_IPP_IND_LPTPM_CH1_SELECT_INPUT LPTPM6_IPP_IND_LPTPM_CH1_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


LPTPM6_IPP_IND_LPTPM_CLK_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x8734 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPTPM6_IPP_IND_LPTPM_CLK_SELECT_INPUT LPTPM6_IPP_IND_LPTPM_CLK_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


LPTPM7_IPP_IND_LPTPM_CH0_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x8A10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPTPM7_IPP_IND_LPTPM_CH0_SELECT_INPUT LPTPM7_IPP_IND_LPTPM_CH0_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_PTD1

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x8C4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTD1 SW_MUX_CTL_PAD_PTD1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPTPM7_IPP_IND_LPTPM_CH1_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x8CF0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPTPM7_IPP_IND_LPTPM_CH1_SELECT_INPUT LPTPM7_IPP_IND_LPTPM_CH1_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


LPTPM7_IPP_IND_LPTPM_CH2_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x8FD4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPTPM7_IPP_IND_LPTPM_CH2_SELECT_INPUT LPTPM7_IPP_IND_LPTPM_CH2_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_PTC8

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTC8 SW_MUX_CTL_PAD_PTC8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPTPM7_IPP_IND_LPTPM_CH3_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x92BC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPTPM7_IPP_IND_LPTPM_CH3_SELECT_INPUT LPTPM7_IPP_IND_LPTPM_CH3_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_PTD2

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x94C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTD2 SW_MUX_CTL_PAD_PTD2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPTPM7_IPP_IND_LPTPM_CH4_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x95A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPTPM7_IPP_IND_LPTPM_CH4_SELECT_INPUT LPTPM7_IPP_IND_LPTPM_CH4_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


LPTPM7_IPP_IND_LPTPM_CH5_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x9898 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPTPM7_IPP_IND_LPTPM_CH5_SELECT_INPUT LPTPM7_IPP_IND_LPTPM_CH5_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


LPTPM7_IPP_IND_LPTPM_CLK_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x9B8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPTPM7_IPP_IND_LPTPM_CLK_SELECT_INPUT LPTPM7_IPP_IND_LPTPM_CLK_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_PTD3

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x9D8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTD3 SW_MUX_CTL_PAD_PTD3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPI2C6_IPP_IND_LPI2C_HREQ_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0x9E84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPI2C6_IPP_IND_LPI2C_HREQ_SELECT_INPUT LPI2C6_IPP_IND_LPI2C_HREQ_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO2_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0xA18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO2_SELECT_INPUT D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO2_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


LPI2C6_IPP_IND_LPI2C_SCL_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0xA180 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPI2C6_IPP_IND_LPI2C_SCL_SELECT_INPUT LPI2C6_IPP_IND_LPI2C_SCL_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


LPI2C6_IPP_IND_LPI2C_SDA_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0xA480 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPI2C6_IPP_IND_LPI2C_SDA_SELECT_INPUT LPI2C6_IPP_IND_LPI2C_SDA_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_PTD4

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0xA68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTD4 SW_MUX_CTL_PAD_PTD4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPI2C7_IPP_IND_LPI2C_HREQ_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0xA784 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPI2C7_IPP_IND_LPI2C_HREQ_SELECT_INPUT LPI2C7_IPP_IND_LPI2C_HREQ_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


LPI2C7_IPP_IND_LPI2C_SCL_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0xAA8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPI2C7_IPP_IND_LPI2C_SCL_SELECT_INPUT LPI2C7_IPP_IND_LPI2C_SCL_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


LPI2C7_IPP_IND_LPI2C_SDA_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0xAD98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPI2C7_IPP_IND_LPI2C_SDA_SELECT_INPUT LPI2C7_IPP_IND_LPI2C_SDA_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_PTD5

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0xAFC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTD5 SW_MUX_CTL_PAD_PTD5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPSPI3_IPP_IND_LPSPI_PCS0_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0xB0A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPSPI3_IPP_IND_LPSPI_PCS0_SELECT_INPUT LPSPI3_IPP_IND_LPSPI_PCS0_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


LPSPI3_IPP_IND_LPSPI_PCS1_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0xB3BC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPSPI3_IPP_IND_LPSPI_PCS1_SELECT_INPUT LPSPI3_IPP_IND_LPSPI_PCS1_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_PTC9

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0xB4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTC9 SW_MUX_CTL_PAD_PTC9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPSPI3_IPP_IND_LPSPI_PCS2_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0xB6D4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPSPI3_IPP_IND_LPSPI_PCS2_SELECT_INPUT LPSPI3_IPP_IND_LPSPI_PCS2_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_PTD6

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0xB94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTD6 SW_MUX_CTL_PAD_PTD6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPSPI3_IPP_IND_LPSPI_PCS3_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0xB9F0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPSPI3_IPP_IND_LPSPI_PCS3_SELECT_INPUT LPSPI3_IPP_IND_LPSPI_PCS3_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


LPSPI3_IPP_IND_LPSPI_SCK_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0xBD10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPSPI3_IPP_IND_LPSPI_SCK_SELECT_INPUT LPSPI3_IPP_IND_LPSPI_SCK_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_PTC2

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTC2 SW_MUX_CTL_PAD_PTC2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPSPI3_IPP_IND_LPSPI_SDI_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0xC034 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPSPI3_IPP_IND_LPSPI_SDI_SELECT_INPUT LPSPI3_IPP_IND_LPSPI_SDI_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO3_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0xC28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO3_SELECT_INPUT D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO3_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_PTD7

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0xC30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTD7 SW_MUX_CTL_PAD_PTD7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


LPSPI3_IPP_IND_LPSPI_SDO_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0xC35C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPSPI3_IPP_IND_LPSPI_SDO_SELECT_INPUT LPSPI3_IPP_IND_LPSPI_SDO_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


USDHC1_IPP_CARD_DET_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0xC688 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USDHC1_IPP_CARD_DET_SELECT_INPUT USDHC1_IPP_CARD_DET_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


USBO2_ULP1_IPP_IND_OTG_OC_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0xC9B8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USBO2_ULP1_IPP_IND_OTG_OC_SELECT_INPUT USBO2_ULP1_IPP_IND_OTG_OC_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


USBO2_ULP1_IPP_IND_OTG2_OC_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0xCCEC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USBO2_ULP1_IPP_IND_OTG2_OC_SELECT_INPUT USBO2_ULP1_IPP_IND_OTG2_OC_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_PTD8

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0xCD0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTD8 SW_MUX_CTL_PAD_PTD8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


DA_IP_HS_USB2PHY_28FDSOI_USB_ID_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0xD024 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DA_IP_HS_USB2PHY_28FDSOI_USB_ID_SELECT_INPUT DA_IP_HS_USB2PHY_28FDSOI_USB_ID_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


VIDEO_IN_IPP_IND_DE_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0xD360 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VIDEO_IN_IPP_IND_DE_SELECT_INPUT VIDEO_IN_IPP_IND_DE_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_PTD9

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0xD74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTD9 SW_MUX_CTL_PAD_PTD9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_PTC10

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0xDC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTC10 SW_MUX_CTL_PAD_PTC10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_PTD10

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0xE1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTD10 SW_MUX_CTL_PAD_PTD10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO4_SELECT_INPUT

N_SELECT_INPUT DAISY Register
address_offset : 0xE3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO4_SELECT_INPUT D_IP_FLEXIO_SYN1_IPP_IND_FLEXIO4_SELECT_INPUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DAISY INVERSION

DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write

INVERSION : Control the inversion of the pad->module input
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : DISABLE_INV

Disable inversion.

0x1 : ENABLE_INV

Enable inversion.

End of enumeration elements list.


SW_MUX_CTL_PAD_PTD11

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0xEC8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_PTD11 SW_MUX_CTL_PAD_PTD11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.


SW_MUX_CTL_PAD_RESERVED12

SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0xF78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SW_MUX_CTL_PAD_RESERVED12 SW_MUX_CTL_PAD_RESERVED12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE ODE DSE MUX_MODE LK IBE OBE

PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : PS_0_pull_down

pull-down

0x1 : PS_1_pull_up

pull-up

End of enumeration elements list.

PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

0 : PE_0_pull_disabled

pull disabled

0x1 : PE_1_pull_enabled

pull enabled

End of enumeration elements list.

SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

0 : SRE_0_Standard

Standard

0x1 : SRE_1_Slow

Slow

End of enumeration elements list.

ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

0 : ODE_0_Push_pull

Push-pull

0x1 : ODE_1_Open_drain

Open-drain

End of enumeration elements list.

DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

0 : DSE_0_Standard

Standard

0x1 : DSE_1_Hi_Drive

Hi Drive

End of enumeration elements list.

MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write

LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

0 : LK_0_Disabled

Disabled

0x1 : LK_1_Enabled

Enabled

End of enumeration elements list.

IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

0 : IBE_0_Disabled

Disabled

0x1 : IBE_1_Enabled

Enabled

End of enumeration elements list.

OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

0 : OBE_0_Disabled

Disabled

0x1 : OBE_1_Enabled

Enabled

End of enumeration elements list.



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