Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x298 byte (0x0)
mem_usage : registers
protection : not protected
LPSPI1_IPP_IND_LPSPI_SDO_SELECT_INPUT
LPTPM0_IPP_IND_LPTPM_CH0_SELECT_INPUT
LPTPM0_IPP_IND_LPTPM_CH1_SELECT_INPUT
LPTPM0_IPP_IND_LPTPM_CH2_SELECT_INPUT
LPTPM0_IPP_IND_LPTPM_CH3_SELECT_INPUT
LPTPM0_IPP_IND_LPTPM_CH4_SELECT_INPUT
LPTPM0_IPP_IND_LPTPM_CH5_SELECT_INPUT
LPTPM1_IPP_IND_LPTPM_CH0_SELECT_INPUT
LPTPM1_IPP_IND_LPTPM_CH1_SELECT_INPUT
LPTPM2_IPP_IND_LPTPM_CH0_SELECT_INPUT
LPTPM2_IPP_IND_LPTPM_CH1_SELECT_INPUT
LPTPM3_IPP_IND_LPTPM_CH0_SELECT_INPUT
LPSPI0_IPP_IND_LPSPI_PCS0_SELECT_INPUT
LPTPM3_IPP_IND_LPTPM_CH1_SELECT_INPUT
LPTPM3_IPP_IND_LPTPM_CH2_SELECT_INPUT
LPTPM3_IPP_IND_LPTPM_CH3_SELECT_INPUT
LPTPM3_IPP_IND_LPTPM_CH4_SELECT_INPUT
LPTPM3_IPP_IND_LPTPM_CH5_SELECT_INPUT
LPI2C0_IPP_IND_LPI2C_HREQ_SELECT_INPUT
LPI2C0_IPP_IND_LPI2C_SCL_SELECT_INPUT
LPI2C0_IPP_IND_LPI2C_SDA_SELECT_INPUT
LPI2C1_IPP_IND_LPI2C_HREQ_SELECT_INPUT
LPI2C1_IPP_IND_LPI2C_SCL_SELECT_INPUT
LPI2C1_IPP_IND_LPI2C_SDA_SELECT_INPUT
LPSPI0_IPP_IND_LPSPI_PCS1_SELECT_INPUT
LPI2C2_IPP_IND_LPI2C_HREQ_SELECT_INPUT
LPI2C2_IPP_IND_LPI2C_SCL_SELECT_INPUT
LPI2C2_IPP_IND_LPI2C_SDA_SELECT_INPUT
LPI2C3_IPP_IND_LPI2C_HREQ_SELECT_INPUT
LPI2C3_IPP_IND_LPI2C_SCL_SELECT_INPUT
LPI2C3_IPP_IND_LPI2C_SDA_SELECT_INPUT
LPTPM0_IPP_IND_LPTPM_CLK_SELECT_INPUT
LPTPM1_IPP_IND_LPTPM_CLK_SELECT_INPUT
LPTPM3_IPP_IND_LPTPM_CLK_SELECT_INPUT
PCC_AIPS0_IPP_IND_EXTCLK55_SELECT_INPUT
LPSPI0_IPP_IND_LPSPI_PCS2_SELECT_INPUT
SAI0_IPP_IND_SAI_RXBCLK_SELECT_INPUT
SAI0_IPP_IND_SAI_RXSYNC_SELECT_INPUT
SAI0_IPP_IND_SAI_TXBCLK_SELECT_INPUT
SAI0_IPP_IND_SAI_TXSYNC_SELECT_INPUT
PCC_AIPS1_IPP_IND_EXTCLK42_SELECT_INPUT
SAI1_IPP_IND_SAI_RXBCLK_SELECT_INPUT
SAI1_IPP_IND_SAI_RXSYNC_SELECT_INPUT
SAI1_IPP_IND_SAI_TXBCLK_SELECT_INPUT
SAI1_IPP_IND_SAI_TXSYNC_SELECT_INPUT
SAI0_IPP_IND_SAI_RXDATA0_SELECT_INPUT
LPSPI0_IPP_IND_LPSPI_PCS3_SELECT_INPUT
SAI0_IPP_IND_SAI_RXDATA1_SELECT_INPUT
SAI1_IPP_IND_SAI_RXDATA0_SELECT_INPUT
SAI1_IPP_IND_SAI_RXDATA1_SELECT_INPUT
SAI1_IPP_IND_SAI_RXDATA2_SELECT_INPUT
SAI1_IPP_IND_SAI_RXDATA3_SELECT_INPUT
LPTPM2_IPP_IND_LPTPM_CLK_SELECT_INPUT
LPUART0_IPP_IND_LPUART_CTS_B_SELECT_INPUT
LPUART0_IPP_IND_LPUART_RXD_SELECT_INPUT
LPSPI0_IPP_IND_LPSPI_SCK_SELECT_INPUT
LPUART0_IPP_IND_LPUART_TXD_SELECT_INPUT
LPUART1_IPP_IND_LPUART_CTS_B_SELECT_INPUT
LPUART1_IPP_IND_LPUART_RXD_SELECT_INPUT
LPUART1_IPP_IND_LPUART_TXD_SELECT_INPUT
LPUART2_IPP_IND_LPUART_CTS_B_SELECT_INPUT
LPUART2_IPP_IND_LPUART_RXD_SELECT_INPUT
LPUART2_IPP_IND_LPUART_TXD_SELECT_INPUT
LPUART3_IPP_IND_LPUART_CTS_B_SELECT_INPUT
LPUART3_IPP_IND_LPUART_RXD_SELECT_INPUT
LPSPI0_IPP_IND_LPSPI_SDI_SELECT_INPUT
LPUART3_IPP_IND_LPUART_TXD_SELECT_INPUT
D_IP_EWM_SYN_EWM_IN_SELECT_INPUT
LPSPI0_IPP_IND_LPSPI_SDO_SELECT_INPUT
LPSPI1_IPP_IND_LPSPI_PCS0_SELECT_INPUT
LPSPI1_IPP_IND_LPSPI_PCS1_SELECT_INPUT
LPSPI1_IPP_IND_LPSPI_PCS2_SELECT_INPUT
LPSPI1_IPP_IND_LPSPI_PCS3_SELECT_INPUT
LPSPI1_IPP_IND_LPSPI_SCK_SELECT_INPUT
LPSPI1_IPP_IND_LPSPI_SDI_SELECT_INPUT
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x102C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x106C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x10E4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x11A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x11A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x1260 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x12E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x1324 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x138 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x13EC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x1420 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x14B8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x1564 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x16AC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x16C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x17F8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x1948 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x1A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x1A9C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x1BF4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x1D50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x1E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x1EB0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x200 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x2014 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x217C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x220 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x22E8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x2458 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x25CC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x264 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x2744 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x28C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
SW_MUX_CTL_PAD_RESET0_b SW MUX Control Register
address_offset : 0x294 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x2A40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x2AC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x2BC4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x2D4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x2ED8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x2F8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x304 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x3068 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x31FC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x3394 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x348 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x3530 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x36D0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x3874 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x39C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x3A1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x3BC8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x3D78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x3F2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x3F4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x40C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x40E4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x42A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x4460 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x450 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x4624 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x47EC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x49B8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x4B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x4B88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x4D5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x4F34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x5110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x514 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x518 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x52F0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x54D4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x56BC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x57C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x58A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x5A98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x5C8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x5E8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x5E84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x6080 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x628 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x6280 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x6484 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x658 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x668C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x6898 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x6AA8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x6CBC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x6CC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x6ED4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x70F0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x7310 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x73C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x744 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x7534 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x775C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x7C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x840 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x854 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x8C4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x94C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0x970 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0x9D8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0xA68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0xA90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0xAFC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0xB4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0xB94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0xBB4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0xC30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0xCD0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0xCDC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0xD74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0xDC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0xE08 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0xE1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0xEC8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
N_SELECT_INPUT_DAISY_Register
address_offset : 0xF38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAISY : Selects source pad for Module Input Function. Refer to "Input SSS" column from "Input Mux" tab on IOMUX Sheet.
bits : 0 - 2 (3 bit)
access : read-write
INVERSION : Controls the inversion of the pad->module input to instance
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : DISABLE_INV
Disable inversion.
0x1 : ENABLE_INV
Enable inversion.
End of enumeration elements list.
SW_MUX_CTL_PAD SW MUX Control Register
address_offset : 0xF78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PS : Pull Select Field
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : PS_0_pull_down
pull-down
0x1 : PS_1_pull_up
pull-up
End of enumeration elements list.
PE : Pull-up Enable Field
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : PE_0_pull_disabled
pull disabled
0x1 : PE_1_pull_enabled
pull enabled
End of enumeration elements list.
SRE : Slew Rate Enable Field
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : SRE_0_Standard
Standard
0x1 : SRE_1_Slow
Slow
End of enumeration elements list.
ODE : Open-drain Enable Field
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : ODE_0_Push_pull
Push-pull
0x1 : ODE_1_Open_drain
Open-drain
End of enumeration elements list.
DSE : Drive Strength Enable Field
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : DSE_0_Standard
Standard
0x1 : DSE_1_Hi_Drive
Hi Drive
End of enumeration elements list.
MUX_MODE : MUX Mode Select Field.
bits : 8 - 11 (4 bit)
access : read-write
LK : Lock Field
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : LK_0_Disabled
Disabled
0x1 : LK_1_Enabled
Enabled
End of enumeration elements list.
IBE : Input Buffer Enable Field
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IBE_0_Disabled
Disabled
0x1 : IBE_1_Enabled
Enabled
End of enumeration elements list.
OBE : Output Buffer Enable Field
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : OBE_0_Disabled
Disabled
0x1 : OBE_1_Enabled
Enabled
End of enumeration elements list.
DFE : Digital Filter Enable Field
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
0 : DFE_0_Disabled
Disabled
0x1 : DFE_1_Enabled
Enabled
End of enumeration elements list.
DFCS : Digital Filter Clock Select Field
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : DFCS_0_IPG_Clk
IPG Clk
0x1 : DFCS_1_1Khz_CLK
1Khz CLK
End of enumeration elements list.
DFD : Digital Filter Duration Field
bits : 22 - 26 (5 bit)
access : read-write
Enumeration:
0 : DFD_0_Disabled
Disabled
0x1 : DFD_1_Count1
Count1
0x2 : DFD_2_Count2
Count2
0x3 : DFD_3_Count3
Count3
0x4 : DFD_4_Count4
Count4
0x5 : DFD_5_Count5
Count5
0x6 : DFD_6_Count6
Count6
0x7 : DFD_7_Count7
Count7
0x8 : DFD_8_Count8
Count8
0x9 : DFD_9_Count9
Count9
0xA : DFD_10_Count10
Count10
0xB : DFD_11_Count11
Count11
0xC : DFD_12_Count12
Count12
0xD : DFD_13_Count13
Count13
0xE : DFD_14_Count14
Count14
0xF : DFD_15_Count15
Count15
0x10 : DFD_16_Count16
Count16
0x11 : DFD_17_Count17
Count17
0x12 : DFD_18_Count18
Count18
0x13 : DFD_19_Count19
Count19
0x14 : DFD_20_Count20
Count20
0x15 : DFD_21_Count21
Count21
0x16 : DFD_22_Count22
Count22
0x17 : DFD_23_Count23
Count23
0x18 : DFD_24_Count24
Count24
0x19 : DFD_25_Count25
Count25
0x1A : DFD_26_Count26
Count26
0x1B : DFD_27_Count27
Count27
0x1C : DFD_28_Count28
Count28
0x1D : DFD_29_Count29
Count29
0x1E : DFD_30_Count30
Count30
0x1F : DFD_31_Count31
Count31
End of enumeration elements list.
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