\n
address_offset : 0x0 Bytes (0x0)
size : 0xE04 byte (0x0)
mem_usage : registers
protection : not protected
Interrupt Set Enable Register n
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SETENA : Interrupt set enable bits
bits : 0 - 31 (32 bit)
access : read-write
Interrupt Set Pending Register n
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SETPEND : Interrupt set-pending bits
bits : 0 - 31 (32 bit)
access : read-write
Interrupt Set Pending Register n
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SETPEND : Interrupt set-pending bits
bits : 0 - 31 (32 bit)
access : read-write
Interrupt Set Pending Register n
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SETPEND : Interrupt set-pending bits
bits : 0 - 31 (32 bit)
access : read-write
Interrupt Set Pending Register n
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SETPEND : Interrupt set-pending bits
bits : 0 - 31 (32 bit)
access : read-write
Interrupt Clear Pending Register n
address_offset : 0x180 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRPEND : Interrupt clear-pending bits
bits : 0 - 31 (32 bit)
access : read-write
Interrupt Clear Pending Register n
address_offset : 0x184 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRPEND : Interrupt clear-pending bits
bits : 0 - 31 (32 bit)
access : read-write
Interrupt Clear Pending Register n
address_offset : 0x188 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRPEND : Interrupt clear-pending bits
bits : 0 - 31 (32 bit)
access : read-write
Interrupt Clear Pending Register n
address_offset : 0x18C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRPEND : Interrupt clear-pending bits
bits : 0 - 31 (32 bit)
access : read-write
Interrupt Active bit Register n
address_offset : 0x200 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ACTIVE : Interrupt active flags
bits : 0 - 31 (32 bit)
access : read-write
Interrupt Active bit Register n
address_offset : 0x204 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ACTIVE : Interrupt active flags
bits : 0 - 31 (32 bit)
access : read-write
Interrupt Active bit Register n
address_offset : 0x208 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ACTIVE : Interrupt active flags
bits : 0 - 31 (32 bit)
access : read-write
Interrupt Active bit Register n
address_offset : 0x20C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ACTIVE : Interrupt active flags
bits : 0 - 31 (32 bit)
access : read-write
Interrupt Priority Register 0
address_offset : 0x300 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI0 : Priority of the INT_DMA0 interrupt 0
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 1
address_offset : 0x301 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI1 : Priority of the INT_DMA1 interrupt 1
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 2
address_offset : 0x302 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI2 : Priority of the INT_DMA2 interrupt 2
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 3
address_offset : 0x303 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI3 : Priority of the INT_DMA3 interrupt 3
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 4
address_offset : 0x304 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI4 : Priority of the INT_DMA4 interrupt 4
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 5
address_offset : 0x305 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI5 : Priority of the INT_DMA5 interrupt 5
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 6
address_offset : 0x306 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI6 : Priority of the INT_DMA6 interrupt 6
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 7
address_offset : 0x307 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI7 : Priority of the INT_DMA7 interrupt 7
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 8
address_offset : 0x308 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI8 : Priority of the INT_DMA8 interrupt 8
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 9
address_offset : 0x309 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI9 : Priority of the INT_DMA9 interrupt 9
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 10
address_offset : 0x30A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI10 : Priority of the INT_DMA10 interrupt 10
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 11
address_offset : 0x30B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI11 : Priority of the INT_DMA11 interrupt 11
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 12
address_offset : 0x30C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI12 : Priority of the INT_DMA12 interrupt 12
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 13
address_offset : 0x30D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI13 : Priority of the INT_DMA13 interrupt 13
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 14
address_offset : 0x30E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI14 : Priority of the INT_DMA14 interrupt 14
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 15
address_offset : 0x30F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI15 : Priority of the INT_DMA15 interrupt 15
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 16
address_offset : 0x310 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI16 : Priority of the INT_DMA_ERROR interrupt 16
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 17
address_offset : 0x311 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI17 : Priority of the INT_CTI0_ERROR interrupt 17
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 18
address_offset : 0x312 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI18 : Priority of the INT_CTI1_ERROR interrupt 18
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 19
address_offset : 0x313 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI19 : Priority of the INT_CORE interrupt 19
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 20
address_offset : 0x314 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI20 : Priority of the INT_LPUART1 interrupt 20
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 21
address_offset : 0x315 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI21 : Priority of the INT_LPUART2 interrupt 21
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 22
address_offset : 0x316 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI22 : Priority of the INT_LPUART3 interrupt 22
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 23
address_offset : 0x317 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI23 : Priority of the INT_LPUART4 interrupt 23
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 24
address_offset : 0x318 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI24 : Priority of the INT_PIT interrupt 24
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 25
address_offset : 0x319 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI25 : Priority of the INT_USB_OTG1 interrupt 25
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 26
address_offset : 0x31A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI26 : Priority of the INT_FLEXSPI interrupt 26
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 27
address_offset : 0x31B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI27 : Priority of the INT_FLEXRAM interrupt 27
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 28
address_offset : 0x31C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI28 : Priority of the INT_LPI2C1 interrupt 28
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 29
address_offset : 0x31D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI29 : Priority of the INT_LPI2C2 interrupt 29
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 30
address_offset : 0x31E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI30 : Priority of the INT_GPT1 interrupt 30
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 31
address_offset : 0x31F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI31 : Priority of the INT_GPT2 interrupt 31
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 32
address_offset : 0x320 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI32 : Priority of the INT_LPSPI1 interrupt 32
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 33
address_offset : 0x321 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI33 : Priority of the INT_LPSPI2 interrupt 33
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 34
address_offset : 0x322 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI34 : Priority of the INT_PWM1_0 interrupt 34
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 35
address_offset : 0x323 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI35 : Priority of the INT_PWM1_1 interrupt 35
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 36
address_offset : 0x324 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI36 : Priority of the INT_PWM1_2 interrupt 36
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 37
address_offset : 0x325 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI37 : Priority of the INT_PWM1_3 interrupt 37
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 38
address_offset : 0x326 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI38 : Priority of the INT_PWM1_FAULT interrupt 38
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 39
address_offset : 0x327 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI39 : Priority of the INT_KPP interrupt 39
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 40
address_offset : 0x328 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI40 : Priority of the INT_SRC interrupt 40
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 41
address_offset : 0x329 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI41 : Priority of the INT_GPR_IRQ interrupt 41
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 42
address_offset : 0x32A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI42 : Priority of the INT_CCM_1 interrupt 42
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 43
address_offset : 0x32B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI43 : Priority of the INT_CCM_2 interrupt 43
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 44
address_offset : 0x32C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI44 : Priority of the INT_EWM interrupt 44
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 45
address_offset : 0x32D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI45 : Priority of the INT_WDOG2 interrupt 45
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 46
address_offset : 0x32E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI46 : Priority of the INT_SNVS_HP_WRAPPER interrupt 46
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 47
address_offset : 0x32F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI47 : Priority of the INT_SNVS_HP_WRAPPER_TZ interrupt 47
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 48
address_offset : 0x330 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI48 : Priority of the INT_SNVS_LP_WRAPPER interrupt 48
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 49
address_offset : 0x331 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI49 : Priority of the INT_CSU interrupt 49
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 50
address_offset : 0x332 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI50 : Priority of the INT_DCP interrupt 50
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 51
address_offset : 0x333 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI51 : Priority of the INT_DCP_VMI interrupt 51
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 52
address_offset : 0x334 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI52 : Priority of the INT_Reserved68 interrupt 52
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 53
address_offset : 0x335 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI53 : Priority of the INT_TRNG interrupt 53
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 54
address_offset : 0x336 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI54 : Priority of the INT_Reserved70 interrupt 54
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 55
address_offset : 0x337 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI55 : Priority of the INT_Reserved71 interrupt 55
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 56
address_offset : 0x338 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI56 : Priority of the INT_SAI1 interrupt 56
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 57
address_offset : 0x339 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI57 : Priority of the INT_RTWDOG interrupt 57
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 58
address_offset : 0x33A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI58 : Priority of the INT_SAI3_RX interrupt 58
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 59
address_offset : 0x33B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI59 : Priority of the INT_SAI3_TX interrupt 59
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 60
address_offset : 0x33C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI60 : Priority of the INT_SPDIF interrupt 60
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 61
address_offset : 0x33D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI61 : Priority of the INT_PMU interrupt 61
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 62
address_offset : 0x33E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI62 : Priority of the INT_XBAR1_IRQ_0_1_2_3 interrupt 62
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 63
address_offset : 0x33F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI63 : Priority of the INT_TEMP_LOW_HIGH interrupt 63
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 64
address_offset : 0x340 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI64 : Priority of the INT_TEMP_PANIC interrupt 64
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 65
address_offset : 0x341 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI65 : Priority of the INT_USB_PHY interrupt 65
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 66
address_offset : 0x342 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI66 : Priority of the INT_GPC interrupt 66
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 67
address_offset : 0x343 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI67 : Priority of the INT_ADC1 interrupt 67
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 68
address_offset : 0x344 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI68 : Priority of the INT_FLEXIO1 interrupt 68
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 69
address_offset : 0x345 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI69 : Priority of the INT_DCDC interrupt 69
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 70
address_offset : 0x346 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI70 : Priority of the INT_GPIO1_Combined_0_15 interrupt 70
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 71
address_offset : 0x347 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI71 : Priority of the INT_GPIO1_Combined_16_31 interrupt 71
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 72
address_offset : 0x348 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI72 : Priority of the INT_GPIO2_Combined_0_15 interrupt 72
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 73
address_offset : 0x349 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI73 : Priority of the INT_GPIO5_Combined_0_15 interrupt 73
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 74
address_offset : 0x34A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI74 : Priority of the INT_WDOG1 interrupt 74
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 75
address_offset : 0x34B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI75 : Priority of the INT_ADC_ETC_IRQ0 interrupt 75
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 76
address_offset : 0x34C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI76 : Priority of the INT_ADC_ETC_IRQ1 interrupt 76
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 77
address_offset : 0x34D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI77 : Priority of the INT_ADC_ETC_IRQ2 interrupt 77
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 78
address_offset : 0x34E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI78 : Priority of the INT_ADC_ETC_IRQ3 interrupt 78
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Priority Register 79
address_offset : 0x34F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI79 : Priority of the INT_ADC_ETC_ERROR_IRQ interrupt 79
bits : 4 - 7 (4 bit)
access : read-write
Interrupt Set Enable Register n
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SETENA : Interrupt set enable bits
bits : 0 - 31 (32 bit)
access : read-write
Interrupt Set Enable Register n
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SETENA : Interrupt set enable bits
bits : 0 - 31 (32 bit)
access : read-write
Interrupt Clear Enable Register n
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRENA : Interrupt clear-enable bits
bits : 0 - 31 (32 bit)
access : read-write
Interrupt Clear Enable Register n
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRENA : Interrupt clear-enable bits
bits : 0 - 31 (32 bit)
access : read-write
Interrupt Clear Enable Register n
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRENA : Interrupt clear-enable bits
bits : 0 - 31 (32 bit)
access : read-write
Interrupt Clear Enable Register n
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRENA : Interrupt clear-enable bits
bits : 0 - 31 (32 bit)
access : read-write
Interrupt Set Enable Register n
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SETENA : Interrupt set enable bits
bits : 0 - 31 (32 bit)
access : read-write
Software Trigger Interrupt Register
address_offset : 0xE00 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTID : Interrupt ID of the interrupt to trigger, in the range 0-239. For example, a value of 0x03 specifies interrupt IRQ3.
bits : 0 - 8 (9 bit)
access : read-write
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