\n
address_offset : 0x0 Bytes (0x0)
size : 0x54 byte (0x0)
mem_usage : registers
protection : not protected
Master Priviledge Registers
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MPROT5 : Master 5 Priviledge, Buffer, Read, Write Control.
bits : 8 - 11 (4 bit)
access : read-write
Enumeration:
#xxx0 : MPL0
Accesses from this master are forced to user-mode (ips_supervisor_access is forced to zero) regardless of the hprot[1] access attribute.
#xxx1 : MPL1
Accesses from this master are not forced to user-mode. The hprot[1] access attribute is used directly to determine ips_supervisor_access.
End of enumeration elements list.
MPROT3 : Master 3 Priviledge, Buffer, Read, Write Control.
bits : 16 - 19 (4 bit)
access : read-write
Enumeration:
#xxx0 : MPL0
Accesses from this master are forced to user-mode (ips_supervisor_access is forced to zero) regardless of the hprot[1] access attribute.
#xxx1 : MPL1
Accesses from this master are not forced to user-mode. The hprot[1] access attribute is used directly to determine ips_supervisor_access.
End of enumeration elements list.
MPROT2 : Master 2 Priviledge, Buffer, Read, Write Control
bits : 20 - 23 (4 bit)
access : read-write
Enumeration:
#xxx0 : MPL0
Accesses from this master are forced to user-mode (ips_supervisor_access is forced to zero) regardless of the hprot[1] access attribute.
#xxx1 : MPL1
Accesses from this master are not forced to user-mode. The hprot[1] access attribute is used directly to determine ips_supervisor_access.
End of enumeration elements list.
MPROT1 : Master 1 Priviledge, Buffer, Read, Write Control
bits : 24 - 27 (4 bit)
access : read-write
Enumeration:
#xxx0 : MPL0
Accesses from this master are forced to user-mode (ips_supervisor_access is forced to zero) regardless of the hprot[1] access attribute.
#xxx1 : MPL1
Accesses from this master are not forced to user-mode. The hprot[1] access attribute is used directly to determine ips_supervisor_access.
End of enumeration elements list.
MPROT0 : Master 0 Priviledge, Buffer, Read, Write Control
bits : 28 - 31 (4 bit)
access : read-write
Enumeration:
#xxx0 : MPL0
Accesses from this master are forced to user-mode (ips_supervisor_access is forced to zero) regardless of the hprot[1] access attribute.
#xxx1 : MPL1
Accesses from this master are not forced to user-mode. The hprot[1] access attribute is used directly to determine ips_supervisor_access.
End of enumeration elements list.
Off-Platform Peripheral Access Control Registers
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OPAC7 : Off-platform Peripheral Access Control 7
bits : 0 - 3 (4 bit)
access : read-write
Enumeration:
#xxx0 : TP0
Accesses from an untrusted master are allowed.
#xxx1 : TP1
Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
End of enumeration elements list.
OPAC6 : Off-platform Peripheral Access Control 6
bits : 4 - 7 (4 bit)
access : read-write
Enumeration:
#xxx0 : TP0
Accesses from an untrusted master are allowed.
#xxx1 : TP1
Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
End of enumeration elements list.
OPAC5 : Off-platform Peripheral Access Control 5
bits : 8 - 11 (4 bit)
access : read-write
Enumeration:
#xxx0 : TP0
Accesses from an untrusted master are allowed.
#xxx1 : TP1
Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
End of enumeration elements list.
OPAC4 : Off-platform Peripheral Access Control 4
bits : 12 - 15 (4 bit)
access : read-write
Enumeration:
#xxx0 : TP0
Accesses from an untrusted master are allowed.
#xxx1 : TP1
Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
End of enumeration elements list.
OPAC3 : Off-platform Peripheral Access Control 3
bits : 16 - 19 (4 bit)
access : read-write
Enumeration:
#xxx0 : TP0
Accesses from an untrusted master are allowed.
#xxx1 : TP1
Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
End of enumeration elements list.
OPAC2 : Off-platform Peripheral Access Control 2
bits : 20 - 23 (4 bit)
access : read-write
Enumeration:
#xxx0 : TP0
Accesses from an untrusted master are allowed.
#xxx1 : TP1
Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
End of enumeration elements list.
OPAC1 : Off-platform Peripheral Access Control 1
bits : 24 - 27 (4 bit)
access : read-write
Enumeration:
#xxx0 : TP0
Accesses from an untrusted master are allowed.
#xxx1 : TP1
Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
End of enumeration elements list.
OPAC0 : Off-platform Peripheral Access Control 0
bits : 28 - 31 (4 bit)
access : read-write
Enumeration:
#xxx0 : TP0
Accesses from an untrusted master are allowed.
#xxx1 : TP1
Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
End of enumeration elements list.
Off-Platform Peripheral Access Control Registers
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OPAC15 : Off-platform Peripheral Access Control 15
bits : 0 - 3 (4 bit)
access : read-write
Enumeration:
#xxx0 : TP0
Accesses from an untrusted master are allowed.
#xxx1 : TP1
Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
End of enumeration elements list.
OPAC14 : Off-platform Peripheral Access Control 14
bits : 4 - 7 (4 bit)
access : read-write
Enumeration:
#xxx0 : TP0
Accesses from an untrusted master are allowed.
#xxx1 : TP1
Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
End of enumeration elements list.
OPAC13 : Off-platform Peripheral Access Control 13
bits : 8 - 11 (4 bit)
access : read-write
Enumeration:
#xxx0 : TP0
Accesses from an untrusted master are allowed.
#xxx1 : TP1
Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
End of enumeration elements list.
OPAC12 : Off-platform Peripheral Access Control 12
bits : 12 - 15 (4 bit)
access : read-write
Enumeration:
#xxx0 : TP0
Accesses from an untrusted master are allowed.
#xxx1 : TP1
Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
End of enumeration elements list.
OPAC11 : Off-platform Peripheral Access Control 11
bits : 16 - 19 (4 bit)
access : read-write
Enumeration:
#xxx0 : TP0
Accesses from an untrusted master are allowed.
#xxx1 : TP1
Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
End of enumeration elements list.
OPAC10 : Off-platform Peripheral Access Control 10
bits : 20 - 23 (4 bit)
access : read-write
Enumeration:
#xxx0 : TP0
Accesses from an untrusted master are allowed.
#xxx1 : TP1
Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
End of enumeration elements list.
OPAC9 : Off-platform Peripheral Access Control 9
bits : 24 - 27 (4 bit)
access : read-write
Enumeration:
#xxx0 : TP0
Accesses from an untrusted master are allowed.
#xxx1 : TP1
Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
End of enumeration elements list.
OPAC8 : Off-platform Peripheral Access Control 8
bits : 28 - 31 (4 bit)
access : read-write
Enumeration:
#xxx0 : TP0
Accesses from an untrusted master are allowed.
#xxx1 : TP1
Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
End of enumeration elements list.
Off-Platform Peripheral Access Control Registers
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OPAC23 : Off-platform Peripheral Access Control 23
bits : 0 - 3 (4 bit)
access : read-write
Enumeration:
#xxx0 : TP0
Accesses from an untrusted master are allowed.
#xxx1 : TP1
Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
End of enumeration elements list.
OPAC22 : Off-platform Peripheral Access Control 22
bits : 4 - 7 (4 bit)
access : read-write
Enumeration:
#xxx0 : TP0
Accesses from an untrusted master are allowed.
#xxx1 : TP1
Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
End of enumeration elements list.
OPAC21 : Off-platform Peripheral Access Control 21
bits : 8 - 11 (4 bit)
access : read-write
Enumeration:
#xxx0 : TP0
Accesses from an untrusted master are allowed.
#xxx1 : TP1
Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
End of enumeration elements list.
OPAC20 : Off-platform Peripheral Access Control 20
bits : 12 - 15 (4 bit)
access : read-write
Enumeration:
#xxx0 : TP0
Accesses from an untrusted master are allowed.
#xxx1 : TP1
Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
End of enumeration elements list.
OPAC19 : Off-platform Peripheral Access Control 19
bits : 16 - 19 (4 bit)
access : read-write
Enumeration:
#xxx0 : TP0
Accesses from an untrusted master are allowed.
#xxx1 : TP1
Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
End of enumeration elements list.
OPAC18 : Off-platform Peripheral Access Control 18
bits : 20 - 23 (4 bit)
access : read-write
Enumeration:
#xxx0 : TP0
Accesses from an untrusted master are allowed.
#xxx1 : TP1
Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
End of enumeration elements list.
OPAC17 : Off-platform Peripheral Access Control 17
bits : 24 - 27 (4 bit)
access : read-write
Enumeration:
#xxx0 : TP0
Accesses from an untrusted master are allowed.
#xxx1 : TP1
Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
End of enumeration elements list.
OPAC16 : Off-platform Peripheral Access Control 16
bits : 28 - 31 (4 bit)
access : read-write
Enumeration:
#xxx0 : TP0
Accesses from an untrusted master are allowed.
#xxx1 : TP1
Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
End of enumeration elements list.
Off-Platform Peripheral Access Control Registers
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OPAC31 : Off-platform Peripheral Access Control 31
bits : 0 - 3 (4 bit)
access : read-write
Enumeration:
#xxx0 : TP0
Accesses from an untrusted master are allowed.
#xxx1 : TP1
Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
End of enumeration elements list.
OPAC30 : Off-platform Peripheral Access Control 30
bits : 4 - 7 (4 bit)
access : read-write
Enumeration:
#xxx0 : TP0
Accesses from an untrusted master are allowed.
#xxx1 : TP1
Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
End of enumeration elements list.
OPAC29 : Off-platform Peripheral Access Control 29
bits : 8 - 11 (4 bit)
access : read-write
Enumeration:
#xxx0 : TP0
Accesses from an untrusted master are allowed.
#xxx1 : TP1
Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
End of enumeration elements list.
OPAC28 : Off-platform Peripheral Access Control 28
bits : 12 - 15 (4 bit)
access : read-write
Enumeration:
#xxx0 : TP0
Accesses from an untrusted master are allowed.
#xxx1 : TP1
Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
End of enumeration elements list.
OPAC27 : Off-platform Peripheral Access Control 27
bits : 16 - 19 (4 bit)
access : read-write
Enumeration:
#xxx0 : TP0
Accesses from an untrusted master are allowed.
#xxx1 : TP1
Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
End of enumeration elements list.
OPAC26 : Off-platform Peripheral Access Control 26
bits : 20 - 23 (4 bit)
access : read-write
Enumeration:
#xxx0 : TP0
Accesses from an untrusted master are allowed.
#xxx1 : TP1
Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
End of enumeration elements list.
OPAC25 : Off-platform Peripheral Access Control 25
bits : 24 - 27 (4 bit)
access : read-write
Enumeration:
#xxx0 : TP0
Accesses from an untrusted master are allowed.
#xxx1 : TP1
Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
End of enumeration elements list.
OPAC24 : Off-platform Peripheral Access Control 24
bits : 28 - 31 (4 bit)
access : read-write
Enumeration:
#xxx0 : TP0
Accesses from an untrusted master are allowed.
#xxx1 : TP1
Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
End of enumeration elements list.
Off-Platform Peripheral Access Control Registers
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OPAC33 : Off-platform Peripheral Access Control 33
bits : 24 - 27 (4 bit)
access : read-write
Enumeration:
#xxx0 : TP0
Accesses from an untrusted master are allowed.
#xxx1 : TP1
Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
End of enumeration elements list.
OPAC32 : Off-platform Peripheral Access Control 32
bits : 28 - 31 (4 bit)
access : read-write
Enumeration:
#xxx0 : TP0
Accesses from an untrusted master are allowed.
#xxx1 : TP1
Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus.
End of enumeration elements list.
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