Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x9E4 byte (0x0)
mem_usage : registers
protection : not protected
Module Configuration Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MAXMB : This 7-bit field defines the number of the last Message Buffers that will take part in the matching and arbitration processes
bits : 0 - 6 (7 bit)
access : read-write
IDAM : This 2-bit field identifies the format of the elements of the Rx FIFO filter table, as shown below
bits : 8 - 9 (2 bit)
access : read-write
Enumeration:
0 : IDAM_0
Format A One full ID (standard or extended) per ID filter Table element.
0x1 : IDAM_1
Format B Two full standard IDs or two partial 14-bit extended IDs per ID filter Table element.
0x2 : IDAM_2
Format C Four partial 8-bit IDs (standard or extended) per ID filter Table element.
0x3 : IDAM_3
Format D All frames rejected.
End of enumeration elements list.
AEN : This bit is supplied for backwards compatibility reasons
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
0 : AEN_0
Abort disabled
0x1 : AEN_1
Abort enabled
End of enumeration elements list.
LPRIOEN : This bit is provided for backwards compatibility reasons
bits : 13 - 13 (1 bit)
access : read-write
Enumeration:
0 : LPRIOEN_0
Local Priority disabled
0x1 : LPRIOEN_1
Local Priority enabled
End of enumeration elements list.
IRMQ : This bit indicates whether Rx matching process will be based either on individual masking and queue or on masking scheme with RXMGMASK, RX14MASK and RX15MASK, RXFGMASK
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : IRMQ_0
Individual Rx masking and queue feature are disabled.For backward compatibility, the reading of C/S word locks the MB even if it is EMPTY.
0x1 : IRMQ_1
Individual Rx masking and queue feature are enabled.
End of enumeration elements list.
SRXDIS : This bit defines whether FlexCAN is allowed to receive frames transmitted by itself
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : SRXDIS_0
Self reception enabled
0x1 : SRXDIS_1
Self reception disabled
End of enumeration elements list.
WAKSRC : This bit defines whether the integrated low-pass filter is applied to protect the FLEXCAN_RX input from spurious wake up
bits : 19 - 19 (1 bit)
access : read-write
Enumeration:
0 : WAKSRC_0
FLEXCAN uses the unfiltered FLEXCAN_RX input to detect recessive to dominant edges on the CAN bus.
0x1 : WAKSRC_1
FLEXCAN uses the filtered FLEXCAN_RX input to detect recessive to dominant edges on the CAN bus
End of enumeration elements list.
LPMACK : This read-only bit indicates that FLEXCAN is either in Disable Mode or Stop Mode
bits : 20 - 20 (1 bit)
access : read-only
Enumeration:
0 : LPMACK_0
FLEXCAN not in any of the low power modes
0x1 : LPMACK_1
FLEXCAN is either in Disable Mode, or Stop mode
End of enumeration elements list.
WRNEN : When asserted, this bit enables the generation of the TWRN_INT and RWRN_INT flags in the Error and Status Register
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
0 : WRNEN_0
TWRN_INT and RWRN_INT bits are zero, independent of the values in the error counters.
0x1 : WRNEN_1
TWRN_INT and RWRN_INT bits are set when the respective error counter transition from <96 to >= 96.
End of enumeration elements list.
SLFWAK : This bit enables the Self Wake Up feature when FLEXCAN is in Stop Mode
bits : 22 - 22 (1 bit)
access : read-write
Enumeration:
0 : SLFWAK_0
FLEXCAN Self Wake Up feature is disabled
0x1 : SLFWAK_1
FLEXCAN Self Wake Up feature is enabled
End of enumeration elements list.
SUPV : This bit configures some of the FLEXCAN registers to be either in Supervisor or User Mode
bits : 23 - 23 (1 bit)
access : read-write
Enumeration:
0 : SUPV_0
FlexCAN is in User Mode. Affected registers allow both Supervisor and Unrestricted accesses
0x1 : SUPV_1
FlexCAN is in Supervisor Mode. Affected registers allow only Supervisor access. Unrestricted access behaves as though the access was done to an unimplemented register location
End of enumeration elements list.
FRZACK : This read-only bit indicates that FLEXCAN is in Freeze Mode and its prescaler is stopped
bits : 24 - 24 (1 bit)
access : read-only
Enumeration:
0 : FRZACK_0
FLEXCAN not in Freeze Mode, prescaler running
0x1 : FRZACK_1
FLEXCAN in Freeze Mode, prescaler stopped
End of enumeration elements list.
SOFTRST : When this bit is asserted, FlexCAN resets its internal state machines and some of the memory mapped registers
bits : 25 - 25 (1 bit)
access : read-write
Enumeration:
0 : SOFTRST_0
No reset request
0x1 : SOFTRST_1
Reset the registers
End of enumeration elements list.
WAKMSK : This bit enables the Wake Up Interrupt generation.
bits : 26 - 26 (1 bit)
access : read-write
Enumeration:
0 : WAKMSK_0
Wake Up Interrupt is disabled
0x1 : WAKMSK_1
Wake Up Interrupt is enabled
End of enumeration elements list.
NOTRDY : This read-only bit indicates that FLEXCAN is either in Disable Mode, Stop Mode or Freeze Mode
bits : 27 - 27 (1 bit)
access : read-only
Enumeration:
0 : NOTRDY_0
FLEXCAN module is either in Normal Mode, Listen-Only Mode or Loop-Back Mode
0x1 : NOTRDY_1
FLEXCAN module is either in Disable Mode, Stop Mode or Freeze Mode
End of enumeration elements list.
HALT : Assertion of this bit puts the FLEXCAN module into Freeze Mode
bits : 28 - 28 (1 bit)
access : read-write
Enumeration:
0 : HALT_0
No Freeze Mode request.
0x1 : HALT_1
Enters Freeze Mode if the FRZ bit is asserted.
End of enumeration elements list.
RFEN : This bit controls whether the Rx FIFO feature is enabled or not
bits : 29 - 29 (1 bit)
access : read-write
Enumeration:
0 : RFEN_0
FIFO not enabled
0x1 : RFEN_1
FIFO enabled
End of enumeration elements list.
FRZ : The FRZ bit specifies the FLEXCAN behavior when the HALT bit in the MCR Register is set or when Debug Mode is requested at Arm level
bits : 30 - 30 (1 bit)
access : read-write
Enumeration:
0 : FRZ_0
Not enabled to enter Freeze Mode
0x1 : FRZ_1
Enabled to enter Freeze Mode
End of enumeration elements list.
MDIS : This bit controls whether FLEXCAN is enabled or not
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
0 : MDIS_0
Enable the FLEXCAN module
0x1 : MDIS_1
Disable the FLEXCAN module
End of enumeration elements list.
Rx Mailboxes Global Mask Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MG : These bits mask the Mailbox filter bits as shown in the figure above
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MG_0
the corresponding bit in the filter is "don't care"
0x1 : MG_1
The corresponding bit in the filter is checked against the one received
End of enumeration elements list.
Message Buffer 8 CS Register
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 8 ID Register
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x10558 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 8 WORD0 Register
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 8 WORD1 Register
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x10E4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 9 CS Register
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x1100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 9 ID Register
address_offset : 0x114 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x11744 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 9 WORD0 Register
address_offset : 0x118 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 9 WORD1 Register
address_offset : 0x11C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 10 CS Register
address_offset : 0x120 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x12040 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 10 ID Register
address_offset : 0x124 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 10 WORD0 Register
address_offset : 0x128 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x12940 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 10 WORD1 Register
address_offset : 0x12C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 11 CS Register
address_offset : 0x130 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x13244 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 11 ID Register
address_offset : 0x134 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 11 WORD0 Register
address_offset : 0x138 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x13B4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 11 WORD1 Register
address_offset : 0x13C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Rx Buffer 14 Mask Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RX14M : These bits mask Mailbox 14 filter bits in the same fashion as RXMGMASK masks other Mailboxes filters (see RXMGMASKRx Mailboxes Global Mask Register )
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : RX14M_0
the corresponding bit in the filter is "don't care"
0x1 : RX14M_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 12 CS Register
address_offset : 0x140 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 12 ID Register
address_offset : 0x144 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x14458 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 12 WORD0 Register
address_offset : 0x148 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 12 WORD1 Register
address_offset : 0x14C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x14D68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 13 CS Register
address_offset : 0x150 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 13 ID Register
address_offset : 0x154 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x1567C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 13 WORD0 Register
address_offset : 0x158 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 13 WORD1 Register
address_offset : 0x15C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x15F94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 14 CS Register
address_offset : 0x160 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 14 ID Register
address_offset : 0x164 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 14 WORD0 Register
address_offset : 0x168 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x168B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 14 WORD1 Register
address_offset : 0x16C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 15 CS Register
address_offset : 0x170 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x171D0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 15 ID Register
address_offset : 0x174 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 15 WORD0 Register
address_offset : 0x178 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x17AF4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 15 WORD1 Register
address_offset : 0x17C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Rx Buffer 15 Mask Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RX15M : These bits mask Mailbox 15 filter bits in the same fashion as RXMGMASK masks other Mailboxes filters (see RXMGMASKRx Mailboxes Global Mask Register )
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : RX15M_0
the corresponding bit in the filter is "don't care"
0x1 : RX15M_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 16 CS Register
address_offset : 0x180 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 16 ID Register
address_offset : 0x184 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x1841C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 16 WORD0 Register
address_offset : 0x188 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 16 WORD1 Register
address_offset : 0x18C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x18D48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 17 CS Register
address_offset : 0x190 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 17 ID Register
address_offset : 0x194 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x19678 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 17 WORD0 Register
address_offset : 0x198 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x1984 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 17 WORD1 Register
address_offset : 0x19C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x19FAC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 18 CS Register
address_offset : 0x1A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 18 ID Register
address_offset : 0x1A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 18 WORD0 Register
address_offset : 0x1A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x1A8E4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 18 WORD1 Register
address_offset : 0x1AC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 19 CS Register
address_offset : 0x1B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x1B220 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 19 ID Register
address_offset : 0x1B4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 19 WORD0 Register
address_offset : 0x1B8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x1BB60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 19 WORD1 Register
address_offset : 0x1BC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Error Counter Register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TX_ERR_COUNTER : Tx_Err_Counter
bits : 0 - 7 (8 bit)
access : read-write
RX_ERR_COUNTER : Rx_Err_Counter
bits : 8 - 15 (8 bit)
access : read-write
Message Buffer 20 CS Register
address_offset : 0x1C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 20 ID Register
address_offset : 0x1C4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x1C4A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 20 WORD0 Register
address_offset : 0x1C8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 20 WORD1 Register
address_offset : 0x1CC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x1CDEC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 21 CS Register
address_offset : 0x1D0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 21 ID Register
address_offset : 0x1D4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x1D738 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 21 WORD0 Register
address_offset : 0x1D8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 21 WORD1 Register
address_offset : 0x1DC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 22 CS Register
address_offset : 0x1E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x1E088 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 22 ID Register
address_offset : 0x1E4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 22 WORD0 Register
address_offset : 0x1E8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x1E9DC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 22 WORD1 Register
address_offset : 0x1EC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 23 CS Register
address_offset : 0x1F0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x1F334 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 23 ID Register
address_offset : 0x1F4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 23 WORD0 Register
address_offset : 0x1F8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 23 WORD1 Register
address_offset : 0x1FC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x1FC90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Error and Status 1 Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WAKINT : When FLEXCAN is Stop Mode and a recessive to dominant transition is detected on the CAN bus and if the WAK_MSK bit in the MCR Register is set, an interrupt is generated to the Arm
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : WAKINT_0
No such occurrence
0x1 : WAKINT_1
Indicates a recessive to dominant transition received on the CAN bus when the FLEXCAN module is in Stop Mode
End of enumeration elements list.
ERRINT : This bit indicates that at least one of the Error Bits (bits 15-10) is set
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : ERRINT_0
No such occurrence
0x1 : ERRINT_1
Indicates setting of any Error Bit in the Error and Status Register
End of enumeration elements list.
BOFFINT : This bit is set when FLEXCAN enters 'Bus Off' state
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : BOFFINT_0
No such occurrence
0x1 : BOFFINT_1
FLEXCAN module entered 'Bus Off' state
End of enumeration elements list.
RX : This bit indicates if FlexCAN is receiving a message. Refer to .
bits : 3 - 3 (1 bit)
access : read-only
Enumeration:
0 : RX_0
FLEXCAN is receiving a message
0x1 : RX_1
FLEXCAN is transmitting a message
End of enumeration elements list.
FLTCONF : If the LOM bit in the Control Register is asserted, after some delay that depends on the CAN bit timing the FLT_CONF field will indicate "Error Passive"
bits : 4 - 5 (2 bit)
access : read-only
Enumeration:
0 : FLTCONF_0
Error Active
0x1 : FLTCONF_1
Error Passive
#1x : FLTCONF_2
Bus off
End of enumeration elements list.
TX : This bit indicates if FLEXCAN is transmitting a message.Refer to .
bits : 6 - 6 (1 bit)
access : read-only
Enumeration:
0 : TX_0
FLEXCAN is receiving a message
0x1 : TX_1
FLEXCAN is transmitting a message
End of enumeration elements list.
IDLE : This bit indicates when CAN bus is in IDLE state.Refer to .
bits : 7 - 7 (1 bit)
access : read-only
Enumeration:
0 : IDLE_0
No such occurrence
0x1 : IDLE_1
CAN bus is now IDLE
End of enumeration elements list.
RXWRN : This bit indicates when repetitive errors are occurring during message reception.
bits : 8 - 8 (1 bit)
access : read-only
Enumeration:
0 : RXWRN_0
No such occurrence
0x1 : RXWRN_1
Rx_Err_Counter >= 96
End of enumeration elements list.
TXWRN : This bit indicates when repetitive errors are occurring during message transmission.
bits : 9 - 9 (1 bit)
access : read-only
Enumeration:
0 : TXWRN_0
No such occurrence
0x1 : TXWRN_1
TX_Err_Counter >= 96
End of enumeration elements list.
STFERR : This bit indicates that a Stuffing Error has been detected.
bits : 10 - 10 (1 bit)
access : read-only
Enumeration:
0 : STFERR_0
No such occurrence.
0x1 : STFERR_1
A Stuffing Error occurred since last read of this register.
End of enumeration elements list.
FRMERR : This bit indicates that a Form Error has been detected by the receiver node, i
bits : 11 - 11 (1 bit)
access : read-only
Enumeration:
0 : FRMERR_0
No such occurrence
0x1 : FRMERR_1
A Form Error occurred since last read of this register
End of enumeration elements list.
CRCERR : This bit indicates that a CRC Error has been detected by the receiver node, i
bits : 12 - 12 (1 bit)
access : read-only
Enumeration:
0 : CRCERR_0
No such occurrence
0x1 : CRCERR_1
A CRC error occurred since last read of this register.
End of enumeration elements list.
ACKERR : This bit indicates that an Acknowledge Error has been detected by the transmitter node, i
bits : 13 - 13 (1 bit)
access : read-only
Enumeration:
0 : ACKERR_0
No such occurrence
0x1 : ACKERR_1
An ACK error occurred since last read of this register
End of enumeration elements list.
BIT0ERR : This bit indicates when an inconsistency occurs between the transmitted and the received bit in a message
bits : 14 - 14 (1 bit)
access : read-only
Enumeration:
0 : BIT0ERR_0
No such occurrence
0x1 : BIT0ERR_1
At least one bit sent as dominant is received as recessive
End of enumeration elements list.
BIT1ERR : This bit indicates when an inconsistency occurs between the transmitted and the received bit in a message
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
0 : BIT1ERR_0
No such occurrence
0x1 : BIT1ERR_1
At least one bit sent as recessive is received as dominant
End of enumeration elements list.
RWRNINT : If the WRN_EN bit in MCR is asserted, the RWRN_INT bit is set when the RX_WRN flag transition from '0' to '1', meaning that the Rx error counters reached 96
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : RWRNINT_0
No such occurrence
0x1 : RWRNINT_1
The Rx error counter transition from < 96 to >= 96
End of enumeration elements list.
TWRNINT : If the WRN_EN bit in MCR is asserted, the TWRN_INT bit is set when the TX_WRN flag transition from '0' to '1', meaning that the Tx error counter reached 96
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : TWRNINT_0
No such occurrence
0x1 : TWRNINT_1
The Tx error counter transition from < 96 to >= 96
End of enumeration elements list.
SYNCH : This read-only flag indicates whether the FlexCAN is synchronized to the CAN bus and able to participate in the communication process
bits : 18 - 18 (1 bit)
access : read-only
Enumeration:
0 : SYNCH_0
FlexCAN is not synchronized to the CAN bus
0x1 : SYNCH_1
FlexCAN is synchronized to the CAN bus
End of enumeration elements list.
Message Buffer 24 CS Register
address_offset : 0x200 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 24 ID Register
address_offset : 0x204 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x205F0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 24 WORD0 Register
address_offset : 0x208 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 24 WORD1 Register
address_offset : 0x20C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x20F54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 25 CS Register
address_offset : 0x210 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 25 ID Register
address_offset : 0x214 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 25 WORD0 Register
address_offset : 0x218 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x218BC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 25 WORD1 Register
address_offset : 0x21C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 26 CS Register
address_offset : 0x220 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x220C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Rx Individual Mask Registers
address_offset : 0x22228 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 26 ID Register
address_offset : 0x224 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 26 WORD0 Register
address_offset : 0x228 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x22B98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 26 WORD1 Register
address_offset : 0x22C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 27 CS Register
address_offset : 0x230 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 27 ID Register
address_offset : 0x234 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x2350C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 27 WORD0 Register
address_offset : 0x238 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 27 WORD1 Register
address_offset : 0x23C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x23E84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Interrupt Masks 2 Register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BUFHM : Each bit enables or disables the respective FLEXCAN Message Buffer (MB32 to MB63) Interrupt
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : BUFHM_0
The corresponding buffer Interrupt is disabled
0x1 : BUFHM_1
The corresponding buffer Interrupt is enabled
End of enumeration elements list.
Message Buffer 28 CS Register
address_offset : 0x240 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 28 ID Register
address_offset : 0x244 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 28 WORD0 Register
address_offset : 0x248 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x24800 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 28 WORD1 Register
address_offset : 0x24C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 29 CS Register
address_offset : 0x250 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 29 ID Register
address_offset : 0x254 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 29 WORD0 Register
address_offset : 0x258 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 29 WORD1 Register
address_offset : 0x25C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 30 CS Register
address_offset : 0x260 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 30 ID Register
address_offset : 0x264 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 30 WORD0 Register
address_offset : 0x268 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 30 WORD1 Register
address_offset : 0x26C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 31 CS Register
address_offset : 0x270 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 31 ID Register
address_offset : 0x274 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 31 WORD0 Register
address_offset : 0x278 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 31 WORD1 Register
address_offset : 0x27C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Interrupt Masks 1 Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BUFLM : Each bit enables or disables the respective FLEXCAN Message Buffer (MB0 to MB31) Interrupt
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : BUFLM_0
The corresponding buffer Interrupt is disabled
0x1 : BUFLM_1
The corresponding buffer Interrupt is enabled
End of enumeration elements list.
Message Buffer 32 CS Register
address_offset : 0x280 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 32 ID Register
address_offset : 0x284 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 32 WORD0 Register
address_offset : 0x288 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 32 WORD1 Register
address_offset : 0x28C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 33 CS Register
address_offset : 0x290 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 33 ID Register
address_offset : 0x294 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 33 WORD0 Register
address_offset : 0x298 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 33 WORD1 Register
address_offset : 0x29C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 34 CS Register
address_offset : 0x2A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 34 ID Register
address_offset : 0x2A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 34 WORD0 Register
address_offset : 0x2A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x2A98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 34 WORD1 Register
address_offset : 0x2AC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 35 CS Register
address_offset : 0x2B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 35 ID Register
address_offset : 0x2B4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 35 WORD0 Register
address_offset : 0x2B8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 35 WORD1 Register
address_offset : 0x2BC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Interrupt Flags 2 Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BUFHI : Each bit flags the respective FLEXCAN Message Buffer (MB32 to MB63) interrupt.
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : BUFHI_0
No such occurrence
0x1 : BUFHI_1
The corresponding buffer has successfully completed transmission or reception
End of enumeration elements list.
Message Buffer 36 CS Register
address_offset : 0x2C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 36 ID Register
address_offset : 0x2C4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 36 WORD0 Register
address_offset : 0x2C8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 36 WORD1 Register
address_offset : 0x2CC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 37 CS Register
address_offset : 0x2D0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 37 ID Register
address_offset : 0x2D4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 37 WORD0 Register
address_offset : 0x2D8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 37 WORD1 Register
address_offset : 0x2DC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 38 CS Register
address_offset : 0x2E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 38 ID Register
address_offset : 0x2E4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 38 WORD0 Register
address_offset : 0x2E8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 38 WORD1 Register
address_offset : 0x2EC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 39 CS Register
address_offset : 0x2F0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 39 ID Register
address_offset : 0x2F4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 39 WORD0 Register
address_offset : 0x2F8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 39 WORD1 Register
address_offset : 0x2FC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Interrupt Flags 1 Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BUF4TO0I : If the Rx FIFO is not enabled, these bits flag the interrupts for MB0 to MB4
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
0 : BUF4TO0I_0
No such occurrence
0x1 : BUF4TO0I_1
Corresponding MB completed transmission/reception
End of enumeration elements list.
BUF5I : If the Rx FIFO is not enabled, this bit flags the interrupt for MB5
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : BUF5I_0
No such occurrence
0x1 : BUF5I_1
MB5 completed transmission/reception or frames available in the FIFO
End of enumeration elements list.
BUF6I : If the Rx FIFO is not enabled, this bit flags the interrupt for MB6
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : BUF6I_0
No such occurrence
0x1 : BUF6I_1
MB6 completed transmission/reception or FIFO almost full
End of enumeration elements list.
BUF7I : If the Rx FIFO is not enabled, this bit flags the interrupt for MB7
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
0 : BUF7I_0
No such occurrence
0x1 : BUF7I_1
MB7 completed transmission/reception or FIFO overflow
End of enumeration elements list.
BUF31TO8I : Each bit flags the respective FLEXCAN Message Buffer (MB8 to MB31) interrupt.
bits : 8 - 31 (24 bit)
access : read-write
Enumeration:
0 : BUF31TO8I_0
No such occurrence
0x1 : BUF31TO8I_1
The corresponding MB has successfully completed transmission or reception
End of enumeration elements list.
Message Buffer 40 CS Register
address_offset : 0x300 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 40 ID Register
address_offset : 0x304 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 40 WORD0 Register
address_offset : 0x308 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 40 WORD1 Register
address_offset : 0x30C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 41 CS Register
address_offset : 0x310 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 41 ID Register
address_offset : 0x314 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 41 WORD0 Register
address_offset : 0x318 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 41 WORD1 Register
address_offset : 0x31C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 42 CS Register
address_offset : 0x320 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 42 ID Register
address_offset : 0x324 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 42 WORD0 Register
address_offset : 0x328 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 42 WORD1 Register
address_offset : 0x32C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 43 CS Register
address_offset : 0x330 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x3328 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 43 ID Register
address_offset : 0x334 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 43 WORD0 Register
address_offset : 0x338 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 43 WORD1 Register
address_offset : 0x33C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Control 2 Register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EACEN : This bit controls the comparison of IDE and RTR bits within Rx Mailboxes filters with their corresponding bits in the incoming frame by the matching process
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
0 : EACEN_0
Rx Mailbox filter's IDE bit is always compared and RTR is never compared despite mask bits.
0x1 : EACEN_1
Enables the comparison of both Rx Mailbox filter's IDE and RTR bit with their corresponding bits within the incoming frame. Mask bits do apply.
End of enumeration elements list.
RRS : If this bit is asserted Remote Request Frame is submitted to a matching process and stored in the corresponding Message Buffer in the same fashion of a Data Frame
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
0 : RRS_0
Remote Response Frame is generated
0x1 : RRS_1
Remote Request Frame is stored
End of enumeration elements list.
MRP : If this bit is set the matching process starts from the Mailboxes and if no match occurs the matching continues on the Rx FIFO
bits : 18 - 18 (1 bit)
access : read-write
Enumeration:
0 : MRP_0
Matching starts from Rx FIFO and continues on Mailboxes
0x1 : MRP_1
Matching starts from Mailboxes and continues on Rx FIFO
End of enumeration elements list.
TASD : This 5-bit field indicates how many CAN bits the Tx arbitration process start point can be delayed from the first bit of CRC field on CAN bus
bits : 19 - 23 (5 bit)
access : read-write
RFFN : This 4-bit field defines the number of Rx FIFO filters according to
bits : 24 - 27 (4 bit)
access : read-write
WRMFRZ : Enable unrestricted write access to FlexCAN memory in Freeze mode
bits : 28 - 28 (1 bit)
access : read-write
Enumeration:
0 : WRMFRZ_0
Keep the write access restricted in some regions of FlexCAN memory
0x1 : WRMFRZ_1
Enable unrestricted write access to FlexCAN memory
End of enumeration elements list.
Message Buffer 44 CS Register
address_offset : 0x340 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 44 ID Register
address_offset : 0x344 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 44 WORD0 Register
address_offset : 0x348 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 44 WORD1 Register
address_offset : 0x34C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 45 CS Register
address_offset : 0x350 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 45 ID Register
address_offset : 0x354 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 45 WORD0 Register
address_offset : 0x358 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 45 WORD1 Register
address_offset : 0x35C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 46 CS Register
address_offset : 0x360 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 46 ID Register
address_offset : 0x364 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 46 WORD0 Register
address_offset : 0x368 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 46 WORD1 Register
address_offset : 0x36C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 47 CS Register
address_offset : 0x370 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 47 ID Register
address_offset : 0x374 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 47 WORD0 Register
address_offset : 0x378 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 47 WORD1 Register
address_offset : 0x37C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Error and Status 2 Register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
IMB : If ESR2[VPS] is asserted, this bit indicates whether there is any inactive Mailbox (CODE field is either 0b1000 or 0b0000)
bits : 13 - 13 (1 bit)
access : read-only
Enumeration:
0 : IMB_0
If ESR2[VPS] is asserted, the ESR2[LPTM] is not an inactive Mailbox.
0x1 : IMB_1
If ESR2[VPS] is asserted, there is at least one inactive Mailbox. LPTM content is the number of the first one.
End of enumeration elements list.
VPS : This bit indicates whether IMB and LPTM contents are currently valid or not
bits : 14 - 14 (1 bit)
access : read-only
Enumeration:
0 : VPS_0
Contents of IMB and LPTM are invalid
0x1 : VPS_1
Contents of IMB and LPTM are valid
End of enumeration elements list.
LPTM : If ESR2[VPS] is asserted, his 7-bit field indicates the lowest number inactive Mailbox (refer to IMB bit description)
bits : 16 - 22 (7 bit)
access : read-only
Message Buffer 48 CS Register
address_offset : 0x380 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 48 ID Register
address_offset : 0x384 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 48 WORD0 Register
address_offset : 0x388 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 48 WORD1 Register
address_offset : 0x38C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 49 CS Register
address_offset : 0x390 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 49 ID Register
address_offset : 0x394 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 49 WORD0 Register
address_offset : 0x398 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 49 WORD1 Register
address_offset : 0x39C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 50 CS Register
address_offset : 0x3A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 50 ID Register
address_offset : 0x3A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 50 WORD0 Register
address_offset : 0x3A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 50 WORD1 Register
address_offset : 0x3AC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 51 CS Register
address_offset : 0x3B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 51 ID Register
address_offset : 0x3B4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 51 WORD0 Register
address_offset : 0x3B8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x3BBC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 51 WORD1 Register
address_offset : 0x3BC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 52 CS Register
address_offset : 0x3C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 52 ID Register
address_offset : 0x3C4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 52 WORD0 Register
address_offset : 0x3C8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 52 WORD1 Register
address_offset : 0x3CC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 53 CS Register
address_offset : 0x3D0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 53 ID Register
address_offset : 0x3D4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 53 WORD0 Register
address_offset : 0x3D8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 53 WORD1 Register
address_offset : 0x3DC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 54 CS Register
address_offset : 0x3E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 54 ID Register
address_offset : 0x3E4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 54 WORD0 Register
address_offset : 0x3E8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 54 WORD1 Register
address_offset : 0x3EC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 55 CS Register
address_offset : 0x3F0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 55 ID Register
address_offset : 0x3F4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 55 WORD0 Register
address_offset : 0x3F8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 55 WORD1 Register
address_offset : 0x3FC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Control 1 Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROPSEG : This 3-bit field defines the length of the Propagation Segment in the bit time
bits : 0 - 2 (3 bit)
access : read-write
LOM : This bit configures FLEXCAN to operate in Listen Only Mode
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0 : LOM_0
Listen Only Mode is deactivated
0x1 : LOM_1
FLEXCAN module operates in Listen Only Mode
End of enumeration elements list.
LBUF : This bit defines the ordering mechanism for Message Buffer transmission
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
0 : LBUF_0
Buffer with highest priority is transmitted first
0x1 : LBUF_1
Lowest number buffer is transmitted first
End of enumeration elements list.
TSYN : This bit enables a mechanism that resets the free-running timer each time a message is received in Message Buffer 0
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
0 : TSYN_0
Timer Sync feature disabled
0x1 : TSYN_1
Timer Sync feature enabled
End of enumeration elements list.
BOFFREC : This bit defines how FLEXCAN recovers from Bus Off state
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
0 : BOFFREC_0
Automatic recovering from Bus Off state enabled, according to CAN Spec 2.0 part B
0x1 : BOFFREC_1
Automatic recovering from Bus Off state disabled
End of enumeration elements list.
SMP : This bit defines the sampling mode of CAN bits at the FLEXCAN_RX
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
0 : SMP_0
Just one sample is used to determine the bit value
0x1 : SMP_1
Three samples are used to determine the value of the received bit: the regular one (sample point) and 2 preceding samples, a majority rule is used
End of enumeration elements list.
RWRNMSK : This bit provides a mask for the Rx Warning Interrupt associated with the RWRN_INT flag in the Error and Status Register
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
0 : RWRNMSK_0
Rx Warning Interrupt disabled
0x1 : RWRNMSK_1
Rx Warning Interrupt enabled
End of enumeration elements list.
TWRNMSK : This bit provides a mask for the Tx Warning Interrupt associated with the TWRN_INT flag in the Error and Status Register
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
0 : TWRNMSK_0
Tx Warning Interrupt disabled
0x1 : TWRNMSK_1
Tx Warning Interrupt enabled
End of enumeration elements list.
LPB : This bit configures FlexCAN to operate in Loop-Back Mode
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
0 : LPB_0
Loop Back disabled
0x1 : LPB_1
Loop Back enabled
End of enumeration elements list.
ERRMSK : This bit provides a mask for the Error Interrupt.
bits : 14 - 14 (1 bit)
access : read-write
Enumeration:
0 : ERRMSK_0
Error interrupt disabled
0x1 : ERRMSK_1
Error interrupt enabled
End of enumeration elements list.
BOFFMSK : This bit provides a mask for the Bus Off Interrupt.
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
0 : BOFFMSK_0
Bus Off interrupt disabled
0x1 : BOFFMSK_1
Bus Off interrupt enabled
End of enumeration elements list.
PSEG2 : This 3-bit field defines the length of Phase Buffer Segment 2 in the bit time
bits : 16 - 18 (3 bit)
access : read-write
PSEG1 : This 3-bit field defines the length of Phase Buffer Segment 1 in the bit time
bits : 19 - 21 (3 bit)
access : read-write
RJW : This 2-bit field defines the maximum number of time quanta One time quantum is equal to the Sclock period
bits : 22 - 23 (2 bit)
access : read-write
PRESDIV : This 8-bit field defines the ratio between the PE clock frequency and the Serial Clock (Sclock) frequency
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 56 CS Register
address_offset : 0x400 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 56 ID Register
address_offset : 0x404 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 56 WORD0 Register
address_offset : 0x408 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 56 WORD1 Register
address_offset : 0x40C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 57 CS Register
address_offset : 0x410 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 57 ID Register
address_offset : 0x414 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 57 WORD0 Register
address_offset : 0x418 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 57 WORD1 Register
address_offset : 0x41C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 58 CS Register
address_offset : 0x420 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 58 ID Register
address_offset : 0x424 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 58 WORD0 Register
address_offset : 0x428 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 58 WORD1 Register
address_offset : 0x42C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 59 CS Register
address_offset : 0x430 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 59 ID Register
address_offset : 0x434 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 59 WORD0 Register
address_offset : 0x438 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 59 WORD1 Register
address_offset : 0x43C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
CRC Register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
TXCRC : This field indicates the CRC value of the last message transmitted
bits : 0 - 14 (15 bit)
access : read-only
MBCRC : This field indicates the number of the Mailbox corresponding to the value in TXCRC field.
bits : 16 - 22 (7 bit)
access : read-only
Message Buffer 60 CS Register
address_offset : 0x440 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 60 ID Register
address_offset : 0x444 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x4454 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 60 WORD0 Register
address_offset : 0x448 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 60 WORD1 Register
address_offset : 0x44C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 61 CS Register
address_offset : 0x450 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 61 ID Register
address_offset : 0x454 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 61 WORD0 Register
address_offset : 0x458 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 61 WORD1 Register
address_offset : 0x45C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 62 CS Register
address_offset : 0x460 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 62 ID Register
address_offset : 0x464 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 62 WORD0 Register
address_offset : 0x468 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 62 WORD1 Register
address_offset : 0x46C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 63 CS Register
address_offset : 0x470 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 63 ID Register
address_offset : 0x474 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 63 WORD0 Register
address_offset : 0x478 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 63 WORD1 Register
address_offset : 0x47C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Rx FIFO Global Mask Register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FGM : These bits mask the ID Filter Table elements bits in a perfect alignment
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : FGM_0
The corresponding bit in the filter is "don't care"
0x1 : FGM_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Rx FIFO Information Register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
IDHIT : This 9-bit field indicates which Identifier Acceptance Filter (see Rx FIFO Structure) was hit by the received message that is in the output of the Rx FIFO
bits : 0 - 8 (9 bit)
access : read-only
Rx Individual Mask Registers
address_offset : 0x4CF0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Rx Individual Mask Registers
address_offset : 0x5590 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Debug 1 register
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CFSM : CAN Finite State Machine
bits : 0 - 5 (6 bit)
access : read-only
CBN : CAN Bit Number
bits : 24 - 28 (5 bit)
access : read-only
Debug 2 register
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RMP : Rx Matching Pointer
bits : 0 - 6 (7 bit)
access : read-only
MPP : Matching Process in Progress
bits : 7 - 7 (1 bit)
access : read-only
Enumeration:
0 : MPP_0
No matching process ongoing.
0x1 : MPP_1
Matching process is in progress.
End of enumeration elements list.
TAP : Tx Arbitration Pointer
bits : 8 - 14 (7 bit)
access : read-only
APP : Arbitration Process in Progress
bits : 15 - 15 (1 bit)
access : read-only
Enumeration:
0 : APP_0
No matching process ongoing.
0x1 : APP_1
Matching process is in progress.
End of enumeration elements list.
Rx Individual Mask Registers
address_offset : 0x5E34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Rx Individual Mask Registers
address_offset : 0x66DC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Rx Individual Mask Registers
address_offset : 0x6F88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Rx Individual Mask Registers
address_offset : 0x7838 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Free Running Timer Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIMER : TIMER
bits : 0 - 15 (16 bit)
access : read-write
Message Buffer 0 CS Register
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x80EC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 0 ID Register
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 0 WORD0 Register
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x89A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 0 WORD1 Register
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 1 CS Register
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x9260 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 1 ID Register
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 1 WORD0 Register
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0x9B20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 1 WORD1 Register
address_offset : 0x9C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Glitch Filter Width Registers
address_offset : 0x9E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GFWR : It determines the Glitch Filter Width
bits : 0 - 7 (8 bit)
access : read-write
Message Buffer 2 CS Register
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0xA3E4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 2 ID Register
address_offset : 0xA4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 2 WORD0 Register
address_offset : 0xA8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 2 WORD1 Register
address_offset : 0xAC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0xACAC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 3 CS Register
address_offset : 0xB0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 3 ID Register
address_offset : 0xB4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0xB578 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 3 WORD0 Register
address_offset : 0xB8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 3 WORD1 Register
address_offset : 0xBC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0xBE48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 4 CS Register
address_offset : 0xC0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 4 ID Register
address_offset : 0xC4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0xC71C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 4 WORD0 Register
address_offset : 0xC8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 4 WORD1 Register
address_offset : 0xCC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0xCFF4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 5 CS Register
address_offset : 0xD0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Message Buffer 5 ID Register
address_offset : 0xD4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 5 WORD0 Register
address_offset : 0xD8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0xD8D0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 5 WORD1 Register
address_offset : 0xDC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 6 CS Register
address_offset : 0xE0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0xE1B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 6 ID Register
address_offset : 0xE4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 6 WORD0 Register
address_offset : 0xE8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0xEA94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 6 WORD1 Register
address_offset : 0xEC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 7 CS Register
address_offset : 0xF0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIME_STAMP : Free-Running Counter Time stamp. This 16-bit field is a copy of the Free-Running Timer, captured for Tx and Rx frames at the time when the beginning of the Identifier field appears on the CAN bus.
bits : 0 - 15 (16 bit)
access : read-write
DLC : Length of the data to be stored/transmitted.
bits : 16 - 19 (4 bit)
access : read-write
RTR : Remote Transmission Request. One/zero for remote/data frame.
bits : 20 - 20 (1 bit)
access : read-write
IDE : ID Extended. One/zero for extended/standard format frame.
bits : 21 - 21 (1 bit)
access : read-write
SRR : Substitute Remote Request. Contains a fixed recessive bit.
bits : 22 - 22 (1 bit)
access : read-write
CODE : Reserved
bits : 24 - 27 (4 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0xF37C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
Message Buffer 7 ID Register
address_offset : 0xF4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EXT : Contains extended (LOW word) identifier of message buffer.
bits : 0 - 17 (18 bit)
access : read-write
STD : Contains standard/extended (HIGH word) identifier of message buffer.
bits : 18 - 28 (11 bit)
access : read-write
PRIO : Local priority. This 3-bit fieldis only used when LPRIO_EN bit is set in MCR and it only makes sense for Tx buffers. These bits are not transmitted. They are appended to the regular ID to define the transmission priority.
bits : 29 - 31 (3 bit)
access : read-write
Message Buffer 7 WORD0 Register
address_offset : 0xF8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_3 : Data byte 3 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_2 : Data byte 2 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_1 : Data byte 1 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_0 : Data byte 0 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Message Buffer 7 WORD1 Register
address_offset : 0xFC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA_BYTE_7 : Data byte 7 of Rx/Tx frame.
bits : 0 - 7 (8 bit)
access : read-write
DATA_BYTE_6 : Data byte 6 of Rx/Tx frame.
bits : 8 - 15 (8 bit)
access : read-write
DATA_BYTE_5 : Data byte 5 of Rx/Tx frame.
bits : 16 - 23 (8 bit)
access : read-write
DATA_BYTE_4 : Data byte 4 of Rx/Tx frame.
bits : 24 - 31 (8 bit)
access : read-write
Rx Individual Mask Registers
address_offset : 0xFC68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MI : These bits mask both Mailbox filter and Rx FIFO ID Filter Table element in distinct ways
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
0 : MI_0
the corresponding bit in the filter is "don't care"
0x1 : MI_1
The corresponding bit in the filter is checked
End of enumeration elements list.
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