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FREQME

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

Registers

FREQMECTRL_R

FREQMECTRL_W


FREQMECTRL_R

Frequency Measurement (in Read mode)
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
alternate_register : FREQME
reset_Mask : 0x0

FREQMECTRL_R FREQMECTRL_R read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RESULT MEASURE_IN_PROGRESS

RESULT : Result
bits : 0 - 30 (31 bit)
access : read-only

MEASURE_IN_PROGRESS : Measure in Progress
bits : 31 - 31 (1 bit)
access : read-only

Enumeration:

0 : CYCLE_DONE

Process complete. Measurement cycle is complete. The results are ready in the RESULT field.

0x1 : IN_PROGRESS

In Progress. Measurement cycle is in progress.

End of enumeration elements list.


FREQMECTRL_W

Freqeuncy Measurement (in Write mode)
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
alternate_register : FREQME
reset_Mask : 0x0

FREQMECTRL_W FREQMECTRL_W write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 REF_SCALE PULSE_MODE PULSE_POL MEASURE_IN_PROGRESS

REF_SCALE : Reference Clock Scaling Factor
bits : 0 - 4 (5 bit)
access : write-only

Enumeration:

0 : COUNTCYCLE_1

Count cycle = 2^0 = 1

0x1 : COUNTCYCLE_2

Count cycle = 2^1 = 2

0x2 : COUNTCYCLE_4

Count cycle = 2^4 = 4

0x1F : COUNTCYCLE_31

Count cycle = 2^31 = 2,147,483,648

End of enumeration elements list.

PULSE_MODE : Pulse Width Measurement mode select
bits : 8 - 8 (1 bit)
access : write-only

Enumeration:

0 : FREQ_ME_MODE

Frequency Measurement Mode. FREQMECTRL works in a Frequency Measurement mode. Once the measurement starts (real count start is aligned at rising edge arrival on reference clock), the target counter increments by the target clock until the reference counter running by the reference clock reaches the count end point selected by REF_SCALE.

0x1 : PULSE_ME_MODE

Pulse Width Measurement mode. FREQMECTRL works in a Pulse Width Measurement mode, measuring the high or low period of reference clock input selected by PULSE_POL. The target counter starts incrementing by the target clock once a corresponding trigger edge (rising edge for high period measurement and falling edge for low period) occurs.

End of enumeration elements list.

PULSE_POL : Pulse Polarity
bits : 9 - 9 (1 bit)
access : write-only

Enumeration:

0 : HIGH_PERIOD

High Period. High period of reference clock is measured in Pulse Width Measurement mode triggered by the rising edge on the reference clock input.

0x1 : LOW_PERIOD

Low Period. Low period of reference clock is measured in Pulse Width Measurement mode triggered by the falling edge on the reference clock input.

End of enumeration elements list.

MEASURE_IN_PROGRESS : Measure in Progress
bits : 31 - 31 (1 bit)
access : write-only

Enumeration:

0 : FORCE_TERMINATE

Force Terminate. Forces the termination of any measurement cycle currently in progress and resets RESULT or just resets RESULT if in idle.

0x1 : INITIATE_A_FREQME_CYCLE

Initiates Measurement Cycle. Initiates frequency or pulse width measurement process. Hardware clears the MEASURE_IN_PROGRESS bit when the measurement cycle completes. A new measurement starts if there is an active measurement in progress.

End of enumeration elements list.



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