Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x320 byte (0x0)
mem_usage : registers
protection : not protected
Interrupt Set Enable Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SETENA0 : DMA channel 0 transfer complete interrupt set-enable bit
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: DMA channel 0 transfer complete interrupt disabled
#1 : 1
write: enable DMA channel 0 transfer complete interrupt; read: DMA channel 0 transfer complete interrupt enabled
End of enumeration elements list.
SETENA1 : DMA channel 1 transfer complete interrupt set-enable bit
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: DMA channel 1 transfer complete interrupt disabled
#1 : 1
write: enable DMA channel 1 transfer complete interrupt; read: DMA channel 1 transfer complete interrupt enabled
End of enumeration elements list.
SETENA2 : DMA channel 2 transfer complete interrupt set-enable bit
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: DMA channel 2 transfer complete interrupt disabled
#1 : 1
write: enable DMA channel 2 transfer complete interrupt; read: DMA channel 2 transfer complete interrupt enabled
End of enumeration elements list.
SETENA3 : DMA channel 3 transfer complete interrupt set-enable bit
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: DMA channel 3 transfer complete interrupt disabled
#1 : 1
write: enable DMA channel 3 transfer complete interrupt; read: DMA channel 3 transfer complete interrupt enabled
End of enumeration elements list.
SETENA4 : Reserved iv 20 interrupt set-enable bit
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Reserved iv 20 interrupt disabled
#1 : 1
write: enable Reserved iv 20 interrupt; read: Reserved iv 20 interrupt enabled
End of enumeration elements list.
SETENA5 : Command complete and read collision interrupt set-enable bit
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Command complete and read collision interrupt disabled
#1 : 1
write: enable Command complete and read collision interrupt; read: Command complete and read collision interrupt enabled
End of enumeration elements list.
SETENA6 : Low-voltage detect, low-voltage warning interrupt set-enable bit
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Low-voltage detect, low-voltage warning interrupt disabled
#1 : 1
write: enable Low-voltage detect, low-voltage warning interrupt; read: Low-voltage detect, low-voltage warning interrupt enabled
End of enumeration elements list.
SETENA7 : Low Leakage Wakeup interrupt set-enable bit
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Low Leakage Wakeup interrupt disabled
#1 : 1
write: enable Low Leakage Wakeup interrupt; read: Low Leakage Wakeup interrupt enabled
End of enumeration elements list.
SETENA8 : Inter-Integrated Circuit 0 interrupt set-enable bit
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Inter-Integrated Circuit 0 interrupt disabled
#1 : 1
write: enable Inter-Integrated Circuit 0 interrupt; read: Inter-Integrated Circuit 0 interrupt enabled
End of enumeration elements list.
SETENA9 : Inter-Integrated Circuit 1 interrupt set-enable bit
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Inter-Integrated Circuit 1 interrupt disabled
#1 : 1
write: enable Inter-Integrated Circuit 1 interrupt; read: Inter-Integrated Circuit 1 interrupt enabled
End of enumeration elements list.
SETENA10 : Serial Peripheral Interface 0 interrupt set-enable bit
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Serial Peripheral Interface 0 interrupt disabled
#1 : 1
write: enable Serial Peripheral Interface 0 interrupt; read: Serial Peripheral Interface 0 interrupt enabled
End of enumeration elements list.
SETENA11 : Serial Peripheral Interface 1 interrupt set-enable bit
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Serial Peripheral Interface 1 interrupt disabled
#1 : 1
write: enable Serial Peripheral Interface 1 interrupt; read: Serial Peripheral Interface 1 interrupt enabled
End of enumeration elements list.
SETENA12 : LPUART0 status and error interrupt set-enable bit
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: LPUART0 status and error interrupt disabled
#1 : 1
write: enable LPUART0 status and error interrupt; read: LPUART0 status and error interrupt enabled
End of enumeration elements list.
SETENA13 : LPUART1 status and error interrupt set-enable bit
bits : 13 - 13 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: LPUART1 status and error interrupt disabled
#1 : 1
write: enable LPUART1 status and error interrupt; read: LPUART1 status and error interrupt enabled
End of enumeration elements list.
SETENA14 : UART2 or FLEXIO interrupt set-enable bit
bits : 14 - 14 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: UART2 or FLEXIO interrupt disabled
#1 : 1
write: enable UART2 or FLEXIO interrupt; read: UART2 or FLEXIO interrupt enabled
End of enumeration elements list.
SETENA15 : Analog-to-Digital Converter 0 interrupt set-enable bit
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Analog-to-Digital Converter 0 interrupt disabled
#1 : 1
write: enable Analog-to-Digital Converter 0 interrupt; read: Analog-to-Digital Converter 0 interrupt enabled
End of enumeration elements list.
SETENA16 : Comparator 0 interrupt set-enable bit
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Comparator 0 interrupt disabled
#1 : 1
write: enable Comparator 0 interrupt; read: Comparator 0 interrupt enabled
End of enumeration elements list.
SETENA17 : Timer/PWM module 0 interrupt set-enable bit
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Timer/PWM module 0 interrupt disabled
#1 : 1
write: enable Timer/PWM module 0 interrupt; read: Timer/PWM module 0 interrupt enabled
End of enumeration elements list.
SETENA18 : Timer/PWM module 1 interrupt set-enable bit
bits : 18 - 18 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Timer/PWM module 1 interrupt disabled
#1 : 1
write: enable Timer/PWM module 1 interrupt; read: Timer/PWM module 1 interrupt enabled
End of enumeration elements list.
SETENA19 : Timer/PWM module 2 interrupt set-enable bit
bits : 19 - 19 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Timer/PWM module 2 interrupt disabled
#1 : 1
write: enable Timer/PWM module 2 interrupt; read: Timer/PWM module 2 interrupt enabled
End of enumeration elements list.
SETENA20 : Real-time counter interrupt set-enable bit
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Real-time counter interrupt disabled
#1 : 1
write: enable Real-time counter interrupt; read: Real-time counter interrupt enabled
End of enumeration elements list.
SETENA21 : RTC seconds interrupt set-enable bit
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: RTC seconds interrupt disabled
#1 : 1
write: enable RTC seconds interrupt; read: RTC seconds interrupt enabled
End of enumeration elements list.
SETENA22 : Periodic Interrupt Timer interrupt set-enable bit
bits : 22 - 22 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Periodic Interrupt Timer interrupt disabled
#1 : 1
write: enable Periodic Interrupt Timer interrupt; read: Periodic Interrupt Timer interrupt enabled
End of enumeration elements list.
SETENA23 : Integrated interchip sound 0 interrupt set-enable bit
bits : 23 - 23 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Integrated interchip sound 0 interrupt disabled
#1 : 1
write: enable Integrated interchip sound 0 interrupt; read: Integrated interchip sound 0 interrupt enabled
End of enumeration elements list.
SETENA24 : Reserved iv 40 interrupt set-enable bit
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Reserved iv 40 interrupt disabled
#1 : 1
write: enable Reserved iv 40 interrupt; read: Reserved iv 40 interrupt enabled
End of enumeration elements list.
SETENA25 : Digital to Analog Converter interrupt set-enable bit
bits : 25 - 25 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Digital to Analog Converter interrupt disabled
#1 : 1
write: enable Digital to Analog Converter interrupt; read: Digital to Analog Converter interrupt enabled
End of enumeration elements list.
SETENA26 : Reserved iv 42 interrupt set-enable bit
bits : 26 - 26 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Reserved iv 42 interrupt disabled
#1 : 1
write: enable Reserved iv 42 interrupt; read: Reserved iv 42 interrupt enabled
End of enumeration elements list.
SETENA27 : Reserved iv 43 interrupt set-enable bit
bits : 27 - 27 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Reserved iv 43 interrupt disabled
#1 : 1
write: enable Reserved iv 43 interrupt; read: Reserved iv 43 interrupt enabled
End of enumeration elements list.
SETENA28 : Low-Power Timer interrupt set-enable bit
bits : 28 - 28 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Low-Power Timer interrupt disabled
#1 : 1
write: enable Low-Power Timer interrupt; read: Low-Power Timer interrupt enabled
End of enumeration elements list.
SETENA29 : LCD interrupt set-enable bit
bits : 29 - 29 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: LCD interrupt disabled
#1 : 1
write: enable LCD interrupt; read: LCD interrupt enabled
End of enumeration elements list.
SETENA30 : PORTA Pin detect interrupt set-enable bit
bits : 30 - 30 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: PORTA Pin detect interrupt disabled
#1 : 1
write: enable PORTA Pin detect interrupt; read: PORTA Pin detect interrupt enabled
End of enumeration elements list.
SETENA31 : PORTC and PORTD Pin detect interrupt set-enable bit
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: PORTC and PORTD Pin detect interrupt disabled
#1 : 1
write: enable PORTC and PORTD Pin detect interrupt; read: PORTC and PORTD Pin detect interrupt enabled
End of enumeration elements list.
Interrupt Set Pending Register
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SETPEND0 : DMA channel 0 transfer complete interrupt set-pending bit
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: DMA channel 0 transfer complete interrupt is not pending
#1 : 1
write: changes the DMA channel 0 transfer complete interrupt state to pending; read: DMA channel 0 transfer complete interrupt is pending
End of enumeration elements list.
SETPEND1 : DMA channel 1 transfer complete interrupt set-pending bit
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: DMA channel 1 transfer complete interrupt is not pending
#1 : 1
write: changes the DMA channel 1 transfer complete interrupt state to pending; read: DMA channel 1 transfer complete interrupt is pending
End of enumeration elements list.
SETPEND2 : DMA channel 2 transfer complete interrupt set-pending bit
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: DMA channel 2 transfer complete interrupt is not pending
#1 : 1
write: changes the DMA channel 2 transfer complete interrupt state to pending; read: DMA channel 2 transfer complete interrupt is pending
End of enumeration elements list.
SETPEND3 : DMA channel 3 transfer complete interrupt set-pending bit
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: DMA channel 3 transfer complete interrupt is not pending
#1 : 1
write: changes the DMA channel 3 transfer complete interrupt state to pending; read: DMA channel 3 transfer complete interrupt is pending
End of enumeration elements list.
SETPEND4 : Reserved iv 20 interrupt set-pending bit
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Reserved iv 20 interrupt is not pending
#1 : 1
write: changes the Reserved iv 20 interrupt state to pending; read: Reserved iv 20 interrupt is pending
End of enumeration elements list.
SETPEND5 : Command complete and read collision interrupt set-pending bit
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Command complete and read collision interrupt is not pending
#1 : 1
write: changes the Command complete and read collision interrupt state to pending; read: Command complete and read collision interrupt is pending
End of enumeration elements list.
SETPEND6 : Low-voltage detect, low-voltage warning interrupt set-pending bit
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Low-voltage detect, low-voltage warning interrupt is not pending
#1 : 1
write: changes the Low-voltage detect, low-voltage warning interrupt state to pending; read: Low-voltage detect, low-voltage warning interrupt is pending
End of enumeration elements list.
SETPEND7 : Low Leakage Wakeup interrupt set-pending bit
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Low Leakage Wakeup interrupt is not pending
#1 : 1
write: changes the Low Leakage Wakeup interrupt state to pending; read: Low Leakage Wakeup interrupt is pending
End of enumeration elements list.
SETPEND8 : Inter-Integrated Circuit 0 interrupt set-pending bit
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Inter-Integrated Circuit 0 interrupt is not pending
#1 : 1
write: changes the Inter-Integrated Circuit 0 interrupt state to pending; read: Inter-Integrated Circuit 0 interrupt is pending
End of enumeration elements list.
SETPEND9 : Inter-Integrated Circuit 1 interrupt set-pending bit
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Inter-Integrated Circuit 1 interrupt is not pending
#1 : 1
write: changes the Inter-Integrated Circuit 1 interrupt state to pending; read: Inter-Integrated Circuit 1 interrupt is pending
End of enumeration elements list.
SETPEND10 : Serial Peripheral Interface 0 interrupt set-pending bit
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Serial Peripheral Interface 0 interrupt is not pending
#1 : 1
write: changes the Serial Peripheral Interface 0 interrupt state to pending; read: Serial Peripheral Interface 0 interrupt is pending
End of enumeration elements list.
SETPEND11 : Serial Peripheral Interface 1 interrupt set-pending bit
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Serial Peripheral Interface 1 interrupt is not pending
#1 : 1
write: changes the Serial Peripheral Interface 1 interrupt state to pending; read: Serial Peripheral Interface 1 interrupt is pending
End of enumeration elements list.
SETPEND12 : LPUART0 status and error interrupt set-pending bit
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: LPUART0 status and error interrupt is not pending
#1 : 1
write: changes the LPUART0 status and error interrupt state to pending; read: LPUART0 status and error interrupt is pending
End of enumeration elements list.
SETPEND13 : LPUART1 status and error interrupt set-pending bit
bits : 13 - 13 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: LPUART1 status and error interrupt is not pending
#1 : 1
write: changes the LPUART1 status and error interrupt state to pending; read: LPUART1 status and error interrupt is pending
End of enumeration elements list.
SETPEND14 : UART2 or FLEXIO interrupt set-pending bit
bits : 14 - 14 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: UART2 or FLEXIO interrupt is not pending
#1 : 1
write: changes the UART2 or FLEXIO interrupt state to pending; read: UART2 or FLEXIO interrupt is pending
End of enumeration elements list.
SETPEND15 : Analog-to-Digital Converter 0 interrupt set-pending bit
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Analog-to-Digital Converter 0 interrupt is not pending
#1 : 1
write: changes the Analog-to-Digital Converter 0 interrupt state to pending; read: Analog-to-Digital Converter 0 interrupt is pending
End of enumeration elements list.
SETPEND16 : Comparator 0 interrupt set-pending bit
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Comparator 0 interrupt is not pending
#1 : 1
write: changes the Comparator 0 interrupt state to pending; read: Comparator 0 interrupt is pending
End of enumeration elements list.
SETPEND17 : Timer/PWM module 0 interrupt set-pending bit
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Timer/PWM module 0 interrupt is not pending
#1 : 1
write: changes the Timer/PWM module 0 interrupt state to pending; read: Timer/PWM module 0 interrupt is pending
End of enumeration elements list.
SETPEND18 : Timer/PWM module 1 interrupt set-pending bit
bits : 18 - 18 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Timer/PWM module 1 interrupt is not pending
#1 : 1
write: changes the Timer/PWM module 1 interrupt state to pending; read: Timer/PWM module 1 interrupt is pending
End of enumeration elements list.
SETPEND19 : Timer/PWM module 2 interrupt set-pending bit
bits : 19 - 19 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Timer/PWM module 2 interrupt is not pending
#1 : 1
write: changes the Timer/PWM module 2 interrupt state to pending; read: Timer/PWM module 2 interrupt is pending
End of enumeration elements list.
SETPEND20 : Real-time counter interrupt set-pending bit
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Real-time counter interrupt is not pending
#1 : 1
write: changes the Real-time counter interrupt state to pending; read: Real-time counter interrupt is pending
End of enumeration elements list.
SETPEND21 : RTC seconds interrupt set-pending bit
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: RTC seconds interrupt is not pending
#1 : 1
write: changes the RTC seconds interrupt state to pending; read: RTC seconds interrupt is pending
End of enumeration elements list.
SETPEND22 : Periodic Interrupt Timer interrupt set-pending bit
bits : 22 - 22 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Periodic Interrupt Timer interrupt is not pending
#1 : 1
write: changes the Periodic Interrupt Timer interrupt state to pending; read: Periodic Interrupt Timer interrupt is pending
End of enumeration elements list.
SETPEND23 : Integrated interchip sound 0 interrupt set-pending bit
bits : 23 - 23 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Integrated interchip sound 0 interrupt is not pending
#1 : 1
write: changes the Integrated interchip sound 0 interrupt state to pending; read: Integrated interchip sound 0 interrupt is pending
End of enumeration elements list.
SETPEND24 : Reserved iv 40 interrupt set-pending bit
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Reserved iv 40 interrupt is not pending
#1 : 1
write: changes the Reserved iv 40 interrupt state to pending; read: Reserved iv 40 interrupt is pending
End of enumeration elements list.
SETPEND25 : Digital to Analog Converter interrupt set-pending bit
bits : 25 - 25 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Digital to Analog Converter interrupt is not pending
#1 : 1
write: changes the Digital to Analog Converter interrupt state to pending; read: Digital to Analog Converter interrupt is pending
End of enumeration elements list.
SETPEND26 : Reserved iv 42 interrupt set-pending bit
bits : 26 - 26 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Reserved iv 42 interrupt is not pending
#1 : 1
write: changes the Reserved iv 42 interrupt state to pending; read: Reserved iv 42 interrupt is pending
End of enumeration elements list.
SETPEND27 : Reserved iv 43 interrupt set-pending bit
bits : 27 - 27 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Reserved iv 43 interrupt is not pending
#1 : 1
write: changes the Reserved iv 43 interrupt state to pending; read: Reserved iv 43 interrupt is pending
End of enumeration elements list.
SETPEND28 : Low-Power Timer interrupt set-pending bit
bits : 28 - 28 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Low-Power Timer interrupt is not pending
#1 : 1
write: changes the Low-Power Timer interrupt state to pending; read: Low-Power Timer interrupt is pending
End of enumeration elements list.
SETPEND29 : LCD interrupt set-pending bit
bits : 29 - 29 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: LCD interrupt is not pending
#1 : 1
write: changes the LCD interrupt state to pending; read: LCD interrupt is pending
End of enumeration elements list.
SETPEND30 : PORTA Pin detect interrupt set-pending bit
bits : 30 - 30 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: PORTA Pin detect interrupt is not pending
#1 : 1
write: changes the PORTA Pin detect interrupt state to pending; read: PORTA Pin detect interrupt is pending
End of enumeration elements list.
SETPEND31 : PORTC and PORTD Pin detect interrupt set-pending bit
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: PORTC and PORTD Pin detect interrupt is not pending
#1 : 1
write: changes the PORTC and PORTD Pin detect interrupt state to pending; read: PORTC and PORTD Pin detect interrupt is pending
End of enumeration elements list.
Interrupt Clear Pending Register
address_offset : 0x180 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRPEND0 : DMA channel 0 transfer complete interrupt clear-pending bit
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: DMA channel 0 transfer complete interrupt is not pending
#1 : 1
write: removes pending state from the DMA channel 0 transfer complete interrupt; read: DMA channel 0 transfer complete interrupt is pending
End of enumeration elements list.
CLRPEND1 : DMA channel 1 transfer complete interrupt clear-pending bit
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: DMA channel 1 transfer complete interrupt is not pending
#1 : 1
write: removes pending state from the DMA channel 1 transfer complete interrupt; read: DMA channel 1 transfer complete interrupt is pending
End of enumeration elements list.
CLRPEND2 : DMA channel 2 transfer complete interrupt clear-pending bit
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: DMA channel 2 transfer complete interrupt is not pending
#1 : 1
write: removes pending state from the DMA channel 2 transfer complete interrupt; read: DMA channel 2 transfer complete interrupt is pending
End of enumeration elements list.
CLRPEND3 : DMA channel 3 transfer complete interrupt clear-pending bit
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: DMA channel 3 transfer complete interrupt is not pending
#1 : 1
write: removes pending state from the DMA channel 3 transfer complete interrupt; read: DMA channel 3 transfer complete interrupt is pending
End of enumeration elements list.
CLRPEND4 : Reserved iv 20 interrupt clear-pending bit
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Reserved iv 20 interrupt is not pending
#1 : 1
write: removes pending state from the Reserved iv 20 interrupt; read: Reserved iv 20 interrupt is pending
End of enumeration elements list.
CLRPEND5 : Command complete and read collision interrupt clear-pending bit
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Command complete and read collision interrupt is not pending
#1 : 1
write: removes pending state from the Command complete and read collision interrupt; read: Command complete and read collision interrupt is pending
End of enumeration elements list.
CLRPEND6 : Low-voltage detect, low-voltage warning interrupt clear-pending bit
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Low-voltage detect, low-voltage warning interrupt is not pending
#1 : 1
write: removes pending state from the Low-voltage detect, low-voltage warning interrupt; read: Low-voltage detect, low-voltage warning interrupt is pending
End of enumeration elements list.
CLRPEND7 : Low Leakage Wakeup interrupt clear-pending bit
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Low Leakage Wakeup interrupt is not pending
#1 : 1
write: removes pending state from the Low Leakage Wakeup interrupt; read: Low Leakage Wakeup interrupt is pending
End of enumeration elements list.
CLRPEND8 : Inter-Integrated Circuit 0 interrupt clear-pending bit
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Inter-Integrated Circuit 0 interrupt is not pending
#1 : 1
write: removes pending state from the Inter-Integrated Circuit 0 interrupt; read: Inter-Integrated Circuit 0 interrupt is pending
End of enumeration elements list.
CLRPEND9 : Inter-Integrated Circuit 1 interrupt clear-pending bit
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Inter-Integrated Circuit 1 interrupt is not pending
#1 : 1
write: removes pending state from the Inter-Integrated Circuit 1 interrupt; read: Inter-Integrated Circuit 1 interrupt is pending
End of enumeration elements list.
CLRPEND10 : Serial Peripheral Interface 0 interrupt clear-pending bit
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Serial Peripheral Interface 0 interrupt is not pending
#1 : 1
write: removes pending state from the Serial Peripheral Interface 0 interrupt; read: Serial Peripheral Interface 0 interrupt is pending
End of enumeration elements list.
CLRPEND11 : Serial Peripheral Interface 1 interrupt clear-pending bit
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Serial Peripheral Interface 1 interrupt is not pending
#1 : 1
write: removes pending state from the Serial Peripheral Interface 1 interrupt; read: Serial Peripheral Interface 1 interrupt is pending
End of enumeration elements list.
CLRPEND12 : LPUART0 status and error interrupt clear-pending bit
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: LPUART0 status and error interrupt is not pending
#1 : 1
write: removes pending state from the LPUART0 status and error interrupt; read: LPUART0 status and error interrupt is pending
End of enumeration elements list.
CLRPEND13 : LPUART1 status and error interrupt clear-pending bit
bits : 13 - 13 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: LPUART1 status and error interrupt is not pending
#1 : 1
write: removes pending state from the LPUART1 status and error interrupt; read: LPUART1 status and error interrupt is pending
End of enumeration elements list.
CLRPEND14 : UART2 or FLEXIO interrupt clear-pending bit
bits : 14 - 14 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: UART2 or FLEXIO interrupt is not pending
#1 : 1
write: removes pending state from the UART2 or FLEXIO interrupt; read: UART2 or FLEXIO interrupt is pending
End of enumeration elements list.
CLRPEND15 : Analog-to-Digital Converter 0 interrupt clear-pending bit
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Analog-to-Digital Converter 0 interrupt is not pending
#1 : 1
write: removes pending state from the Analog-to-Digital Converter 0 interrupt; read: Analog-to-Digital Converter 0 interrupt is pending
End of enumeration elements list.
CLRPEND16 : Comparator 0 interrupt clear-pending bit
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Comparator 0 interrupt is not pending
#1 : 1
write: removes pending state from the Comparator 0 interrupt; read: Comparator 0 interrupt is pending
End of enumeration elements list.
CLRPEND17 : Timer/PWM module 0 interrupt clear-pending bit
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Timer/PWM module 0 interrupt is not pending
#1 : 1
write: removes pending state from the Timer/PWM module 0 interrupt; read: Timer/PWM module 0 interrupt is pending
End of enumeration elements list.
CLRPEND18 : Timer/PWM module 1 interrupt clear-pending bit
bits : 18 - 18 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Timer/PWM module 1 interrupt is not pending
#1 : 1
write: removes pending state from the Timer/PWM module 1 interrupt; read: Timer/PWM module 1 interrupt is pending
End of enumeration elements list.
CLRPEND19 : Timer/PWM module 2 interrupt clear-pending bit
bits : 19 - 19 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Timer/PWM module 2 interrupt is not pending
#1 : 1
write: removes pending state from the Timer/PWM module 2 interrupt; read: Timer/PWM module 2 interrupt is pending
End of enumeration elements list.
CLRPEND20 : Real-time counter interrupt clear-pending bit
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Real-time counter interrupt is not pending
#1 : 1
write: removes pending state from the Real-time counter interrupt; read: Real-time counter interrupt is pending
End of enumeration elements list.
CLRPEND21 : RTC seconds interrupt clear-pending bit
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: RTC seconds interrupt is not pending
#1 : 1
write: removes pending state from the RTC seconds interrupt; read: RTC seconds interrupt is pending
End of enumeration elements list.
CLRPEND22 : Periodic Interrupt Timer interrupt clear-pending bit
bits : 22 - 22 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Periodic Interrupt Timer interrupt is not pending
#1 : 1
write: removes pending state from the Periodic Interrupt Timer interrupt; read: Periodic Interrupt Timer interrupt is pending
End of enumeration elements list.
CLRPEND23 : Integrated interchip sound 0 interrupt clear-pending bit
bits : 23 - 23 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Integrated interchip sound 0 interrupt is not pending
#1 : 1
write: removes pending state from the Integrated interchip sound 0 interrupt; read: Integrated interchip sound 0 interrupt is pending
End of enumeration elements list.
CLRPEND24 : Reserved iv 40 interrupt clear-pending bit
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Reserved iv 40 interrupt is not pending
#1 : 1
write: removes pending state from the Reserved iv 40 interrupt; read: Reserved iv 40 interrupt is pending
End of enumeration elements list.
CLRPEND25 : Digital to Analog Converter interrupt clear-pending bit
bits : 25 - 25 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Digital to Analog Converter interrupt is not pending
#1 : 1
write: removes pending state from the Digital to Analog Converter interrupt; read: Digital to Analog Converter interrupt is pending
End of enumeration elements list.
CLRPEND26 : Reserved iv 42 interrupt clear-pending bit
bits : 26 - 26 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Reserved iv 42 interrupt is not pending
#1 : 1
write: removes pending state from the Reserved iv 42 interrupt; read: Reserved iv 42 interrupt is pending
End of enumeration elements list.
CLRPEND27 : Reserved iv 43 interrupt clear-pending bit
bits : 27 - 27 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Reserved iv 43 interrupt is not pending
#1 : 1
write: removes pending state from the Reserved iv 43 interrupt; read: Reserved iv 43 interrupt is pending
End of enumeration elements list.
CLRPEND28 : Low-Power Timer interrupt clear-pending bit
bits : 28 - 28 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Low-Power Timer interrupt is not pending
#1 : 1
write: removes pending state from the Low-Power Timer interrupt; read: Low-Power Timer interrupt is pending
End of enumeration elements list.
CLRPEND29 : LCD interrupt clear-pending bit
bits : 29 - 29 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: LCD interrupt is not pending
#1 : 1
write: removes pending state from the LCD interrupt; read: LCD interrupt is pending
End of enumeration elements list.
CLRPEND30 : PORTA Pin detect interrupt clear-pending bit
bits : 30 - 30 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: PORTA Pin detect interrupt is not pending
#1 : 1
write: removes pending state from the PORTA Pin detect interrupt; read: PORTA Pin detect interrupt is pending
End of enumeration elements list.
CLRPEND31 : PORTC and PORTD Pin detect interrupt clear-pending bit
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: PORTC and PORTD Pin detect interrupt is not pending
#1 : 1
write: removes pending state from the PORTC and PORTD Pin detect interrupt; read: PORTC and PORTD Pin detect interrupt is pending
End of enumeration elements list.
Interrupt Priority Register 0
address_offset : 0x300 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI_0 : Priority of the DMA channel 0 transfer complete interrupt
bits : 6 - 7 (2 bit)
access : read-write
PRI_1 : Priority of the DMA channel 1 transfer complete interrupt
bits : 14 - 15 (2 bit)
access : read-write
PRI_2 : Priority of the DMA channel 2 transfer complete interrupt
bits : 22 - 23 (2 bit)
access : read-write
PRI_3 : Priority of the DMA channel 3 transfer complete interrupt
bits : 30 - 31 (2 bit)
access : read-write
Interrupt Priority Register 1
address_offset : 0x304 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI_4 : Priority of the Reserved iv 20 interrupt
bits : 6 - 7 (2 bit)
access : read-write
PRI_5 : Priority of the Command complete and read collision interrupt
bits : 14 - 15 (2 bit)
access : read-write
PRI_6 : Priority of the Low-voltage detect, low-voltage warning interrupt
bits : 22 - 23 (2 bit)
access : read-write
PRI_7 : Priority of the Low Leakage Wakeup interrupt
bits : 30 - 31 (2 bit)
access : read-write
Interrupt Priority Register 2
address_offset : 0x308 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI_8 : Priority of the Inter-Integrated Circuit 0 interrupt
bits : 6 - 7 (2 bit)
access : read-write
PRI_9 : Priority of the Inter-Integrated Circuit 1 interrupt
bits : 14 - 15 (2 bit)
access : read-write
PRI_10 : Priority of the Serial Peripheral Interface 0 interrupt
bits : 22 - 23 (2 bit)
access : read-write
PRI_11 : Priority of the Serial Peripheral Interface 1 interrupt
bits : 30 - 31 (2 bit)
access : read-write
Interrupt Priority Register 3
address_offset : 0x30C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI_12 : Priority of the LPUART0 status and error interrupt
bits : 6 - 7 (2 bit)
access : read-write
PRI_13 : Priority of the LPUART1 status and error interrupt
bits : 14 - 15 (2 bit)
access : read-write
PRI_14 : Priority of the UART2 or FLEXIO interrupt
bits : 22 - 23 (2 bit)
access : read-write
PRI_15 : Priority of the Analog-to-Digital Converter 0 interrupt
bits : 30 - 31 (2 bit)
access : read-write
Interrupt Priority Register 4
address_offset : 0x310 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI_16 : Priority of the Comparator 0 interrupt
bits : 6 - 7 (2 bit)
access : read-write
PRI_17 : Priority of the Timer/PWM module 0 interrupt
bits : 14 - 15 (2 bit)
access : read-write
PRI_18 : Priority of the Timer/PWM module 1 interrupt
bits : 22 - 23 (2 bit)
access : read-write
PRI_19 : Priority of the Timer/PWM module 2 interrupt
bits : 30 - 31 (2 bit)
access : read-write
Interrupt Priority Register 5
address_offset : 0x314 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI_20 : Priority of the Real-time counter interrupt
bits : 6 - 7 (2 bit)
access : read-write
PRI_21 : Priority of the RTC seconds interrupt
bits : 14 - 15 (2 bit)
access : read-write
PRI_22 : Priority of the Periodic Interrupt Timer interrupt
bits : 22 - 23 (2 bit)
access : read-write
PRI_23 : Priority of the Integrated interchip sound 0 interrupt
bits : 30 - 31 (2 bit)
access : read-write
Interrupt Priority Register 6
address_offset : 0x318 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI_24 : Priority of the Reserved iv 40 interrupt
bits : 6 - 7 (2 bit)
access : read-write
PRI_25 : Priority of the Digital to Analog Converter interrupt
bits : 14 - 15 (2 bit)
access : read-write
PRI_26 : Priority of the Reserved iv 42 interrupt
bits : 22 - 23 (2 bit)
access : read-write
PRI_27 : Priority of the Reserved iv 43 interrupt
bits : 30 - 31 (2 bit)
access : read-write
Interrupt Priority Register 7
address_offset : 0x31C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRI_28 : Priority of the Low-Power Timer interrupt
bits : 6 - 7 (2 bit)
access : read-write
PRI_29 : Priority of the LCD interrupt
bits : 14 - 15 (2 bit)
access : read-write
PRI_30 : Priority of the PORTA Pin detect interrupt
bits : 22 - 23 (2 bit)
access : read-write
PRI_31 : Priority of the PORTC and PORTD Pin detect interrupt
bits : 30 - 31 (2 bit)
access : read-write
Interrupt Clear Enable Register
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRENA0 : DMA channel 0 transfer complete interrupt clear-enable bit
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: DMA channel 0 transfer complete interrupt disabled
#1 : 1
write: disable DMA channel 0 transfer complete interrupt; read: DMA channel 0 transfer complete interrupt enabled
End of enumeration elements list.
CLRENA1 : DMA channel 1 transfer complete interrupt clear-enable bit
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: DMA channel 1 transfer complete interrupt disabled
#1 : 1
write: disable DMA channel 1 transfer complete interrupt; read: DMA channel 1 transfer complete interrupt enabled
End of enumeration elements list.
CLRENA2 : DMA channel 2 transfer complete interrupt clear-enable bit
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: DMA channel 2 transfer complete interrupt disabled
#1 : 1
write: disable DMA channel 2 transfer complete interrupt; read: DMA channel 2 transfer complete interrupt enabled
End of enumeration elements list.
CLRENA3 : DMA channel 3 transfer complete interrupt clear-enable bit
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: DMA channel 3 transfer complete interrupt disabled
#1 : 1
write: disable DMA channel 3 transfer complete interrupt; read: DMA channel 3 transfer complete interrupt enabled
End of enumeration elements list.
CLRENA4 : Reserved iv 20 interrupt clear-enable bit
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Reserved iv 20 interrupt disabled
#1 : 1
write: disable Reserved iv 20 interrupt; read: Reserved iv 20 interrupt enabled
End of enumeration elements list.
CLRENA5 : Command complete and read collision interrupt clear-enable bit
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Command complete and read collision interrupt disabled
#1 : 1
write: disable Command complete and read collision interrupt; read: Command complete and read collision interrupt enabled
End of enumeration elements list.
CLRENA6 : Low-voltage detect, low-voltage warning interrupt clear-enable bit
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Low-voltage detect, low-voltage warning interrupt disabled
#1 : 1
write: disable Low-voltage detect, low-voltage warning interrupt; read: Low-voltage detect, low-voltage warning interrupt enabled
End of enumeration elements list.
CLRENA7 : Low Leakage Wakeup interrupt clear-enable bit
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Low Leakage Wakeup interrupt disabled
#1 : 1
write: disable Low Leakage Wakeup interrupt; read: Low Leakage Wakeup interrupt enabled
End of enumeration elements list.
CLRENA8 : Inter-Integrated Circuit 0 interrupt clear-enable bit
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Inter-Integrated Circuit 0 interrupt disabled
#1 : 1
write: disable Inter-Integrated Circuit 0 interrupt; read: Inter-Integrated Circuit 0 interrupt enabled
End of enumeration elements list.
CLRENA9 : Inter-Integrated Circuit 1 interrupt clear-enable bit
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Inter-Integrated Circuit 1 interrupt disabled
#1 : 1
write: disable Inter-Integrated Circuit 1 interrupt; read: Inter-Integrated Circuit 1 interrupt enabled
End of enumeration elements list.
CLRENA10 : Serial Peripheral Interface 0 interrupt clear-enable bit
bits : 10 - 10 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Serial Peripheral Interface 0 interrupt disabled
#1 : 1
write: disable Serial Peripheral Interface 0 interrupt; read: Serial Peripheral Interface 0 interrupt enabled
End of enumeration elements list.
CLRENA11 : Serial Peripheral Interface 1 interrupt clear-enable bit
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Serial Peripheral Interface 1 interrupt disabled
#1 : 1
write: disable Serial Peripheral Interface 1 interrupt; read: Serial Peripheral Interface 1 interrupt enabled
End of enumeration elements list.
CLRENA12 : LPUART0 status and error interrupt clear-enable bit
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: LPUART0 status and error interrupt disabled
#1 : 1
write: disable LPUART0 status and error interrupt; read: LPUART0 status and error interrupt enabled
End of enumeration elements list.
CLRENA13 : LPUART1 status and error interrupt clear-enable bit
bits : 13 - 13 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: LPUART1 status and error interrupt disabled
#1 : 1
write: disable LPUART1 status and error interrupt; read: LPUART1 status and error interrupt enabled
End of enumeration elements list.
CLRENA14 : UART2 or FLEXIO interrupt clear-enable bit
bits : 14 - 14 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: UART2 or FLEXIO interrupt disabled
#1 : 1
write: disable UART2 or FLEXIO interrupt; read: UART2 or FLEXIO interrupt enabled
End of enumeration elements list.
CLRENA15 : Analog-to-Digital Converter 0 interrupt clear-enable bit
bits : 15 - 15 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Analog-to-Digital Converter 0 interrupt disabled
#1 : 1
write: disable Analog-to-Digital Converter 0 interrupt; read: Analog-to-Digital Converter 0 interrupt enabled
End of enumeration elements list.
CLRENA16 : Comparator 0 interrupt clear-enable bit
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Comparator 0 interrupt disabled
#1 : 1
write: disable Comparator 0 interrupt; read: Comparator 0 interrupt enabled
End of enumeration elements list.
CLRENA17 : Timer/PWM module 0 interrupt clear-enable bit
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Timer/PWM module 0 interrupt disabled
#1 : 1
write: disable Timer/PWM module 0 interrupt; read: Timer/PWM module 0 interrupt enabled
End of enumeration elements list.
CLRENA18 : Timer/PWM module 1 interrupt clear-enable bit
bits : 18 - 18 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Timer/PWM module 1 interrupt disabled
#1 : 1
write: disable Timer/PWM module 1 interrupt; read: Timer/PWM module 1 interrupt enabled
End of enumeration elements list.
CLRENA19 : Timer/PWM module 2 interrupt clear-enable bit
bits : 19 - 19 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Timer/PWM module 2 interrupt disabled
#1 : 1
write: disable Timer/PWM module 2 interrupt; read: Timer/PWM module 2 interrupt enabled
End of enumeration elements list.
CLRENA20 : Real-time counter interrupt clear-enable bit
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Real-time counter interrupt disabled
#1 : 1
write: disable Real-time counter interrupt; read: Real-time counter interrupt enabled
End of enumeration elements list.
CLRENA21 : RTC seconds interrupt clear-enable bit
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: RTC seconds interrupt disabled
#1 : 1
write: disable RTC seconds interrupt; read: RTC seconds interrupt enabled
End of enumeration elements list.
CLRENA22 : Periodic Interrupt Timer interrupt clear-enable bit
bits : 22 - 22 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Periodic Interrupt Timer interrupt disabled
#1 : 1
write: disable Periodic Interrupt Timer interrupt; read: Periodic Interrupt Timer interrupt enabled
End of enumeration elements list.
CLRENA23 : Integrated interchip sound 0 interrupt clear-enable bit
bits : 23 - 23 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Integrated interchip sound 0 interrupt disabled
#1 : 1
write: disable Integrated interchip sound 0 interrupt; read: Integrated interchip sound 0 interrupt enabled
End of enumeration elements list.
CLRENA24 : Reserved iv 40 interrupt clear-enable bit
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Reserved iv 40 interrupt disabled
#1 : 1
write: disable Reserved iv 40 interrupt; read: Reserved iv 40 interrupt enabled
End of enumeration elements list.
CLRENA25 : Digital to Analog Converter interrupt clear-enable bit
bits : 25 - 25 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Digital to Analog Converter interrupt disabled
#1 : 1
write: disable Digital to Analog Converter interrupt; read: Digital to Analog Converter interrupt enabled
End of enumeration elements list.
CLRENA26 : Reserved iv 42 interrupt clear-enable bit
bits : 26 - 26 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Reserved iv 42 interrupt disabled
#1 : 1
write: disable Reserved iv 42 interrupt; read: Reserved iv 42 interrupt enabled
End of enumeration elements list.
CLRENA27 : Reserved iv 43 interrupt clear-enable bit
bits : 27 - 27 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Reserved iv 43 interrupt disabled
#1 : 1
write: disable Reserved iv 43 interrupt; read: Reserved iv 43 interrupt enabled
End of enumeration elements list.
CLRENA28 : Low-Power Timer interrupt clear-enable bit
bits : 28 - 28 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: Low-Power Timer interrupt disabled
#1 : 1
write: disable Low-Power Timer interrupt; read: Low-Power Timer interrupt enabled
End of enumeration elements list.
CLRENA29 : LCD interrupt clear-enable bit
bits : 29 - 29 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: LCD interrupt disabled
#1 : 1
write: disable LCD interrupt; read: LCD interrupt enabled
End of enumeration elements list.
CLRENA30 : PORTA Pin detect interrupt clear-enable bit
bits : 30 - 30 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: PORTA Pin detect interrupt disabled
#1 : 1
write: disable PORTA Pin detect interrupt; read: PORTA Pin detect interrupt enabled
End of enumeration elements list.
CLRENA31 : PORTC and PORTD Pin detect interrupt clear-enable bit
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
#0 : 0
write: no effect; read: PORTC and PORTD Pin detect interrupt disabled
#1 : 1
write: disable PORTC and PORTD Pin detect interrupt; read: PORTC and PORTD Pin detect interrupt enabled
End of enumeration elements list.
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