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NVIC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x320 byte (0x0)
mem_usage : registers
protection : not protected

Registers

ISER

ISPR

ICPR

IPR0

IPR1

IPR2

IPR3

IPR4

IPR5

IPR6

IPR7

ICER


ISER

Interrupt Set Enable Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ISER ISER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SETENA0 SETENA1 SETENA2 SETENA3 SETENA4 SETENA5 SETENA6 SETENA7 SETENA8 SETENA9 SETENA10 SETENA11 SETENA12 SETENA13 SETENA14 SETENA15 SETENA16 SETENA17 SETENA18 SETENA19 SETENA20 SETENA21 SETENA22 SETENA23 SETENA24 SETENA25 SETENA26 SETENA27 SETENA28 SETENA29 SETENA30 SETENA31

SETENA0 : INT_DMA0 interrupt set-enable bit
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: INT_DMA0 interrupt disabled

#1 : 1

write: enable INT_DMA0 interrupt; read: INT_DMA0 interrupt enabled

End of enumeration elements list.

SETENA1 : INT_DMA1 interrupt set-enable bit
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: INT_DMA1 interrupt disabled

#1 : 1

write: enable INT_DMA1 interrupt; read: INT_DMA1 interrupt enabled

End of enumeration elements list.

SETENA2 : INT_DMA2 interrupt set-enable bit
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: INT_DMA2 interrupt disabled

#1 : 1

write: enable INT_DMA2 interrupt; read: INT_DMA2 interrupt enabled

End of enumeration elements list.

SETENA3 : INT_DMA3 interrupt set-enable bit
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: INT_DMA3 interrupt disabled

#1 : 1

write: enable INT_DMA3 interrupt; read: INT_DMA3 interrupt enabled

End of enumeration elements list.

SETENA4 : Reserved iv 20 interrupt set-enable bit
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: Reserved iv 20 interrupt disabled

#1 : 1

write: enable Reserved iv 20 interrupt; read: Reserved iv 20 interrupt enabled

End of enumeration elements list.

SETENA5 : FTFA command complete and read collision interrupt set-enable bit
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: FTFA command complete and read collision interrupt disabled

#1 : 1

write: enable FTFA command complete and read collision interrupt; read: FTFA command complete and read collision interrupt enabled

End of enumeration elements list.

SETENA6 : low-voltage detect and low-voltage warning interrupt set-enable bit
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: low-voltage detect and low-voltage warning interrupt disabled

#1 : 1

write: enable low-voltage detect and low-voltage warning interrupt; read: low-voltage detect and low-voltage warning interrupt enabled

End of enumeration elements list.

SETENA7 : low leakage wakeup interrupt set-enable bit
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: low leakage wakeup interrupt disabled

#1 : 1

write: enable low leakage wakeup interrupt; read: low leakage wakeup interrupt enabled

End of enumeration elements list.

SETENA8 : inter-integrated circuit 0 interrupt set-enable bit
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: inter-integrated circuit 0 interrupt disabled

#1 : 1

write: enable inter-integrated circuit 0 interrupt; read: inter-integrated circuit 0 interrupt enabled

End of enumeration elements list.

SETENA9 : inter-integrated circuit 1 interrupt set-enable bit
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: inter-integrated circuit 1 interrupt disabled

#1 : 1

write: enable inter-integrated circuit 1 interrupt; read: inter-integrated circuit 1 interrupt enabled

End of enumeration elements list.

SETENA10 : serial peripheral interface 0 interrupt set-enable bit
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: serial peripheral interface 0 interrupt disabled

#1 : 1

write: enable serial peripheral interface 0 interrupt; read: serial peripheral interface 0 interrupt enabled

End of enumeration elements list.

SETENA11 : serial peripheral interface 1 interrupt set-enable bit
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: serial peripheral interface 1 interrupt disabled

#1 : 1

write: enable serial peripheral interface 1 interrupt; read: serial peripheral interface 1 interrupt enabled

End of enumeration elements list.

SETENA12 : UART0 status and error interrupt set-enable bit
bits : 12 - 12 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: UART0 status and error interrupt disabled

#1 : 1

write: enable UART0 status and error interrupt; read: UART0 status and error interrupt enabled

End of enumeration elements list.

SETENA13 : UART1 status and error interrupt set-enable bit
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: UART1 status and error interrupt disabled

#1 : 1

write: enable UART1 status and error interrupt; read: UART1 status and error interrupt enabled

End of enumeration elements list.

SETENA14 : UART2 status and error interrupt set-enable bit
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: UART2 status and error interrupt disabled

#1 : 1

write: enable UART2 status and error interrupt; read: UART2 status and error interrupt enabled

End of enumeration elements list.

SETENA15 : Analog-to-digital converter 0 interrupt set-enable bit
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: Analog-to-digital converter 0 interrupt disabled

#1 : 1

write: enable Analog-to-digital converter 0 interrupt; read: Analog-to-digital converter 0 interrupt enabled

End of enumeration elements list.

SETENA16 : Comparator 0 interrupt set-enable bit
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: Comparator 0 interrupt disabled

#1 : 1

write: enable Comparator 0 interrupt; read: Comparator 0 interrupt enabled

End of enumeration elements list.

SETENA17 : Timer PWM module 0 interrupt set-enable bit
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: Timer PWM module 0 interrupt disabled

#1 : 1

write: enable Timer PWM module 0 interrupt; read: Timer PWM module 0 interrupt enabled

End of enumeration elements list.

SETENA18 : Timer PWM module 1 interrupt set-enable bit
bits : 18 - 18 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: Timer PWM module 1 interrupt disabled

#1 : 1

write: enable Timer PWM module 1 interrupt; read: Timer PWM module 1 interrupt enabled

End of enumeration elements list.

SETENA19 : Timer PWM module 2 interrupt set-enable bit
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: Timer PWM module 2 interrupt disabled

#1 : 1

write: enable Timer PWM module 2 interrupt; read: Timer PWM module 2 interrupt enabled

End of enumeration elements list.

SETENA20 : real time clock alarm interrupt set-enable bit
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: real time clock alarm interrupt disabled

#1 : 1

write: enable real time clock alarm interrupt; read: real time clock alarm interrupt enabled

End of enumeration elements list.

SETENA21 : real time clock seconds interrupt set-enable bit
bits : 21 - 21 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: real time clock seconds interrupt disabled

#1 : 1

write: enable real time clock seconds interrupt; read: real time clock seconds interrupt enabled

End of enumeration elements list.

SETENA22 : periodic interrupt timer all channels interrupt set-enable bit
bits : 22 - 22 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: periodic interrupt timer all channels interrupt disabled

#1 : 1

write: enable periodic interrupt timer all channels interrupt; read: periodic interrupt timer all channels interrupt enabled

End of enumeration elements list.

SETENA23 : integrated interchip sound 0 interrupt set-enable bit
bits : 23 - 23 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: integrated interchip sound 0 interrupt disabled

#1 : 1

write: enable integrated interchip sound 0 interrupt; read: integrated interchip sound 0 interrupt enabled

End of enumeration elements list.

SETENA24 : Reserved iv 40 interrupt set-enable bit
bits : 24 - 24 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: Reserved iv 40 interrupt disabled

#1 : 1

write: enable Reserved iv 40 interrupt; read: Reserved iv 40 interrupt enabled

End of enumeration elements list.

SETENA25 : digital-to-analog converter 0 interrupt set-enable bit
bits : 25 - 25 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: digital-to-analog converter 0 interrupt disabled

#1 : 1

write: enable digital-to-analog converter 0 interrupt; read: digital-to-analog converter 0 interrupt enabled

End of enumeration elements list.

SETENA26 : touch sensing input interrupt set-enable bit
bits : 26 - 26 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: touch sensing input interrupt disabled

#1 : 1

write: enable touch sensing input interrupt; read: touch sensing input interrupt enabled

End of enumeration elements list.

SETENA27 : multipurpose clock generator interrupt set-enable bit
bits : 27 - 27 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: multipurpose clock generator interrupt disabled

#1 : 1

write: enable multipurpose clock generator interrupt; read: multipurpose clock generator interrupt enabled

End of enumeration elements list.

SETENA28 : Low-Power Timer interrupt set-enable bit
bits : 28 - 28 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: Low-Power Timer interrupt disabled

#1 : 1

write: enable Low-Power Timer interrupt; read: Low-Power Timer interrupt enabled

End of enumeration elements list.

SETENA29 : segment LCD interrupt set-enable bit
bits : 29 - 29 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: segment LCD interrupt disabled

#1 : 1

write: enable segment LCD interrupt; read: segment LCD interrupt enabled

End of enumeration elements list.

SETENA30 : PORTA pin detect interrupt set-enable bit
bits : 30 - 30 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: PORTA pin detect interrupt disabled

#1 : 1

write: enable PORTA pin detect interrupt; read: PORTA pin detect interrupt enabled

End of enumeration elements list.

SETENA31 : PORTC and PORTD pin detect interrupt set-enable bit
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: PORTC and PORTD pin detect interrupt disabled

#1 : 1

write: enable PORTC and PORTD pin detect interrupt; read: PORTC and PORTD pin detect interrupt enabled

End of enumeration elements list.


ISPR

Interrupt Set Pending Register
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ISPR ISPR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SETPEND0 SETPEND1 SETPEND2 SETPEND3 SETPEND4 SETPEND5 SETPEND6 SETPEND7 SETPEND8 SETPEND9 SETPEND10 SETPEND11 SETPEND12 SETPEND13 SETPEND14 SETPEND15 SETPEND16 SETPEND17 SETPEND18 SETPEND19 SETPEND20 SETPEND21 SETPEND22 SETPEND23 SETPEND24 SETPEND25 SETPEND26 SETPEND27 SETPEND28 SETPEND29 SETPEND30 SETPEND31

SETPEND0 : INT_DMA0 interrupt set-pending bit
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: INT_DMA0 interrupt is not pending

#1 : 1

write: changes the INT_DMA0 interrupt state to pending; read: INT_DMA0 interrupt is pending

End of enumeration elements list.

SETPEND1 : INT_DMA1 interrupt set-pending bit
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: INT_DMA1 interrupt is not pending

#1 : 1

write: changes the INT_DMA1 interrupt state to pending; read: INT_DMA1 interrupt is pending

End of enumeration elements list.

SETPEND2 : INT_DMA2 interrupt set-pending bit
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: INT_DMA2 interrupt is not pending

#1 : 1

write: changes the INT_DMA2 interrupt state to pending; read: INT_DMA2 interrupt is pending

End of enumeration elements list.

SETPEND3 : INT_DMA3 interrupt set-pending bit
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: INT_DMA3 interrupt is not pending

#1 : 1

write: changes the INT_DMA3 interrupt state to pending; read: INT_DMA3 interrupt is pending

End of enumeration elements list.

SETPEND4 : Reserved iv 20 interrupt set-pending bit
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: Reserved iv 20 interrupt is not pending

#1 : 1

write: changes the Reserved iv 20 interrupt state to pending; read: Reserved iv 20 interrupt is pending

End of enumeration elements list.

SETPEND5 : FTFA command complete and read collision interrupt set-pending bit
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: FTFA command complete and read collision interrupt is not pending

#1 : 1

write: changes the FTFA command complete and read collision interrupt state to pending; read: FTFA command complete and read collision interrupt is pending

End of enumeration elements list.

SETPEND6 : low-voltage detect and low-voltage warning interrupt set-pending bit
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: low-voltage detect and low-voltage warning interrupt is not pending

#1 : 1

write: changes the low-voltage detect and low-voltage warning interrupt state to pending; read: low-voltage detect and low-voltage warning interrupt is pending

End of enumeration elements list.

SETPEND7 : low leakage wakeup interrupt set-pending bit
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: low leakage wakeup interrupt is not pending

#1 : 1

write: changes the low leakage wakeup interrupt state to pending; read: low leakage wakeup interrupt is pending

End of enumeration elements list.

SETPEND8 : inter-integrated circuit 0 interrupt set-pending bit
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: inter-integrated circuit 0 interrupt is not pending

#1 : 1

write: changes the inter-integrated circuit 0 interrupt state to pending; read: inter-integrated circuit 0 interrupt is pending

End of enumeration elements list.

SETPEND9 : inter-integrated circuit 1 interrupt set-pending bit
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: inter-integrated circuit 1 interrupt is not pending

#1 : 1

write: changes the inter-integrated circuit 1 interrupt state to pending; read: inter-integrated circuit 1 interrupt is pending

End of enumeration elements list.

SETPEND10 : serial peripheral interface 0 interrupt set-pending bit
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: serial peripheral interface 0 interrupt is not pending

#1 : 1

write: changes the serial peripheral interface 0 interrupt state to pending; read: serial peripheral interface 0 interrupt is pending

End of enumeration elements list.

SETPEND11 : serial peripheral interface 1 interrupt set-pending bit
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: serial peripheral interface 1 interrupt is not pending

#1 : 1

write: changes the serial peripheral interface 1 interrupt state to pending; read: serial peripheral interface 1 interrupt is pending

End of enumeration elements list.

SETPEND12 : UART0 status and error interrupt set-pending bit
bits : 12 - 12 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: UART0 status and error interrupt is not pending

#1 : 1

write: changes the UART0 status and error interrupt state to pending; read: UART0 status and error interrupt is pending

End of enumeration elements list.

SETPEND13 : UART1 status and error interrupt set-pending bit
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: UART1 status and error interrupt is not pending

#1 : 1

write: changes the UART1 status and error interrupt state to pending; read: UART1 status and error interrupt is pending

End of enumeration elements list.

SETPEND14 : UART2 status and error interrupt set-pending bit
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: UART2 status and error interrupt is not pending

#1 : 1

write: changes the UART2 status and error interrupt state to pending; read: UART2 status and error interrupt is pending

End of enumeration elements list.

SETPEND15 : Analog-to-digital converter 0 interrupt set-pending bit
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: Analog-to-digital converter 0 interrupt is not pending

#1 : 1

write: changes the Analog-to-digital converter 0 interrupt state to pending; read: Analog-to-digital converter 0 interrupt is pending

End of enumeration elements list.

SETPEND16 : Comparator 0 interrupt set-pending bit
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: Comparator 0 interrupt is not pending

#1 : 1

write: changes the Comparator 0 interrupt state to pending; read: Comparator 0 interrupt is pending

End of enumeration elements list.

SETPEND17 : Timer PWM module 0 interrupt set-pending bit
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: Timer PWM module 0 interrupt is not pending

#1 : 1

write: changes the Timer PWM module 0 interrupt state to pending; read: Timer PWM module 0 interrupt is pending

End of enumeration elements list.

SETPEND18 : Timer PWM module 1 interrupt set-pending bit
bits : 18 - 18 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: Timer PWM module 1 interrupt is not pending

#1 : 1

write: changes the Timer PWM module 1 interrupt state to pending; read: Timer PWM module 1 interrupt is pending

End of enumeration elements list.

SETPEND19 : Timer PWM module 2 interrupt set-pending bit
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: Timer PWM module 2 interrupt is not pending

#1 : 1

write: changes the Timer PWM module 2 interrupt state to pending; read: Timer PWM module 2 interrupt is pending

End of enumeration elements list.

SETPEND20 : real time clock alarm interrupt set-pending bit
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: real time clock alarm interrupt is not pending

#1 : 1

write: changes the real time clock alarm interrupt state to pending; read: real time clock alarm interrupt is pending

End of enumeration elements list.

SETPEND21 : real time clock seconds interrupt set-pending bit
bits : 21 - 21 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: real time clock seconds interrupt is not pending

#1 : 1

write: changes the real time clock seconds interrupt state to pending; read: real time clock seconds interrupt is pending

End of enumeration elements list.

SETPEND22 : periodic interrupt timer all channels interrupt set-pending bit
bits : 22 - 22 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: periodic interrupt timer all channels interrupt is not pending

#1 : 1

write: changes the periodic interrupt timer all channels interrupt state to pending; read: periodic interrupt timer all channels interrupt is pending

End of enumeration elements list.

SETPEND23 : integrated interchip sound 0 interrupt set-pending bit
bits : 23 - 23 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: integrated interchip sound 0 interrupt is not pending

#1 : 1

write: changes the integrated interchip sound 0 interrupt state to pending; read: integrated interchip sound 0 interrupt is pending

End of enumeration elements list.

SETPEND24 : Reserved iv 40 interrupt set-pending bit
bits : 24 - 24 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: Reserved iv 40 interrupt is not pending

#1 : 1

write: changes the Reserved iv 40 interrupt state to pending; read: Reserved iv 40 interrupt is pending

End of enumeration elements list.

SETPEND25 : digital-to-analog converter 0 interrupt set-pending bit
bits : 25 - 25 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: digital-to-analog converter 0 interrupt is not pending

#1 : 1

write: changes the digital-to-analog converter 0 interrupt state to pending; read: digital-to-analog converter 0 interrupt is pending

End of enumeration elements list.

SETPEND26 : touch sensing input interrupt set-pending bit
bits : 26 - 26 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: touch sensing input interrupt is not pending

#1 : 1

write: changes the touch sensing input interrupt state to pending; read: touch sensing input interrupt is pending

End of enumeration elements list.

SETPEND27 : multipurpose clock generator interrupt set-pending bit
bits : 27 - 27 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: multipurpose clock generator interrupt is not pending

#1 : 1

write: changes the multipurpose clock generator interrupt state to pending; read: multipurpose clock generator interrupt is pending

End of enumeration elements list.

SETPEND28 : Low-Power Timer interrupt set-pending bit
bits : 28 - 28 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: Low-Power Timer interrupt is not pending

#1 : 1

write: changes the Low-Power Timer interrupt state to pending; read: Low-Power Timer interrupt is pending

End of enumeration elements list.

SETPEND29 : segment LCD interrupt set-pending bit
bits : 29 - 29 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: segment LCD interrupt is not pending

#1 : 1

write: changes the segment LCD interrupt state to pending; read: segment LCD interrupt is pending

End of enumeration elements list.

SETPEND30 : PORTA pin detect interrupt set-pending bit
bits : 30 - 30 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: PORTA pin detect interrupt is not pending

#1 : 1

write: changes the PORTA pin detect interrupt state to pending; read: PORTA pin detect interrupt is pending

End of enumeration elements list.

SETPEND31 : PORTC and PORTD pin detect interrupt set-pending bit
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: PORTC and PORTD pin detect interrupt is not pending

#1 : 1

write: changes the PORTC and PORTD pin detect interrupt state to pending; read: PORTC and PORTD pin detect interrupt is pending

End of enumeration elements list.


ICPR

Interrupt Clear Pending Register
address_offset : 0x180 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ICPR ICPR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLRPEND0 CLRPEND1 CLRPEND2 CLRPEND3 CLRPEND4 CLRPEND5 CLRPEND6 CLRPEND7 CLRPEND8 CLRPEND9 CLRPEND10 CLRPEND11 CLRPEND12 CLRPEND13 CLRPEND14 CLRPEND15 CLRPEND16 CLRPEND17 CLRPEND18 CLRPEND19 CLRPEND20 CLRPEND21 CLRPEND22 CLRPEND23 CLRPEND24 CLRPEND25 CLRPEND26 CLRPEND27 CLRPEND28 CLRPEND29 CLRPEND30 CLRPEND31

CLRPEND0 : INT_DMA0 interrupt clear-pending bit
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: INT_DMA0 interrupt is not pending

#1 : 1

write: removes pending state from the INT_DMA0 interrupt; read: INT_DMA0 interrupt is pending

End of enumeration elements list.

CLRPEND1 : INT_DMA1 interrupt clear-pending bit
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: INT_DMA1 interrupt is not pending

#1 : 1

write: removes pending state from the INT_DMA1 interrupt; read: INT_DMA1 interrupt is pending

End of enumeration elements list.

CLRPEND2 : INT_DMA2 interrupt clear-pending bit
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: INT_DMA2 interrupt is not pending

#1 : 1

write: removes pending state from the INT_DMA2 interrupt; read: INT_DMA2 interrupt is pending

End of enumeration elements list.

CLRPEND3 : INT_DMA3 interrupt clear-pending bit
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: INT_DMA3 interrupt is not pending

#1 : 1

write: removes pending state from the INT_DMA3 interrupt; read: INT_DMA3 interrupt is pending

End of enumeration elements list.

CLRPEND4 : Reserved iv 20 interrupt clear-pending bit
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: Reserved iv 20 interrupt is not pending

#1 : 1

write: removes pending state from the Reserved iv 20 interrupt; read: Reserved iv 20 interrupt is pending

End of enumeration elements list.

CLRPEND5 : FTFA command complete and read collision interrupt clear-pending bit
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: FTFA command complete and read collision interrupt is not pending

#1 : 1

write: removes pending state from the FTFA command complete and read collision interrupt; read: FTFA command complete and read collision interrupt is pending

End of enumeration elements list.

CLRPEND6 : low-voltage detect and low-voltage warning interrupt clear-pending bit
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: low-voltage detect and low-voltage warning interrupt is not pending

#1 : 1

write: removes pending state from the low-voltage detect and low-voltage warning interrupt; read: low-voltage detect and low-voltage warning interrupt is pending

End of enumeration elements list.

CLRPEND7 : low leakage wakeup interrupt clear-pending bit
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: low leakage wakeup interrupt is not pending

#1 : 1

write: removes pending state from the low leakage wakeup interrupt; read: low leakage wakeup interrupt is pending

End of enumeration elements list.

CLRPEND8 : inter-integrated circuit 0 interrupt clear-pending bit
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: inter-integrated circuit 0 interrupt is not pending

#1 : 1

write: removes pending state from the inter-integrated circuit 0 interrupt; read: inter-integrated circuit 0 interrupt is pending

End of enumeration elements list.

CLRPEND9 : inter-integrated circuit 1 interrupt clear-pending bit
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: inter-integrated circuit 1 interrupt is not pending

#1 : 1

write: removes pending state from the inter-integrated circuit 1 interrupt; read: inter-integrated circuit 1 interrupt is pending

End of enumeration elements list.

CLRPEND10 : serial peripheral interface 0 interrupt clear-pending bit
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: serial peripheral interface 0 interrupt is not pending

#1 : 1

write: removes pending state from the serial peripheral interface 0 interrupt; read: serial peripheral interface 0 interrupt is pending

End of enumeration elements list.

CLRPEND11 : serial peripheral interface 1 interrupt clear-pending bit
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: serial peripheral interface 1 interrupt is not pending

#1 : 1

write: removes pending state from the serial peripheral interface 1 interrupt; read: serial peripheral interface 1 interrupt is pending

End of enumeration elements list.

CLRPEND12 : UART0 status and error interrupt clear-pending bit
bits : 12 - 12 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: UART0 status and error interrupt is not pending

#1 : 1

write: removes pending state from the UART0 status and error interrupt; read: UART0 status and error interrupt is pending

End of enumeration elements list.

CLRPEND13 : UART1 status and error interrupt clear-pending bit
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: UART1 status and error interrupt is not pending

#1 : 1

write: removes pending state from the UART1 status and error interrupt; read: UART1 status and error interrupt is pending

End of enumeration elements list.

CLRPEND14 : UART2 status and error interrupt clear-pending bit
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: UART2 status and error interrupt is not pending

#1 : 1

write: removes pending state from the UART2 status and error interrupt; read: UART2 status and error interrupt is pending

End of enumeration elements list.

CLRPEND15 : Analog-to-digital converter 0 interrupt clear-pending bit
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: Analog-to-digital converter 0 interrupt is not pending

#1 : 1

write: removes pending state from the Analog-to-digital converter 0 interrupt; read: Analog-to-digital converter 0 interrupt is pending

End of enumeration elements list.

CLRPEND16 : Comparator 0 interrupt clear-pending bit
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: Comparator 0 interrupt is not pending

#1 : 1

write: removes pending state from the Comparator 0 interrupt; read: Comparator 0 interrupt is pending

End of enumeration elements list.

CLRPEND17 : Timer PWM module 0 interrupt clear-pending bit
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: Timer PWM module 0 interrupt is not pending

#1 : 1

write: removes pending state from the Timer PWM module 0 interrupt; read: Timer PWM module 0 interrupt is pending

End of enumeration elements list.

CLRPEND18 : Timer PWM module 1 interrupt clear-pending bit
bits : 18 - 18 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: Timer PWM module 1 interrupt is not pending

#1 : 1

write: removes pending state from the Timer PWM module 1 interrupt; read: Timer PWM module 1 interrupt is pending

End of enumeration elements list.

CLRPEND19 : Timer PWM module 2 interrupt clear-pending bit
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: Timer PWM module 2 interrupt is not pending

#1 : 1

write: removes pending state from the Timer PWM module 2 interrupt; read: Timer PWM module 2 interrupt is pending

End of enumeration elements list.

CLRPEND20 : real time clock alarm interrupt clear-pending bit
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: real time clock alarm interrupt is not pending

#1 : 1

write: removes pending state from the real time clock alarm interrupt; read: real time clock alarm interrupt is pending

End of enumeration elements list.

CLRPEND21 : real time clock seconds interrupt clear-pending bit
bits : 21 - 21 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: real time clock seconds interrupt is not pending

#1 : 1

write: removes pending state from the real time clock seconds interrupt; read: real time clock seconds interrupt is pending

End of enumeration elements list.

CLRPEND22 : periodic interrupt timer all channels interrupt clear-pending bit
bits : 22 - 22 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: periodic interrupt timer all channels interrupt is not pending

#1 : 1

write: removes pending state from the periodic interrupt timer all channels interrupt; read: periodic interrupt timer all channels interrupt is pending

End of enumeration elements list.

CLRPEND23 : integrated interchip sound 0 interrupt clear-pending bit
bits : 23 - 23 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: integrated interchip sound 0 interrupt is not pending

#1 : 1

write: removes pending state from the integrated interchip sound 0 interrupt; read: integrated interchip sound 0 interrupt is pending

End of enumeration elements list.

CLRPEND24 : Reserved iv 40 interrupt clear-pending bit
bits : 24 - 24 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: Reserved iv 40 interrupt is not pending

#1 : 1

write: removes pending state from the Reserved iv 40 interrupt; read: Reserved iv 40 interrupt is pending

End of enumeration elements list.

CLRPEND25 : digital-to-analog converter 0 interrupt clear-pending bit
bits : 25 - 25 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: digital-to-analog converter 0 interrupt is not pending

#1 : 1

write: removes pending state from the digital-to-analog converter 0 interrupt; read: digital-to-analog converter 0 interrupt is pending

End of enumeration elements list.

CLRPEND26 : touch sensing input interrupt clear-pending bit
bits : 26 - 26 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: touch sensing input interrupt is not pending

#1 : 1

write: removes pending state from the touch sensing input interrupt; read: touch sensing input interrupt is pending

End of enumeration elements list.

CLRPEND27 : multipurpose clock generator interrupt clear-pending bit
bits : 27 - 27 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: multipurpose clock generator interrupt is not pending

#1 : 1

write: removes pending state from the multipurpose clock generator interrupt; read: multipurpose clock generator interrupt is pending

End of enumeration elements list.

CLRPEND28 : Low-Power Timer interrupt clear-pending bit
bits : 28 - 28 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: Low-Power Timer interrupt is not pending

#1 : 1

write: removes pending state from the Low-Power Timer interrupt; read: Low-Power Timer interrupt is pending

End of enumeration elements list.

CLRPEND29 : segment LCD interrupt clear-pending bit
bits : 29 - 29 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: segment LCD interrupt is not pending

#1 : 1

write: removes pending state from the segment LCD interrupt; read: segment LCD interrupt is pending

End of enumeration elements list.

CLRPEND30 : PORTA pin detect interrupt clear-pending bit
bits : 30 - 30 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: PORTA pin detect interrupt is not pending

#1 : 1

write: removes pending state from the PORTA pin detect interrupt; read: PORTA pin detect interrupt is pending

End of enumeration elements list.

CLRPEND31 : PORTC and PORTD pin detect interrupt clear-pending bit
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: PORTC and PORTD pin detect interrupt is not pending

#1 : 1

write: removes pending state from the PORTC and PORTD pin detect interrupt; read: PORTC and PORTD pin detect interrupt is pending

End of enumeration elements list.


IPR0

Interrupt Priority Register 0
address_offset : 0x300 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPR0 IPR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_0 PRI_1 PRI_2 PRI_3

PRI_0 : Priority of the INT_DMA0 interrupt
bits : 0 - 7 (8 bit)
access : read-write

PRI_1 : Priority of the INT_DMA1 interrupt
bits : 8 - 15 (8 bit)
access : read-write

PRI_2 : Priority of the INT_DMA2 interrupt
bits : 16 - 23 (8 bit)
access : read-write

PRI_3 : Priority of the INT_DMA3 interrupt
bits : 24 - 31 (8 bit)
access : read-write


IPR1

Interrupt Priority Register 1
address_offset : 0x304 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPR1 IPR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_4 PRI_5 PRI_6 PRI_7

PRI_4 : Priority of the Reserved iv 20 interrupt
bits : 0 - 7 (8 bit)
access : read-write

PRI_5 : Priority of the FTFA command complete and read collision interrupt
bits : 8 - 15 (8 bit)
access : read-write

PRI_6 : Priority of the low-voltage detect and low-voltage warning interrupt
bits : 16 - 23 (8 bit)
access : read-write

PRI_7 : Priority of the low leakage wakeup interrupt
bits : 24 - 31 (8 bit)
access : read-write


IPR2

Interrupt Priority Register 2
address_offset : 0x308 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPR2 IPR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_8 PRI_9 PRI_10 PRI_11

PRI_8 : Priority of the inter-integrated circuit 0 interrupt
bits : 0 - 7 (8 bit)
access : read-write

PRI_9 : Priority of the inter-integrated circuit 1 interrupt
bits : 8 - 15 (8 bit)
access : read-write

PRI_10 : Priority of the serial peripheral interface 0 interrupt
bits : 16 - 23 (8 bit)
access : read-write

PRI_11 : Priority of the serial peripheral interface 1 interrupt
bits : 24 - 31 (8 bit)
access : read-write


IPR3

Interrupt Priority Register 3
address_offset : 0x30C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPR3 IPR3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_12 PRI_13 PRI_14 PRI_15

PRI_12 : Priority of the UART0 status and error interrupt
bits : 0 - 7 (8 bit)
access : read-write

PRI_13 : Priority of the UART1 status and error interrupt
bits : 8 - 15 (8 bit)
access : read-write

PRI_14 : Priority of the UART2 status and error interrupt
bits : 16 - 23 (8 bit)
access : read-write

PRI_15 : Priority of the Analog-to-digital converter 0 interrupt
bits : 24 - 31 (8 bit)
access : read-write


IPR4

Interrupt Priority Register 4
address_offset : 0x310 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPR4 IPR4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_16 PRI_17 PRI_18 PRI_19

PRI_16 : Priority of the Comparator 0 interrupt
bits : 0 - 7 (8 bit)
access : read-write

PRI_17 : Priority of the Timer PWM module 0 interrupt
bits : 8 - 15 (8 bit)
access : read-write

PRI_18 : Priority of the Timer PWM module 1 interrupt
bits : 16 - 23 (8 bit)
access : read-write

PRI_19 : Priority of the Timer PWM module 2 interrupt
bits : 24 - 31 (8 bit)
access : read-write


IPR5

Interrupt Priority Register 5
address_offset : 0x314 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPR5 IPR5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_20 PRI_21 PRI_22 PRI_23

PRI_20 : Priority of the real time clock alarm interrupt
bits : 0 - 7 (8 bit)
access : read-write

PRI_21 : Priority of the real time clock seconds interrupt
bits : 8 - 15 (8 bit)
access : read-write

PRI_22 : Priority of the periodic interrupt timer all channels interrupt
bits : 16 - 23 (8 bit)
access : read-write

PRI_23 : Priority of the integrated interchip sound 0 interrupt
bits : 24 - 31 (8 bit)
access : read-write


IPR6

Interrupt Priority Register 6
address_offset : 0x318 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPR6 IPR6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_24 PRI_25 PRI_26 PRI_27

PRI_24 : Priority of the Reserved iv 40 interrupt
bits : 0 - 7 (8 bit)
access : read-write

PRI_25 : Priority of the digital-to-analog converter 0 interrupt
bits : 8 - 15 (8 bit)
access : read-write

PRI_26 : Priority of the touch sensing input interrupt
bits : 16 - 23 (8 bit)
access : read-write

PRI_27 : Priority of the multipurpose clock generator interrupt
bits : 24 - 31 (8 bit)
access : read-write


IPR7

Interrupt Priority Register 7
address_offset : 0x31C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IPR7 IPR7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_28 PRI_29 PRI_30 PRI_31

PRI_28 : Priority of the Low-Power Timer interrupt
bits : 0 - 7 (8 bit)
access : read-write

PRI_29 : Priority of the segment LCD interrupt
bits : 8 - 15 (8 bit)
access : read-write

PRI_30 : Priority of the PORTA pin detect interrupt
bits : 16 - 23 (8 bit)
access : read-write

PRI_31 : Priority of the PORTC and PORTD pin detect interrupt
bits : 24 - 31 (8 bit)
access : read-write


ICER

Interrupt Clear Enable Register
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ICER ICER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLRENA0 CLRENA1 CLRENA2 CLRENA3 CLRENA4 CLRENA5 CLRENA6 CLRENA7 CLRENA8 CLRENA9 CLRENA10 CLRENA11 CLRENA12 CLRENA13 CLRENA14 CLRENA15 CLRENA16 CLRENA17 CLRENA18 CLRENA19 CLRENA20 CLRENA21 CLRENA22 CLRENA23 CLRENA24 CLRENA25 CLRENA26 CLRENA27 CLRENA28 CLRENA29 CLRENA30 CLRENA31

CLRENA0 : INT_DMA0 interrupt clear-enable bit
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: INT_DMA0 interrupt disabled

#1 : 1

write: disable INT_DMA0 interrupt; read: INT_DMA0 interrupt enabled

End of enumeration elements list.

CLRENA1 : INT_DMA1 interrupt clear-enable bit
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: INT_DMA1 interrupt disabled

#1 : 1

write: disable INT_DMA1 interrupt; read: INT_DMA1 interrupt enabled

End of enumeration elements list.

CLRENA2 : INT_DMA2 interrupt clear-enable bit
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: INT_DMA2 interrupt disabled

#1 : 1

write: disable INT_DMA2 interrupt; read: INT_DMA2 interrupt enabled

End of enumeration elements list.

CLRENA3 : INT_DMA3 interrupt clear-enable bit
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: INT_DMA3 interrupt disabled

#1 : 1

write: disable INT_DMA3 interrupt; read: INT_DMA3 interrupt enabled

End of enumeration elements list.

CLRENA4 : Reserved iv 20 interrupt clear-enable bit
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: Reserved iv 20 interrupt disabled

#1 : 1

write: disable Reserved iv 20 interrupt; read: Reserved iv 20 interrupt enabled

End of enumeration elements list.

CLRENA5 : FTFA command complete and read collision interrupt clear-enable bit
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: FTFA command complete and read collision interrupt disabled

#1 : 1

write: disable FTFA command complete and read collision interrupt; read: FTFA command complete and read collision interrupt enabled

End of enumeration elements list.

CLRENA6 : low-voltage detect and low-voltage warning interrupt clear-enable bit
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: low-voltage detect and low-voltage warning interrupt disabled

#1 : 1

write: disable low-voltage detect and low-voltage warning interrupt; read: low-voltage detect and low-voltage warning interrupt enabled

End of enumeration elements list.

CLRENA7 : low leakage wakeup interrupt clear-enable bit
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: low leakage wakeup interrupt disabled

#1 : 1

write: disable low leakage wakeup interrupt; read: low leakage wakeup interrupt enabled

End of enumeration elements list.

CLRENA8 : inter-integrated circuit 0 interrupt clear-enable bit
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: inter-integrated circuit 0 interrupt disabled

#1 : 1

write: disable inter-integrated circuit 0 interrupt; read: inter-integrated circuit 0 interrupt enabled

End of enumeration elements list.

CLRENA9 : inter-integrated circuit 1 interrupt clear-enable bit
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: inter-integrated circuit 1 interrupt disabled

#1 : 1

write: disable inter-integrated circuit 1 interrupt; read: inter-integrated circuit 1 interrupt enabled

End of enumeration elements list.

CLRENA10 : serial peripheral interface 0 interrupt clear-enable bit
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: serial peripheral interface 0 interrupt disabled

#1 : 1

write: disable serial peripheral interface 0 interrupt; read: serial peripheral interface 0 interrupt enabled

End of enumeration elements list.

CLRENA11 : serial peripheral interface 1 interrupt clear-enable bit
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: serial peripheral interface 1 interrupt disabled

#1 : 1

write: disable serial peripheral interface 1 interrupt; read: serial peripheral interface 1 interrupt enabled

End of enumeration elements list.

CLRENA12 : UART0 status and error interrupt clear-enable bit
bits : 12 - 12 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: UART0 status and error interrupt disabled

#1 : 1

write: disable UART0 status and error interrupt; read: UART0 status and error interrupt enabled

End of enumeration elements list.

CLRENA13 : UART1 status and error interrupt clear-enable bit
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: UART1 status and error interrupt disabled

#1 : 1

write: disable UART1 status and error interrupt; read: UART1 status and error interrupt enabled

End of enumeration elements list.

CLRENA14 : UART2 status and error interrupt clear-enable bit
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: UART2 status and error interrupt disabled

#1 : 1

write: disable UART2 status and error interrupt; read: UART2 status and error interrupt enabled

End of enumeration elements list.

CLRENA15 : Analog-to-digital converter 0 interrupt clear-enable bit
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: Analog-to-digital converter 0 interrupt disabled

#1 : 1

write: disable Analog-to-digital converter 0 interrupt; read: Analog-to-digital converter 0 interrupt enabled

End of enumeration elements list.

CLRENA16 : Comparator 0 interrupt clear-enable bit
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: Comparator 0 interrupt disabled

#1 : 1

write: disable Comparator 0 interrupt; read: Comparator 0 interrupt enabled

End of enumeration elements list.

CLRENA17 : Timer PWM module 0 interrupt clear-enable bit
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: Timer PWM module 0 interrupt disabled

#1 : 1

write: disable Timer PWM module 0 interrupt; read: Timer PWM module 0 interrupt enabled

End of enumeration elements list.

CLRENA18 : Timer PWM module 1 interrupt clear-enable bit
bits : 18 - 18 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: Timer PWM module 1 interrupt disabled

#1 : 1

write: disable Timer PWM module 1 interrupt; read: Timer PWM module 1 interrupt enabled

End of enumeration elements list.

CLRENA19 : Timer PWM module 2 interrupt clear-enable bit
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: Timer PWM module 2 interrupt disabled

#1 : 1

write: disable Timer PWM module 2 interrupt; read: Timer PWM module 2 interrupt enabled

End of enumeration elements list.

CLRENA20 : real time clock alarm interrupt clear-enable bit
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: real time clock alarm interrupt disabled

#1 : 1

write: disable real time clock alarm interrupt; read: real time clock alarm interrupt enabled

End of enumeration elements list.

CLRENA21 : real time clock seconds interrupt clear-enable bit
bits : 21 - 21 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: real time clock seconds interrupt disabled

#1 : 1

write: disable real time clock seconds interrupt; read: real time clock seconds interrupt enabled

End of enumeration elements list.

CLRENA22 : periodic interrupt timer all channels interrupt clear-enable bit
bits : 22 - 22 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: periodic interrupt timer all channels interrupt disabled

#1 : 1

write: disable periodic interrupt timer all channels interrupt; read: periodic interrupt timer all channels interrupt enabled

End of enumeration elements list.

CLRENA23 : integrated interchip sound 0 interrupt clear-enable bit
bits : 23 - 23 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: integrated interchip sound 0 interrupt disabled

#1 : 1

write: disable integrated interchip sound 0 interrupt; read: integrated interchip sound 0 interrupt enabled

End of enumeration elements list.

CLRENA24 : Reserved iv 40 interrupt clear-enable bit
bits : 24 - 24 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: Reserved iv 40 interrupt disabled

#1 : 1

write: disable Reserved iv 40 interrupt; read: Reserved iv 40 interrupt enabled

End of enumeration elements list.

CLRENA25 : digital-to-analog converter 0 interrupt clear-enable bit
bits : 25 - 25 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: digital-to-analog converter 0 interrupt disabled

#1 : 1

write: disable digital-to-analog converter 0 interrupt; read: digital-to-analog converter 0 interrupt enabled

End of enumeration elements list.

CLRENA26 : touch sensing input interrupt clear-enable bit
bits : 26 - 26 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: touch sensing input interrupt disabled

#1 : 1

write: disable touch sensing input interrupt; read: touch sensing input interrupt enabled

End of enumeration elements list.

CLRENA27 : multipurpose clock generator interrupt clear-enable bit
bits : 27 - 27 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: multipurpose clock generator interrupt disabled

#1 : 1

write: disable multipurpose clock generator interrupt; read: multipurpose clock generator interrupt enabled

End of enumeration elements list.

CLRENA28 : Low-Power Timer interrupt clear-enable bit
bits : 28 - 28 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: Low-Power Timer interrupt disabled

#1 : 1

write: disable Low-Power Timer interrupt; read: Low-Power Timer interrupt enabled

End of enumeration elements list.

CLRENA29 : segment LCD interrupt clear-enable bit
bits : 29 - 29 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: segment LCD interrupt disabled

#1 : 1

write: disable segment LCD interrupt; read: segment LCD interrupt enabled

End of enumeration elements list.

CLRENA30 : PORTA pin detect interrupt clear-enable bit
bits : 30 - 30 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: PORTA pin detect interrupt disabled

#1 : 1

write: disable PORTA pin detect interrupt; read: PORTA pin detect interrupt enabled

End of enumeration elements list.

CLRENA31 : PORTC and PORTD pin detect interrupt clear-enable bit
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

#0 : 0

write: no effect; read: PORTC and PORTD pin detect interrupt disabled

#1 : 1

write: disable PORTC and PORTD pin detect interrupt; read: PORTC and PORTD pin detect interrupt enabled

End of enumeration elements list.



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