\n
address_offset : 0x0 Bytes (0x0)
size : 0x1D byte (0x0)
mem_usage : registers
protection : not protected
Port Data Output Register
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PDO0 : Port Data Output
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Logic level 0 is driven on pin, provided pin is configured for general-purpose output.
#1 : 1
Logic level 1 is driven on pin, provided pin is configured for general-purpose output.
End of enumeration elements list.
PDO1 : Port Data Output
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Logic level 0 is driven on pin, provided pin is configured for general-purpose output.
#1 : 1
Logic level 1 is driven on pin, provided pin is configured for general-purpose output.
End of enumeration elements list.
PDO2 : Port Data Output
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Logic level 0 is driven on pin, provided pin is configured for general-purpose output.
#1 : 1
Logic level 1 is driven on pin, provided pin is configured for general-purpose output.
End of enumeration elements list.
PDO3 : Port Data Output
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Logic level 0 is driven on pin, provided pin is configured for general-purpose output.
#1 : 1
Logic level 1 is driven on pin, provided pin is configured for general-purpose output.
End of enumeration elements list.
PDO4 : Port Data Output
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
Logic level 0 is driven on pin, provided pin is configured for general-purpose output.
#1 : 1
Logic level 1 is driven on pin, provided pin is configured for general-purpose output.
End of enumeration elements list.
PDO5 : Port Data Output
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
Logic level 0 is driven on pin, provided pin is configured for general-purpose output.
#1 : 1
Logic level 1 is driven on pin, provided pin is configured for general-purpose output.
End of enumeration elements list.
PDO6 : Port Data Output
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
Logic level 0 is driven on pin, provided pin is configured for general-purpose output.
#1 : 1
Logic level 1 is driven on pin, provided pin is configured for general-purpose output.
End of enumeration elements list.
PDO7 : Port Data Output
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
Logic level 0 is driven on pin, provided pin is configured for general-purpose output.
#1 : 1
Logic level 1 is driven on pin, provided pin is configured for general-purpose output.
End of enumeration elements list.
Port Data Input Register
address_offset : 0x10 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PDI0 : Port Data Input
bits : 0 - 0 (1 bit)
access : read-only
Enumeration:
#0 : 0
Pin logic level is logic 0, or is not configured for use by digital function.
#1 : 1
Pin logic level is logic 1.
End of enumeration elements list.
PDI1 : Port Data Input
bits : 1 - 1 (1 bit)
access : read-only
Enumeration:
#0 : 0
Pin logic level is logic 0, or is not configured for use by digital function.
#1 : 1
Pin logic level is logic 1.
End of enumeration elements list.
PDI2 : Port Data Input
bits : 2 - 2 (1 bit)
access : read-only
Enumeration:
#0 : 0
Pin logic level is logic 0, or is not configured for use by digital function.
#1 : 1
Pin logic level is logic 1.
End of enumeration elements list.
PDI3 : Port Data Input
bits : 3 - 3 (1 bit)
access : read-only
Enumeration:
#0 : 0
Pin logic level is logic 0, or is not configured for use by digital function.
#1 : 1
Pin logic level is logic 1.
End of enumeration elements list.
PDI4 : Port Data Input
bits : 4 - 4 (1 bit)
access : read-only
Enumeration:
#0 : 0
Pin logic level is logic 0, or is not configured for use by digital function.
#1 : 1
Pin logic level is logic 1.
End of enumeration elements list.
PDI5 : Port Data Input
bits : 5 - 5 (1 bit)
access : read-only
Enumeration:
#0 : 0
Pin logic level is logic 0, or is not configured for use by digital function.
#1 : 1
Pin logic level is logic 1.
End of enumeration elements list.
PDI6 : Port Data Input
bits : 6 - 6 (1 bit)
access : read-only
Enumeration:
#0 : 0
Pin logic level is logic 0, or is not configured for use by digital function.
#1 : 1
Pin logic level is logic 1.
End of enumeration elements list.
PDI7 : Port Data Input
bits : 7 - 7 (1 bit)
access : read-only
Enumeration:
#0 : 0
Pin logic level is logic 0, or is not configured for use by digital function.
#1 : 1
Pin logic level is logic 1.
End of enumeration elements list.
Port Data Direction Register
address_offset : 0x14 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PDD0 : Port Data Direction
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Pin is configured as general-purpose input, for the GPIO function.
#1 : 1
Pin is configured as general-purpose output, for the GPIO function.
End of enumeration elements list.
PDD1 : Port Data Direction
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Pin is configured as general-purpose input, for the GPIO function.
#1 : 1
Pin is configured as general-purpose output, for the GPIO function.
End of enumeration elements list.
PDD2 : Port Data Direction
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Pin is configured as general-purpose input, for the GPIO function.
#1 : 1
Pin is configured as general-purpose output, for the GPIO function.
End of enumeration elements list.
PDD3 : Port Data Direction
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Pin is configured as general-purpose input, for the GPIO function.
#1 : 1
Pin is configured as general-purpose output, for the GPIO function.
End of enumeration elements list.
PDD4 : Port Data Direction
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
Pin is configured as general-purpose input, for the GPIO function.
#1 : 1
Pin is configured as general-purpose output, for the GPIO function.
End of enumeration elements list.
PDD5 : Port Data Direction
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
Pin is configured as general-purpose input, for the GPIO function.
#1 : 1
Pin is configured as general-purpose output, for the GPIO function.
End of enumeration elements list.
PDD6 : Port Data Direction
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
Pin is configured as general-purpose input, for the GPIO function.
#1 : 1
Pin is configured as general-purpose output, for the GPIO function.
End of enumeration elements list.
PDD7 : Port Data Direction
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
Pin is configured as general-purpose input, for the GPIO function.
#1 : 1
Pin is configured as general-purpose output, for the GPIO function.
End of enumeration elements list.
GPIO Attribute Checker Register
address_offset : 0x1C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ACB : Attribute Check Byte
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
#000 : 000
User nonsecure: Read + Write; User Secure: Read + Write; Privileged Secure: Read + Write
#001 : 001
User nonsecure: Read; User Secure: Read + Write; Privileged Secure: Read + Write
#010 : 010
User nonsecure: None; User Secure: Read + Write; Privileged Secure: Read + Write
#011 : 011
User nonsecure: Read; User Secure: Read; Privileged Secure: Read + Write
#100 : 100
User nonsecure: None; User Secure: Read; Privileged Secure: Read + Write
#101 : 101
User nonsecure: None; User Secure: None; Privileged Secure: Read + Write
#110 : 110
User nonsecure: None; User Secure: None; Privileged Secure: Read
#111 : 111
User nonsecure: None; User Secure: None; Privileged Secure: None
End of enumeration elements list.
ROB : Read-Only Byte
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
Writes to the ACB are allowed.
#1 : 1
Writes to the ACB are ignored.
End of enumeration elements list.
Port Set Output Register
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PTSO0 : Port Set Output
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Corresponding bit in PDORn does not change.
#1 : 1
Corresponding bit in PDORn is set to logic 1.
End of enumeration elements list.
PTSO1 : Port Set Output
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Corresponding bit in PDORn does not change.
#1 : 1
Corresponding bit in PDORn is set to logic 1.
End of enumeration elements list.
PTSO2 : Port Set Output
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Corresponding bit in PDORn does not change.
#1 : 1
Corresponding bit in PDORn is set to logic 1.
End of enumeration elements list.
PTSO3 : Port Set Output
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Corresponding bit in PDORn does not change.
#1 : 1
Corresponding bit in PDORn is set to logic 1.
End of enumeration elements list.
PTSO4 : Port Set Output
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
Corresponding bit in PDORn does not change.
#1 : 1
Corresponding bit in PDORn is set to logic 1.
End of enumeration elements list.
PTSO5 : Port Set Output
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
Corresponding bit in PDORn does not change.
#1 : 1
Corresponding bit in PDORn is set to logic 1.
End of enumeration elements list.
PTSO6 : Port Set Output
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
Corresponding bit in PDORn does not change.
#1 : 1
Corresponding bit in PDORn is set to logic 1.
End of enumeration elements list.
PTSO7 : Port Set Output
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
Corresponding bit in PDORn does not change.
#1 : 1
Corresponding bit in PDORn is set to logic 1.
End of enumeration elements list.
Port Clear Output Register
address_offset : 0x8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PTCO0 : Port Clear Output
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Corresponding bit in PDORn does not change.
#1 : 1
Corresponding bit in PDORn is cleared to logic 0.
End of enumeration elements list.
PTCO1 : Port Clear Output
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Corresponding bit in PDORn does not change.
#1 : 1
Corresponding bit in PDORn is cleared to logic 0.
End of enumeration elements list.
PTCO2 : Port Clear Output
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Corresponding bit in PDORn does not change.
#1 : 1
Corresponding bit in PDORn is cleared to logic 0.
End of enumeration elements list.
PTCO3 : Port Clear Output
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Corresponding bit in PDORn does not change.
#1 : 1
Corresponding bit in PDORn is cleared to logic 0.
End of enumeration elements list.
PTCO4 : Port Clear Output
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
Corresponding bit in PDORn does not change.
#1 : 1
Corresponding bit in PDORn is cleared to logic 0.
End of enumeration elements list.
PTCO5 : Port Clear Output
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
Corresponding bit in PDORn does not change.
#1 : 1
Corresponding bit in PDORn is cleared to logic 0.
End of enumeration elements list.
PTCO6 : Port Clear Output
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
Corresponding bit in PDORn does not change.
#1 : 1
Corresponding bit in PDORn is cleared to logic 0.
End of enumeration elements list.
PTCO7 : Port Clear Output
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
Corresponding bit in PDORn does not change.
#1 : 1
Corresponding bit in PDORn is cleared to logic 0.
End of enumeration elements list.
Port Toggle Output Register
address_offset : 0xC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PTTO0 : Port Toggle Output
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Corresponding bit in PDORn does not change.
#1 : 1
Corresponding bit in PDORn is set to the inverse of its existing logic state.
End of enumeration elements list.
PTTO1 : Port Toggle Output
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Corresponding bit in PDORn does not change.
#1 : 1
Corresponding bit in PDORn is set to the inverse of its existing logic state.
End of enumeration elements list.
PTTO2 : Port Toggle Output
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Corresponding bit in PDORn does not change.
#1 : 1
Corresponding bit in PDORn is set to the inverse of its existing logic state.
End of enumeration elements list.
PTTO3 : Port Toggle Output
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Corresponding bit in PDORn does not change.
#1 : 1
Corresponding bit in PDORn is set to the inverse of its existing logic state.
End of enumeration elements list.
PTTO4 : Port Toggle Output
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
Corresponding bit in PDORn does not change.
#1 : 1
Corresponding bit in PDORn is set to the inverse of its existing logic state.
End of enumeration elements list.
PTTO5 : Port Toggle Output
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
Corresponding bit in PDORn does not change.
#1 : 1
Corresponding bit in PDORn is set to the inverse of its existing logic state.
End of enumeration elements list.
PTTO6 : Port Toggle Output
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
Corresponding bit in PDORn does not change.
#1 : 1
Corresponding bit in PDORn is set to the inverse of its existing logic state.
End of enumeration elements list.
PTTO7 : Port Toggle Output
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
Corresponding bit in PDORn does not change.
#1 : 1
Corresponding bit in PDORn is set to the inverse of its existing logic state.
End of enumeration elements list.
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