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GPIO

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1D byte (0x0)
mem_usage : registers
protection : not protected

Registers

PDOR

PDIR

PDDR

GACR

PSOR

PCOR

PTOR


PDOR

Port Data Output Register
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PDOR PDOR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PDO0 PDO1 PDO2 PDO3 PDO4 PDO5 PDO6 PDO7

PDO0 : Port Data Output
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Logic level 0 is driven on pin, provided pin is configured for general-purpose output.

#1 : 1

Logic level 1 is driven on pin, provided pin is configured for general-purpose output.

End of enumeration elements list.

PDO1 : Port Data Output
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Logic level 0 is driven on pin, provided pin is configured for general-purpose output.

#1 : 1

Logic level 1 is driven on pin, provided pin is configured for general-purpose output.

End of enumeration elements list.

PDO2 : Port Data Output
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Logic level 0 is driven on pin, provided pin is configured for general-purpose output.

#1 : 1

Logic level 1 is driven on pin, provided pin is configured for general-purpose output.

End of enumeration elements list.

PDO3 : Port Data Output
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Logic level 0 is driven on pin, provided pin is configured for general-purpose output.

#1 : 1

Logic level 1 is driven on pin, provided pin is configured for general-purpose output.

End of enumeration elements list.

PDO4 : Port Data Output
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

Logic level 0 is driven on pin, provided pin is configured for general-purpose output.

#1 : 1

Logic level 1 is driven on pin, provided pin is configured for general-purpose output.

End of enumeration elements list.

PDO5 : Port Data Output
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

Logic level 0 is driven on pin, provided pin is configured for general-purpose output.

#1 : 1

Logic level 1 is driven on pin, provided pin is configured for general-purpose output.

End of enumeration elements list.

PDO6 : Port Data Output
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Logic level 0 is driven on pin, provided pin is configured for general-purpose output.

#1 : 1

Logic level 1 is driven on pin, provided pin is configured for general-purpose output.

End of enumeration elements list.

PDO7 : Port Data Output
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

Logic level 0 is driven on pin, provided pin is configured for general-purpose output.

#1 : 1

Logic level 1 is driven on pin, provided pin is configured for general-purpose output.

End of enumeration elements list.


PDIR

Port Data Input Register
address_offset : 0x10 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PDIR PDIR read-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PDI0 PDI1 PDI2 PDI3 PDI4 PDI5 PDI6 PDI7

PDI0 : Port Data Input
bits : 0 - 0 (1 bit)
access : read-only

Enumeration:

#0 : 0

Pin logic level is logic 0, or is not configured for use by digital function.

#1 : 1

Pin logic level is logic 1.

End of enumeration elements list.

PDI1 : Port Data Input
bits : 1 - 1 (1 bit)
access : read-only

Enumeration:

#0 : 0

Pin logic level is logic 0, or is not configured for use by digital function.

#1 : 1

Pin logic level is logic 1.

End of enumeration elements list.

PDI2 : Port Data Input
bits : 2 - 2 (1 bit)
access : read-only

Enumeration:

#0 : 0

Pin logic level is logic 0, or is not configured for use by digital function.

#1 : 1

Pin logic level is logic 1.

End of enumeration elements list.

PDI3 : Port Data Input
bits : 3 - 3 (1 bit)
access : read-only

Enumeration:

#0 : 0

Pin logic level is logic 0, or is not configured for use by digital function.

#1 : 1

Pin logic level is logic 1.

End of enumeration elements list.

PDI4 : Port Data Input
bits : 4 - 4 (1 bit)
access : read-only

Enumeration:

#0 : 0

Pin logic level is logic 0, or is not configured for use by digital function.

#1 : 1

Pin logic level is logic 1.

End of enumeration elements list.

PDI5 : Port Data Input
bits : 5 - 5 (1 bit)
access : read-only

Enumeration:

#0 : 0

Pin logic level is logic 0, or is not configured for use by digital function.

#1 : 1

Pin logic level is logic 1.

End of enumeration elements list.

PDI6 : Port Data Input
bits : 6 - 6 (1 bit)
access : read-only

Enumeration:

#0 : 0

Pin logic level is logic 0, or is not configured for use by digital function.

#1 : 1

Pin logic level is logic 1.

End of enumeration elements list.

PDI7 : Port Data Input
bits : 7 - 7 (1 bit)
access : read-only

Enumeration:

#0 : 0

Pin logic level is logic 0, or is not configured for use by digital function.

#1 : 1

Pin logic level is logic 1.

End of enumeration elements list.


PDDR

Port Data Direction Register
address_offset : 0x14 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PDDR PDDR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7

PDD0 : Port Data Direction
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pin is configured as general-purpose input, for the GPIO function.

#1 : 1

Pin is configured as general-purpose output, for the GPIO function.

End of enumeration elements list.

PDD1 : Port Data Direction
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pin is configured as general-purpose input, for the GPIO function.

#1 : 1

Pin is configured as general-purpose output, for the GPIO function.

End of enumeration elements list.

PDD2 : Port Data Direction
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pin is configured as general-purpose input, for the GPIO function.

#1 : 1

Pin is configured as general-purpose output, for the GPIO function.

End of enumeration elements list.

PDD3 : Port Data Direction
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pin is configured as general-purpose input, for the GPIO function.

#1 : 1

Pin is configured as general-purpose output, for the GPIO function.

End of enumeration elements list.

PDD4 : Port Data Direction
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pin is configured as general-purpose input, for the GPIO function.

#1 : 1

Pin is configured as general-purpose output, for the GPIO function.

End of enumeration elements list.

PDD5 : Port Data Direction
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pin is configured as general-purpose input, for the GPIO function.

#1 : 1

Pin is configured as general-purpose output, for the GPIO function.

End of enumeration elements list.

PDD6 : Port Data Direction
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pin is configured as general-purpose input, for the GPIO function.

#1 : 1

Pin is configured as general-purpose output, for the GPIO function.

End of enumeration elements list.

PDD7 : Port Data Direction
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pin is configured as general-purpose input, for the GPIO function.

#1 : 1

Pin is configured as general-purpose output, for the GPIO function.

End of enumeration elements list.


GACR

GPIO Attribute Checker Register
address_offset : 0x1C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GACR GACR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 ACB ROB

ACB : Attribute Check Byte
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

#000 : 000

User nonsecure: Read + Write; User Secure: Read + Write; Privileged Secure: Read + Write

#001 : 001

User nonsecure: Read; User Secure: Read + Write; Privileged Secure: Read + Write

#010 : 010

User nonsecure: None; User Secure: Read + Write; Privileged Secure: Read + Write

#011 : 011

User nonsecure: Read; User Secure: Read; Privileged Secure: Read + Write

#100 : 100

User nonsecure: None; User Secure: Read; Privileged Secure: Read + Write

#101 : 101

User nonsecure: None; User Secure: None; Privileged Secure: Read + Write

#110 : 110

User nonsecure: None; User Secure: None; Privileged Secure: Read

#111 : 111

User nonsecure: None; User Secure: None; Privileged Secure: None

End of enumeration elements list.

ROB : Read-Only Byte
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

Writes to the ACB are allowed.

#1 : 1

Writes to the ACB are ignored.

End of enumeration elements list.


PSOR

Port Set Output Register
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PSOR PSOR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PTSO0 PTSO1 PTSO2 PTSO3 PTSO4 PTSO5 PTSO6 PTSO7

PTSO0 : Port Set Output
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Corresponding bit in PDORn does not change.

#1 : 1

Corresponding bit in PDORn is set to logic 1.

End of enumeration elements list.

PTSO1 : Port Set Output
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Corresponding bit in PDORn does not change.

#1 : 1

Corresponding bit in PDORn is set to logic 1.

End of enumeration elements list.

PTSO2 : Port Set Output
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Corresponding bit in PDORn does not change.

#1 : 1

Corresponding bit in PDORn is set to logic 1.

End of enumeration elements list.

PTSO3 : Port Set Output
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Corresponding bit in PDORn does not change.

#1 : 1

Corresponding bit in PDORn is set to logic 1.

End of enumeration elements list.

PTSO4 : Port Set Output
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

Corresponding bit in PDORn does not change.

#1 : 1

Corresponding bit in PDORn is set to logic 1.

End of enumeration elements list.

PTSO5 : Port Set Output
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

Corresponding bit in PDORn does not change.

#1 : 1

Corresponding bit in PDORn is set to logic 1.

End of enumeration elements list.

PTSO6 : Port Set Output
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Corresponding bit in PDORn does not change.

#1 : 1

Corresponding bit in PDORn is set to logic 1.

End of enumeration elements list.

PTSO7 : Port Set Output
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

Corresponding bit in PDORn does not change.

#1 : 1

Corresponding bit in PDORn is set to logic 1.

End of enumeration elements list.


PCOR

Port Clear Output Register
address_offset : 0x8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCOR PCOR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PTCO0 PTCO1 PTCO2 PTCO3 PTCO4 PTCO5 PTCO6 PTCO7

PTCO0 : Port Clear Output
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Corresponding bit in PDORn does not change.

#1 : 1

Corresponding bit in PDORn is cleared to logic 0.

End of enumeration elements list.

PTCO1 : Port Clear Output
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Corresponding bit in PDORn does not change.

#1 : 1

Corresponding bit in PDORn is cleared to logic 0.

End of enumeration elements list.

PTCO2 : Port Clear Output
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Corresponding bit in PDORn does not change.

#1 : 1

Corresponding bit in PDORn is cleared to logic 0.

End of enumeration elements list.

PTCO3 : Port Clear Output
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Corresponding bit in PDORn does not change.

#1 : 1

Corresponding bit in PDORn is cleared to logic 0.

End of enumeration elements list.

PTCO4 : Port Clear Output
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

Corresponding bit in PDORn does not change.

#1 : 1

Corresponding bit in PDORn is cleared to logic 0.

End of enumeration elements list.

PTCO5 : Port Clear Output
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

Corresponding bit in PDORn does not change.

#1 : 1

Corresponding bit in PDORn is cleared to logic 0.

End of enumeration elements list.

PTCO6 : Port Clear Output
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Corresponding bit in PDORn does not change.

#1 : 1

Corresponding bit in PDORn is cleared to logic 0.

End of enumeration elements list.

PTCO7 : Port Clear Output
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

Corresponding bit in PDORn does not change.

#1 : 1

Corresponding bit in PDORn is cleared to logic 0.

End of enumeration elements list.


PTOR

Port Toggle Output Register
address_offset : 0xC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PTOR PTOR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PTTO0 PTTO1 PTTO2 PTTO3 PTTO4 PTTO5 PTTO6 PTTO7

PTTO0 : Port Toggle Output
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Corresponding bit in PDORn does not change.

#1 : 1

Corresponding bit in PDORn is set to the inverse of its existing logic state.

End of enumeration elements list.

PTTO1 : Port Toggle Output
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Corresponding bit in PDORn does not change.

#1 : 1

Corresponding bit in PDORn is set to the inverse of its existing logic state.

End of enumeration elements list.

PTTO2 : Port Toggle Output
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Corresponding bit in PDORn does not change.

#1 : 1

Corresponding bit in PDORn is set to the inverse of its existing logic state.

End of enumeration elements list.

PTTO3 : Port Toggle Output
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Corresponding bit in PDORn does not change.

#1 : 1

Corresponding bit in PDORn is set to the inverse of its existing logic state.

End of enumeration elements list.

PTTO4 : Port Toggle Output
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

Corresponding bit in PDORn does not change.

#1 : 1

Corresponding bit in PDORn is set to the inverse of its existing logic state.

End of enumeration elements list.

PTTO5 : Port Toggle Output
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

Corresponding bit in PDORn does not change.

#1 : 1

Corresponding bit in PDORn is set to the inverse of its existing logic state.

End of enumeration elements list.

PTTO6 : Port Toggle Output
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Corresponding bit in PDORn does not change.

#1 : 1

Corresponding bit in PDORn is set to the inverse of its existing logic state.

End of enumeration elements list.

PTTO7 : Port Toggle Output
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

Corresponding bit in PDORn does not change.

#1 : 1

Corresponding bit in PDORn is set to the inverse of its existing logic state.

End of enumeration elements list.



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