Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
Power Mode Protection register
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AVLLS : Allow Very-Low-Leakage Stop Mode
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Any VLLSx mode is not allowed
#1 : 1
Any VLLSx mode is allowed
End of enumeration elements list.
ALLS : Allow Low-Leakage Stop Mode
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Any LLSx mode is not allowed
#1 : 1
Any LLSx mode is allowed
End of enumeration elements list.
AVLP : Allow Very-Low-Power Modes
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
VLPR, VLPW, and VLPS are not allowed.
#1 : 1
VLPR, VLPW, and VLPS are allowed.
End of enumeration elements list.
AHSRUN : Allow High Speed Run mode
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
HSRUN is not allowed
#1 : 1
HSRUN is allowed
End of enumeration elements list.
Power Mode Control register
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
STOPM : Stop Mode Control
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
#000 : 000
Normal Stop (STOP)
#010 : 010
Very-Low-Power Stop (VLPS)
#011 : 011
Low-Leakage Stop (LLSx)
#100 : 100
Very-Low-Leakage Stop (VLLSx)
#110 : 110
Reseved
End of enumeration elements list.
STOPA : Stop Aborted
bits : 3 - 3 (1 bit)
access : read-only
Enumeration:
#0 : 0
The previous stop mode entry was successsful.
#1 : 1
The previous stop mode entry was aborted.
End of enumeration elements list.
RUNM : Run Mode Control
bits : 5 - 6 (2 bit)
access : read-write
Enumeration:
#00 : 00
Normal Run mode (RUN)
#10 : 10
Very-Low-Power Run mode (VLPR)
#11 : 11
High Speed Run mode (HSRUN)
End of enumeration elements list.
Stop Control Register
address_offset : 0x2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LLSM : LLS or VLLS Mode Control
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
#000 : 000
VLLS0 if PMCTRL[STOPM]=VLLSx, reserved if PMCTRL[STOPM]=LLSx
#001 : 001
VLLS1 if PMCTRL[STOPM]=VLLSx, reserved if PMCTRL[STOPM]=LLSx
#010 : 010
VLLS2 if PMCTRL[STOPM]=VLLSx, LLS2 if PMCTRL[STOPM]=LLSx
#011 : 011
VLLS3 if PMCTRL[STOPM]=VLLSx, LLS3 if PMCTRL[STOPM]=LLSx
End of enumeration elements list.
LPOPO : LPO Power Option
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
LPO clock is enabled in LLS/VLLSx
#1 : 1
LPO clock is disabled in LLS/VLLSx
End of enumeration elements list.
PORPO : POR Power Option
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
POR detect circuit is enabled in VLLS0
#1 : 1
POR detect circuit is disabled in VLLS0
End of enumeration elements list.
PSTOPO : Partial Stop Option
bits : 6 - 7 (2 bit)
access : read-write
Enumeration:
#00 : 00
STOP - Normal Stop mode
#01 : 01
PSTOP1 - Partial Stop with both system and bus clocks disabled
#10 : 10
PSTOP2 - Partial Stop with system clock disabled and bus clock enabled
End of enumeration elements list.
Power Mode Status register
address_offset : 0x3 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PMSTAT : Power Mode Status
bits : 0 - 7 (8 bit)
access : read-only
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